Revert PageTable code back to non-asid version.
mem/page_table.cc: mem/page_table.hh: Revert back to non-asid version. --HG-- extra : convert_revision : c8e8810584d4cf12eb86da43ab77ddf8551a9e6b
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2 changed files with 63 additions and 100 deletions
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@ -34,33 +34,25 @@
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#include <map>
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#include <map>
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#include <fstream>
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#include <fstream>
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using namespace std;
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#include "base/bitfield.hh"
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#include "base/intmath.hh"
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#include "base/intmath.hh"
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "mem/physical.hh"
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#include "mem/page_table.hh"
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#include "mem/page_table.hh"
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#include "sim/builder.hh"
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#include "sim/builder.hh"
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#include "sim/sim_object.hh"
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#include "sim/sim_object.hh"
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#include "sim/system.hh"
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PageTable::PageTable(const std::string &name)
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using namespace std;
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: SimObject(name)
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PageTable::PageTable(System *_system, Addr _pageSize)
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: pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
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system(_system)
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{
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{
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assert(isPowerOf2(pageSize));
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}
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}
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PageTable::~PageTable()
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PageTable::~PageTable()
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{
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{
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//Iterate the page table freeing the memoruy
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//Addr addr;
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//std::map<Addr,Addr>::iterator iter;
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//iter = pTable.begin();
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//while(iter != pTable.end())
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//{
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//delete [] (uint8_t *)iter->second;
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// iter ++;
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// }
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}
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}
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Fault
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Fault
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@ -89,78 +81,49 @@ PageTable::page_check(Addr addr, int size) const
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}
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}
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void
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PageTable::allocate(Addr vaddr, int size)
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{
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// starting address must be page aligned
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assert(pageOffset(vaddr) == 0);
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for (; size > 0; size -= pageSize, vaddr += pageSize) {
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std::map<Addr,Addr>::iterator iter = pTable.find(vaddr);
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if (iter != pTable.end()) {
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// already mapped
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fatal("PageTable::allocate: address 0x%x already mapped", vaddr);
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}
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pTable[vaddr] = system->new_page();
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}
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}
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bool
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PageTable::translate(Addr vaddr, Addr &paddr)
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{
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Addr page_addr = pageAlign(vaddr);
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std::map<Addr,Addr>::iterator iter = pTable.find(page_addr);
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if (iter == pTable.end()) {
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return false;
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}
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paddr = iter->second + pageOffset(vaddr);
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return true;
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}
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Fault
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Fault
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PageTable::translate(CpuRequestPtr &req)
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PageTable::translate(CpuRequestPtr &req)
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{
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{
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//Should I check here for accesses that are > VMPageSize?
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assert(pageAlign(req->vaddr + req->size - 1) == pageAlign(req->vaddr));
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req->paddr = translate(req->vaddr, req->asid);
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if (!translate(req->vaddr, req->paddr)) {
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return Machine_Check_Fault;
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}
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return page_check(req->paddr, req->size);
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return page_check(req->paddr, req->size);
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}
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}
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Addr
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PageTable::translate(Addr vaddr, unsigned asid)
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{
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Addr hash_addr;
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std::map<Addr,Addr>::iterator iter;
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//DPRINTF(PageTable,"PageTable: Virtual Address %#x Translating for ASID %i\n",
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// vaddr,asid);
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//Create the hash_addr
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//Combine vaddr and asid
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hash_addr = vaddr & (~(VMPageSize - 1)) | asid;
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//DPRINTF(PageTable,"PageTable: Hash Address %#x\n",hash_addr);
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//Look into the page table
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iter=pTable.find(hash_addr);
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//bool page_fault = true;
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//Store the translated address if found, and return
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if (iter != pTable.end()) //Found??
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{
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Addr return_addr = iter->second + (vaddr & (VMPageSize - 1));
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return return_addr;
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}
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else//Alocate a new page, register translation
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{
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Addr return_addr;
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//DPRINTF(PageTable,"PageTable: Page Not Found. Allocating new page\n");
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Addr new_page = mem->new_page();
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pTable[hash_addr] = new_page;
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return_addr = new_page + (vaddr & (VMPageSize - 1));
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return return_addr;
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}
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(PageTable)
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SimObjectParam<PhysicalMemory *> physmem;
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END_DECLARE_SIM_OBJECT_PARAMS(PageTable)
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BEGIN_INIT_SIM_OBJECT_PARAMS(PageTable)
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INIT_PARAM_DFLT(physmem, "Pointer to functional memory", NULL)
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END_INIT_SIM_OBJECT_PARAMS(PageTable)
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CREATE_SIM_OBJECT(PageTable)
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{
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PageTable *pTable = new PageTable(getInstanceName());
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if (physmem)
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pTable->setPhysMem(physmem);
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return pTable;
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}
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REGISTER_SIM_OBJECT("PageTable", PageTable)
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@ -42,44 +42,44 @@
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#include "mem/packet.hh"
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#include "mem/packet.hh"
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#include "sim/sim_object.hh"
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#include "sim/sim_object.hh"
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class PhysicalMemory;
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class System;
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/**
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/**
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* Page Table Decleration.
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* Page Table Decleration.
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*/
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*/
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class PageTable : public SimObject
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class PageTable
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{
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{
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protected:
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protected:
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std::map<Addr,Addr> pTable;
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std::map<Addr,Addr> pTable;
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PhysicalMemory *mem;
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const Addr pageSize;
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const Addr offsetMask;
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System *system;
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public:
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public:
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/**
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PageTable(System *_system, Addr _pageSize = VMPageSize);
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* Construct this interface.
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* @param name The name of this interface.
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* @param hier Pointer to the hierarchy wide parameters.
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* @param _mem the connected memory.
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*/
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PageTable(const std::string &name);
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~PageTable();
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~PageTable();
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void setPhysMem(PhysicalMemory *_mem) { mem = _mem; }
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Addr pageAlign(Addr a) { return (a & ~offsetMask); }
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Addr pageOffset(Addr a) { return (a & offsetMask); }
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Fault page_check(Addr addr, int size) const;
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Fault page_check(Addr addr, int size) const;
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void allocate(Addr vaddr, int size);
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/**
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/**
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* Translate function
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* Translate function
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* @param vaddr The virtual address.
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* @param vaddr The virtual address.
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* @param asid The address space id.
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* @return Physical address from translation.
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* @return Physical address from translation.
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*/
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*/
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Addr translate(Addr vaddr, unsigned asid);
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bool translate(Addr vaddr, Addr &paddr);
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/**
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/**
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* Perform a translation on the memory request, fills in paddr field of mem_req.
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* Perform a translation on the memory request, fills in paddr
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* field of mem_req.
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* @param req The memory request.
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* @param req The memory request.
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*/
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*/
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Fault translate(CpuRequestPtr &req);
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Fault translate(CpuRequestPtr &req);
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