ARM: Fix PC operand handling.
This commit is contained in:
parent
7eb3ea2798
commit
b6e7029dd5
2 changed files with 13 additions and 6 deletions
|
@ -139,6 +139,18 @@ class ArmStaticInstBase : public StaticInst
|
||||||
return ((spsr & ~bitMask) | (val & bitMask));
|
return ((spsr & ~bitMask) | (val & bitMask));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
template<class XC>
|
||||||
|
static Addr
|
||||||
|
readPC(XC *xc)
|
||||||
|
{
|
||||||
|
Addr pc = xc->readPC();
|
||||||
|
Addr tBit = pc & (ULL(1) << PcTBitShift);
|
||||||
|
if (tBit)
|
||||||
|
return pc + 4;
|
||||||
|
else
|
||||||
|
return pc + 8;
|
||||||
|
}
|
||||||
|
|
||||||
template<class XC>
|
template<class XC>
|
||||||
static void
|
static void
|
||||||
setNextPC(XC *xc, Addr val)
|
setNextPC(XC *xc, Addr val)
|
||||||
|
|
|
@ -53,7 +53,7 @@ def operand_types {{
|
||||||
|
|
||||||
let {{
|
let {{
|
||||||
maybePCRead = '''
|
maybePCRead = '''
|
||||||
((%(reg_idx)s == PCReg) ? ((xc->readPC() & ~PcModeMask) + 8) :
|
((%(reg_idx)s == PCReg) ? (readPC(xc) & ~PcModeMask) :
|
||||||
xc->%(func)s(this, %(op_idx)s))
|
xc->%(func)s(this, %(op_idx)s))
|
||||||
'''
|
'''
|
||||||
maybePCWrite = '''
|
maybePCWrite = '''
|
||||||
|
@ -61,9 +61,6 @@ let {{
|
||||||
xc->%(func)s(this, %(op_idx)s, %(final_val)s))
|
xc->%(func)s(this, %(op_idx)s, %(final_val)s))
|
||||||
'''
|
'''
|
||||||
|
|
||||||
readPC = 'xc->readPC() & ~PcModeMask'
|
|
||||||
writePC = 'setPC(xc, %(final_val)s)'
|
|
||||||
|
|
||||||
readNPC = 'xc->readNextPC() & ~PcModeMask'
|
readNPC = 'xc->readNextPC() & ~PcModeMask'
|
||||||
writeNPC = 'setNextPC(xc, %(final_val)s)'
|
writeNPC = 'setNextPC(xc, %(final_val)s)'
|
||||||
}};
|
}};
|
||||||
|
@ -117,8 +114,6 @@ def operands {{
|
||||||
'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 43),
|
'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 43),
|
||||||
'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 44),
|
'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 44),
|
||||||
'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 45),
|
'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 45),
|
||||||
'PC': ('PC', 'ud', None, (None, None, 'IsControl'), 50,
|
|
||||||
readPC, writePC),
|
|
||||||
'NPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51,
|
'NPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51,
|
||||||
readNPC, writeNPC),
|
readNPC, writeNPC),
|
||||||
}};
|
}};
|
||||||
|
|
Loading…
Reference in a new issue