mem: Add bank and rank indices as fields to the DRAM bank
This patch adds the index of the bank and rank as a field so that we can determine the identity of a given bank (reference or pointer) for the power tracing. We also grab the opportunity of cleaning up the arguments used for identifying the bank when activating.
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2 changed files with 25 additions and 17 deletions
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@ -96,6 +96,14 @@ DRAMCtrl::DRAMCtrl(const DRAMCtrlParams* p) :
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actTicks[c].resize(activationLimit, 0);
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}
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// set the bank indices
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for (int r = 0; r < ranksPerChannel; r++) {
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for (int b = 0; b < banksPerRank; b++) {
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banks[r][b].rank = r;
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banks[r][b].bank = b;
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}
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}
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// perform a basic check of the write thresholds
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if (p->write_low_thresh_perc >= p->write_high_thresh_perc)
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fatal("Write buffer low threshold %d must be smaller than the "
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@ -752,23 +760,24 @@ DRAMCtrl::accessAndRespond(PacketPtr pkt, Tick static_latency)
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}
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void
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DRAMCtrl::activateBank(Tick act_tick, uint8_t rank, uint8_t bank,
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uint32_t row, Bank& bank_ref)
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DRAMCtrl::activateBank(Bank& bank, Tick act_tick, uint32_t row)
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{
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assert(0 <= rank && rank < ranksPerChannel);
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// get the rank index from the bank
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uint8_t rank = bank.rank;
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assert(actTicks[rank].size() == activationLimit);
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DPRINTF(DRAM, "Activate at tick %d\n", act_tick);
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// update the open row
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assert(bank_ref.openRow == Bank::NO_ROW);
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bank_ref.openRow = row;
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assert(bank.openRow == Bank::NO_ROW);
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bank.openRow = row;
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// start counting anew, this covers both the case when we
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// auto-precharged, and when this access is forced to
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// precharge
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bank_ref.bytesAccessed = 0;
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bank_ref.rowAccesses = 0;
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bank.bytesAccessed = 0;
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bank.rowAccesses = 0;
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++numBanksActive;
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assert(numBanksActive <= banksPerRank * ranksPerChannel);
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@ -777,10 +786,10 @@ DRAMCtrl::activateBank(Tick act_tick, uint8_t rank, uint8_t bank,
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act_tick, numBanksActive);
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// The next access has to respect tRAS for this bank
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bank_ref.preAllowedAt = act_tick + tRAS;
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bank.preAllowedAt = act_tick + tRAS;
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// Respect the row-to-column command delay
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bank_ref.colAllowedAt = act_tick + tRCD;
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bank.colAllowedAt = act_tick + tRCD;
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// start by enforcing tRRD
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for(int i = 0; i < banksPerRank; i++) {
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@ -922,8 +931,7 @@ DRAMCtrl::doDRAMAccess(DRAMPacket* dram_pkt)
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// Record the activation and deal with all the global timing
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// constraints caused be a new activation (tRRD and tXAW)
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activateBank(act_tick, dram_pkt->rank, dram_pkt->bank,
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dram_pkt->row, bank);
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activateBank(bank, act_tick, dram_pkt->row);
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// issue the command as early as possible
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cmd_at = bank.colAllowedAt;
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@ -154,6 +154,8 @@ class DRAMCtrl : public AbstractMemory
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static const uint32_t NO_ROW = -1;
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uint32_t openRow;
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uint8_t rank;
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uint8_t bank;
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Tick colAllowedAt;
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Tick preAllowedAt;
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@ -163,7 +165,8 @@ class DRAMCtrl : public AbstractMemory
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uint32_t bytesAccessed;
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Bank() :
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openRow(NO_ROW), colAllowedAt(0), preAllowedAt(0), actAllowedAt(0),
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openRow(NO_ROW), rank(0), bank(0),
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colAllowedAt(0), preAllowedAt(0), actAllowedAt(0),
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rowAccesses(0), bytesAccessed(0)
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{ }
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};
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@ -387,14 +390,11 @@ class DRAMCtrl : public AbstractMemory
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* method updates the time that the banks become available based
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* on the current limits.
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*
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* @param bank Reference to the bank
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* @param act_tick Time when the activation takes place
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* @param rank Index of the rank
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* @param bank Index of the bank
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* @param row Index of the row
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* @param bank_ref Reference to the bank
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*/
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void activateBank(Tick act_tick, uint8_t rank, uint8_t bank,
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uint32_t row, Bank& bank_ref);
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void activateBank(Bank& bank, Tick act_tick, uint32_t row);
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/**
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* Precharge a given bank and also update when the precharge is
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