misc: Clean up and complete the gem5<->SystemC-TLM bridge [1/10]
The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Restructure the existing sources in preparation of the addition of the * new Master Port. * Refractor names to allow for distinction of the slave and master port. * Replace the Makefile by a SConstruct. Testing Done: The examples provided in util/tlm (now util/tlm/examples/slave_port) still compile and run error free. Reviewed at http://reviews.gem5.org/r/3527/ Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
parent
41a6158954
commit
b25ea094d4
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@ -163,7 +163,7 @@ def config_mem(options, system):
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if options.tlm_memory:
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if options.tlm_memory:
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system.external_memory = m5.objects.ExternalSlave(
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system.external_memory = m5.objects.ExternalSlave(
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port_type="tlm",
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port_type="tlm_slave",
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port_data=options.tlm_memory,
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port_data=options.tlm_memory,
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port=system.membus.master,
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port=system.membus.master,
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addr_ranges=system.mem_ranges)
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addr_ranges=system.mem_ranges)
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@ -1,21 +1,23 @@
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# Copyright (c) 2015, University of Kaiserslautern
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#!python
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# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# modification, are permitted provided that the following conditions are
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# met:
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# met:
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#
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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# this list of conditions and the following disclaimer.
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#
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#
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# 2. Redistributions in binary form must reproduce the above copyright
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# documentation and/or other materials provided with the distribution.
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#
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#
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# 3. Neither the name of the copyright holder nor the names of its
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# 3. Neither the name of the copyright holder nor the names of its
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# contributors may be used to endorse or promote products derived from
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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# this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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@ -27,50 +29,49 @@
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# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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# Authors: Matthias Jung
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# Authors: Christian Menard
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import os
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ARCH = ARM
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gem5_arch = 'ARM'
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VARIANT = opt
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gem5_variant = 'opt'
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#VARIANT = debug
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#gem5_variant = 'debug'
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SYSTEMC_INC = /opt/systemc/include
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gem5_root = '#../../../..'
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SYSTEMC_LIB = /opt/systemc/lib-linux64
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CXXFLAGS = -I../../build/$(ARCH) -L../../build/$(ARCH)
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target = 'gem5.' + gem5_variant + '.sc'
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CXXFLAGS += -I../systemc/
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CXXFLAGS += -I$(SYSTEMC_INC) -L$(SYSTEMC_LIB)
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CXXFLAGS += -std=c++0x
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CXXFLAGS += -g
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CXXFLAGS += -DSC_INCLUDE_DYNAMIC_PROCESSES -DDEBUG -DTRACING_ON
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LIBS = -lgem5_$(VARIANT) -lsystemc
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env = Environment()
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ALL = gem5.$(VARIANT).sc
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# Import PKG_CONFIG_PATH from the external environment
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if os.environ.has_key('PKG_CONFIG_PATH'):
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env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
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all: $(ALL)
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# search for SystemC
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env.ParseConfig('pkg-config --cflags --libs systemc')
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.cc.o:
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# add include dirs
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$(CXX) $(CXXFLAGS) -c -o $@ $<
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env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
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gem5_root + '/util/systemc',
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gem5_root + '/util/tlm'])
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sc_gem5_control.o: ../systemc/sc_gem5_control.cc \
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env.Append(LIBS=['gem5_' + gem5_variant])
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../systemc/sc_gem5_control.hh
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env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
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sc_logger.o: ../systemc/sc_logger.cc ../systemc/sc_logger.hh
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sc_module.o: ../systemc/sc_module.cc ../systemc/sc_module.hh
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sc_mm.o: sc_mm.cc sc_mm.hh
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sc_ext.o: sc_ext.cc sc_ext.hh
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sc_port.o: sc_port.cc sc_port.hh
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sc_target.o: sc_target.cc sc_target.hh
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stats.o: ../systemc/stats.cc ../systemc/stats.hh
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main.o: main.cc ../systemc/sc_logger.hh ../systemc/sc_module.hh \
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../systemc/stats.hh
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gem5.$(VARIANT).sc: main.o ../systemc/stats.o ../systemc/sc_gem5_control.o \
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env.Append(CXXFLAGS=['-std=c++11',
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../systemc/sc_logger.o ../systemc/sc_module.o sc_mm.o sc_ext.o sc_port.o sc_target.o
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'-DSC_INCLUDE_DYNAMIC_PROCESSES',
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$(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS)
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'-DTRACING_ON'])
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clean:
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if gem5_variant == 'debug':
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$(RM) $(ALL)
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env.Append(CXXFLAGS=['-g', '-DDEBUG'])
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$(RM) *.o
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$(RM) -r m5out
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src_systemc = [gem5_root + '/util/systemc/sc_gem5_control.cc',
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gem5_root + '/util/systemc/sc_logger.cc',
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gem5_root + '/util/systemc/sc_module.cc',
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gem5_root + '/util/systemc/stats.cc']
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src_tlm = Glob(gem5_root + '/util/tlm/*.cc')
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src_main = Glob('*.cc')
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main = env.Program(target, src_systemc + src_tlm + src_main)
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115
util/tlm/examples/slave_port/main.cc
Normal file
115
util/tlm/examples/slave_port/main.cc
Normal file
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@ -0,0 +1,115 @@
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/*
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* Copyright (c) 2015, University of Kaiserslautern
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* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Matthias Jung
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* Christian Menard
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* Abdul Mutaal Ahmad
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*/
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/**
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* @file
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*
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* Example top level file for SystemC-TLM integration with C++-only
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* instantiation.
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*
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*/
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#include <tlm_utils/simple_target_socket.h>
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#include <systemc>
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#include <tlm>
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#include "sc_target.hh"
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#include "sim_control.hh"
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#include "stats.hh"
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// Defining global string variable decalred in stats.hh
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std::string filename;
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void
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reportHandler(const sc_core::sc_report &report,
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const sc_core::sc_actions &actions)
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{
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uint64_t systemc_time = report.get_time().value();
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uint64_t gem5_time = curTick();
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std::cerr << report.get_time();
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if (gem5_time < systemc_time) {
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std::cerr << " (<) ";
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} else if (gem5_time > systemc_time) {
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std::cerr << " (!) ";
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} else {
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std::cerr << " (=) ";
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}
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std::cerr << ": " << report.get_msg_type()
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<< ' ' << report.get_msg() << '\n';
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}
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int
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sc_main(int argc, char **argv)
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{
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sc_core::sc_report_handler::set_handler(reportHandler);
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SimControl sim_control("gem5", argc, argv);
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Target *memory;
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filename = "m5out/stats-systemc.txt";
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tlm::tlm_initiator_socket <> *mem_port =
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dynamic_cast<tlm::tlm_initiator_socket<> *>(
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sc_core::sc_find_object("gem5.memory")
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);
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if (mem_port) {
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SC_REPORT_INFO("sc_main", "Port Found");
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unsigned long long int size = 512*1024*1024ULL;
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memory = new Target("memory",
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sim_control.getDebugFlag(),
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size,
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sim_control.getOffset());
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memory->socket.bind(*mem_port);
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} else {
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SC_REPORT_FATAL("sc_main", "Port Not Found");
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std::exit(EXIT_FAILURE);
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}
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sc_core::sc_start();
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SC_REPORT_INFO("sc_main", "End of Simulation");
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CxxConfig::statsDump();
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return EXIT_SUCCESS;
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}
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@ -36,7 +36,7 @@ RCol='\e[0m'; # Text Reset
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BGre='\e[1;31m';
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BGre='\e[1;31m';
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echo -e "\n${BGre}Create gem5 Configuration${RCol}\n"
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echo -e "\n${BGre}Create gem5 Configuration${RCol}\n"
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../../build/ARM/gem5.opt ../../configs/example/fs.py \
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../../../../build/ARM/gem5.opt ../../../../configs/example/fs.py \
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--tlm-memory=memory \
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--tlm-memory=memory \
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--cpu-type=timing \
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--cpu-type=timing \
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--num-cpu=1 \
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--num-cpu=1 \
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@ -165,7 +165,7 @@ Target::send_end_req(tlm::tlm_generic_payload& trans)
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/* Queue the acceptance and the response with the appropriate latency */
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/* Queue the acceptance and the response with the appropriate latency */
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bw_phase = tlm::END_REQ;
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bw_phase = tlm::END_REQ;
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delay = sc_time(10, SC_NS); // Accept delay
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delay = sc_time(10.0, SC_NS); // Accept delay
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tlm::tlm_sync_enum status;
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tlm::tlm_sync_enum status;
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status = socket->nb_transport_bw(trans, bw_phase, delay);
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status = socket->nb_transport_bw(trans, bw_phase, delay);
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@ -173,7 +173,7 @@ Target::send_end_req(tlm::tlm_generic_payload& trans)
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/* Ignore return value;
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/* Ignore return value;
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* initiator cannot terminate transaction at this point
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* initiator cannot terminate transaction at this point
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* Queue internal event to mark beginning of response: */
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* Queue internal event to mark beginning of response: */
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delay = delay + sc_time(40, SC_NS); // Latency
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delay = delay + sc_time(40.0, SC_NS); // Latency
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target_done_event.notify(delay);
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target_done_event.notify(delay);
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assert(transaction_in_progress == 0);
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assert(transaction_in_progress == 0);
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@ -249,7 +249,7 @@ Target::send_response(tlm::tlm_generic_payload& trans)
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response_in_progress = true;
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response_in_progress = true;
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bw_phase = tlm::BEGIN_RESP;
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bw_phase = tlm::BEGIN_RESP;
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delay = sc_time(10, SC_NS);
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delay = sc_time(10.0, SC_NS);
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status = socket->nb_transport_bw( trans, bw_phase, delay );
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status = socket->nb_transport_bw( trans, bw_phase, delay );
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if (status == tlm::TLM_UPDATED) {
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if (status == tlm::TLM_UPDATED) {
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@ -45,7 +45,7 @@ from m5.objects import *
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# | | |
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# | | |
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# +-------v------v-------+ |
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# +-------v------v-------+ |
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# | Membus | v
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# | Membus | v
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# +----------------+-----+ External Port (see sc_port.*)
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# +----------------+-----+ External Port (see sc_slave_port.*)
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# | ^
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# | ^
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# +---v---+ | TLM World
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# +---v---+ | TLM World
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# | TLM | | (see sc_target.*)
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# | TLM | | (see sc_target.*)
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@ -63,7 +63,7 @@ system.clk_domain = SrcClockDomain(clock = '1.5GHz',
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# Create a external TLM port:
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# Create a external TLM port:
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system.tlm = ExternalSlave()
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system.tlm = ExternalSlave()
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system.tlm.addr_ranges = [AddrRange('512MB')]
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system.tlm.addr_ranges = [AddrRange('512MB')]
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system.tlm.port_type = "tlm"
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system.tlm.port_type = "tlm_slave"
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system.tlm.port_data = "memory"
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system.tlm.port_data = "memory"
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# Route the connections:
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# Route the connections:
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@ -1,5 +1,6 @@
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/*
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/*
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* Copyright (c) 2015, University of Kaiserslautern
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* Copyright (c) 2015, University of Kaiserslautern
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* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
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* All rights reserved.
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* All rights reserved.
|
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
|
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@ -31,42 +32,48 @@
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*
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*
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* Authors:
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* Authors:
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* Matthias Jung
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* Matthias Jung
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* Christian Menard
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*/
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*/
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#include "sc_ext.hh"
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#include "sc_ext.hh"
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using namespace tlm;
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using namespace tlm;
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gem5Extension::gem5Extension(PacketPtr packet)
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namespace Gem5SystemC
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{
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Gem5Extension::Gem5Extension(PacketPtr packet)
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{
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{
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Packet = packet;
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Packet = packet;
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}
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}
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gem5Extension& gem5Extension::getExtension(const tlm_generic_payload *payload)
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Gem5Extension& Gem5Extension::getExtension(const tlm_generic_payload *payload)
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{
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{
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gem5Extension *result = NULL;
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Gem5Extension *result = NULL;
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payload->get_extension(result);
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payload->get_extension(result);
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sc_assert(result!=NULL);
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sc_assert(result!=NULL);
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return *result;
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return *result;
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}
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}
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gem5Extension& gem5Extension::getExtension(const tlm_generic_payload &payload)
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Gem5Extension& Gem5Extension::getExtension(const tlm_generic_payload &payload)
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{
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{
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return gem5Extension::getExtension(&payload);
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return Gem5Extension::getExtension(&payload);
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}
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}
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|
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PacketPtr gem5Extension::getPacket()
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PacketPtr Gem5Extension::getPacket()
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{
|
{
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return Packet;
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return Packet;
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}
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}
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tlm_extension_base* gem5Extension::clone() const
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tlm_extension_base* Gem5Extension::clone() const
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{
|
{
|
||||||
return new gem5Extension(Packet);
|
return new Gem5Extension(Packet);
|
||||||
}
|
}
|
||||||
|
|
||||||
void gem5Extension::copy_from(const tlm_extension_base& ext)
|
void Gem5Extension::copy_from(const tlm_extension_base& ext)
|
||||||
{
|
{
|
||||||
const gem5Extension& cpyFrom = static_cast<const gem5Extension&>(ext);
|
const Gem5Extension& cpyFrom = static_cast<const Gem5Extension&>(ext);
|
||||||
Packet = cpyFrom.Packet;
|
Packet = cpyFrom.Packet;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2015, University of Kaiserslautern
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -31,10 +32,11 @@
|
||||||
*
|
*
|
||||||
* Authors:
|
* Authors:
|
||||||
* Matthias Jung
|
* Matthias Jung
|
||||||
|
* Christian Menard
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef SC_EXT_H_
|
#ifndef __SC_EXT_HH__
|
||||||
#define SC_EXT_H_
|
#define __SC_EXT_HH__
|
||||||
|
|
||||||
#include <systemc.h>
|
#include <systemc.h>
|
||||||
#include <tlm.h>
|
#include <tlm.h>
|
||||||
|
@ -43,20 +45,27 @@
|
||||||
|
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
|
|
||||||
class gem5Extension: public tlm::tlm_extension<gem5Extension>
|
namespace Gem5SystemC
|
||||||
|
{
|
||||||
|
|
||||||
|
class Gem5Extension: public tlm::tlm_extension<Gem5Extension>
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
gem5Extension(PacketPtr packet);
|
Gem5Extension(PacketPtr packet);
|
||||||
|
|
||||||
virtual tlm_extension_base* clone() const;
|
virtual tlm_extension_base* clone() const;
|
||||||
virtual void copy_from(const tlm_extension_base& ext);
|
virtual void copy_from(const tlm_extension_base& ext);
|
||||||
|
|
||||||
static gem5Extension& getExtension(const tlm::tlm_generic_payload *payload);
|
static Gem5Extension&
|
||||||
static gem5Extension& getExtension(const tlm::tlm_generic_payload &payload);
|
getExtension(const tlm::tlm_generic_payload *payload);
|
||||||
|
static Gem5Extension&
|
||||||
|
getExtension(const tlm::tlm_generic_payload &payload);
|
||||||
PacketPtr getPacket();
|
PacketPtr getPacket();
|
||||||
|
|
||||||
private:
|
private:
|
||||||
PacketPtr Packet;
|
PacketPtr Packet;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -40,6 +40,9 @@
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
|
||||||
|
namespace Gem5SystemC
|
||||||
|
{
|
||||||
|
|
||||||
MemoryManager::MemoryManager(): numberOfAllocations(0), numberOfFrees(0)
|
MemoryManager::MemoryManager(): numberOfAllocations(0), numberOfFrees(0)
|
||||||
{
|
{
|
||||||
|
|
||||||
|
@ -72,3 +75,5 @@ MemoryManager::free(gp* payload)
|
||||||
payload->reset(); //clears all extensions
|
payload->reset(); //clears all extensions
|
||||||
freePayloads.push_back(payload);
|
freePayloads.push_back(payload);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
|
@ -34,13 +34,16 @@
|
||||||
* Matthias Jung
|
* Matthias Jung
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef MEMORYMANAGER_H_
|
#ifndef __SC_MM_HH__
|
||||||
#define MEMORYMANAGER_H_
|
#define __SC_MM_HH__
|
||||||
|
|
||||||
#include <tlm.h>
|
#include <tlm.h>
|
||||||
|
|
||||||
#include <vector>
|
#include <vector>
|
||||||
|
|
||||||
|
namespace Gem5SystemC
|
||||||
|
{
|
||||||
|
|
||||||
typedef tlm::tlm_generic_payload gp;
|
typedef tlm::tlm_generic_payload gp;
|
||||||
|
|
||||||
class MemoryManager : public tlm::tlm_mm_interface
|
class MemoryManager : public tlm::tlm_mm_interface
|
||||||
|
@ -57,4 +60,6 @@ class MemoryManager : public tlm::tlm_mm_interface
|
||||||
std::vector<gp*> freePayloads;
|
std::vector<gp*> freePayloads;
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* MEMORYMANAGER_H_ */
|
}
|
||||||
|
|
||||||
|
#endif /* __SC_MM_HH__ */
|
||||||
|
|
102
util/tlm/sc_peq.hh
Normal file
102
util/tlm/sc_peq.hh
Normal file
|
@ -0,0 +1,102 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are
|
||||||
|
* met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. Neither the name of the copyright holder nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||||
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
|
||||||
|
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||||
|
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||||
|
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* Authors: Matthias Jung
|
||||||
|
* Christian Menard
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef PAYLOAD_EVENT_H_
|
||||||
|
#define PAYLOAD_EVENT_H_
|
||||||
|
|
||||||
|
// TLM includes
|
||||||
|
#include <tlm.h>
|
||||||
|
|
||||||
|
// gem5 includes
|
||||||
|
#include <sim/eventq.hh>
|
||||||
|
|
||||||
|
namespace Gem5SystemC {
|
||||||
|
/**
|
||||||
|
* A 'Fake Payload Event Queue', similar to the TLM PEQs. This helps the
|
||||||
|
* transactors to schedule events in gem5.
|
||||||
|
*/
|
||||||
|
template <typename OWNER>
|
||||||
|
class PayloadEvent : public Event
|
||||||
|
{
|
||||||
|
public:
|
||||||
|
OWNER& port;
|
||||||
|
const std::string eventName;
|
||||||
|
void (OWNER::*handler)(PayloadEvent<OWNER>* pe,
|
||||||
|
tlm::tlm_generic_payload& trans,
|
||||||
|
const tlm::tlm_phase& phase);
|
||||||
|
|
||||||
|
protected:
|
||||||
|
tlm::tlm_generic_payload* t;
|
||||||
|
tlm::tlm_phase p;
|
||||||
|
|
||||||
|
void process() { (port.*handler)(this, *t, p); }
|
||||||
|
|
||||||
|
public:
|
||||||
|
const std::string name() const { return eventName; }
|
||||||
|
|
||||||
|
PayloadEvent(OWNER& port_,
|
||||||
|
void (OWNER::*handler_)(PayloadEvent<OWNER>* pe,
|
||||||
|
tlm::tlm_generic_payload& trans,
|
||||||
|
const tlm::tlm_phase& phase),
|
||||||
|
const std::string& event_name)
|
||||||
|
: port(port_)
|
||||||
|
, eventName(event_name)
|
||||||
|
, handler(handler_)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Schedule an event into gem5
|
||||||
|
void notify(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase,
|
||||||
|
const sc_core::sc_time& delay)
|
||||||
|
{
|
||||||
|
assert(!scheduled());
|
||||||
|
|
||||||
|
t = &trans;
|
||||||
|
p = phase;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Get time from SystemC as this will always be more up to date
|
||||||
|
* than gem5's
|
||||||
|
*/
|
||||||
|
Tick nextEventTick = sc_core::sc_time_stamp().value() + delay.value();
|
||||||
|
|
||||||
|
port.owner.wakeupEventQueue(nextEventTick);
|
||||||
|
port.owner.schedule(this, nextEventTick);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
|
@ -1,5 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2015, University of Kaiserslautern
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -31,6 +32,7 @@
|
||||||
*
|
*
|
||||||
* Authors: Matthias Jung
|
* Authors: Matthias Jung
|
||||||
* Abdul Mutaal Ahmad
|
* Abdul Mutaal Ahmad
|
||||||
|
* Christian Menard
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <cctype>
|
#include <cctype>
|
||||||
|
@ -40,7 +42,7 @@
|
||||||
#include "debug/ExternalPort.hh"
|
#include "debug/ExternalPort.hh"
|
||||||
#include "sc_ext.hh"
|
#include "sc_ext.hh"
|
||||||
#include "sc_mm.hh"
|
#include "sc_mm.hh"
|
||||||
#include "sc_port.hh"
|
#include "sc_slave_port.hh"
|
||||||
|
|
||||||
namespace Gem5SystemC
|
namespace Gem5SystemC
|
||||||
{
|
{
|
||||||
|
@ -78,7 +80,7 @@ packet2payload(PacketPtr packet, tlm::tlm_generic_payload &trans)
|
||||||
} else if (packet->isWrite()) {
|
} else if (packet->isWrite()) {
|
||||||
trans.set_command(tlm::TLM_WRITE_COMMAND);
|
trans.set_command(tlm::TLM_WRITE_COMMAND);
|
||||||
} else {
|
} else {
|
||||||
SC_REPORT_FATAL("transactor", "No R/W packet");
|
SC_REPORT_FATAL("SCSlavePort", "No R/W packet");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -86,10 +88,10 @@ packet2payload(PacketPtr packet, tlm::tlm_generic_payload &trans)
|
||||||
* Similar to TLM's blocking transport (LT)
|
* Similar to TLM's blocking transport (LT)
|
||||||
*/
|
*/
|
||||||
Tick
|
Tick
|
||||||
sc_transactor::recvAtomic(PacketPtr packet)
|
SCSlavePort::recvAtomic(PacketPtr packet)
|
||||||
{
|
{
|
||||||
CAUGHT_UP;
|
CAUGHT_UP;
|
||||||
SC_REPORT_INFO("transactor", "recvAtomic hasn't been tested much");
|
SC_REPORT_INFO("SCSlavePort", "recvAtomic hasn't been tested much");
|
||||||
|
|
||||||
panic_if(packet->cacheResponding(), "Should not see packets where cache "
|
panic_if(packet->cacheResponding(), "Should not see packets where cache "
|
||||||
"is responding");
|
"is responding");
|
||||||
|
@ -107,12 +109,12 @@ sc_transactor::recvAtomic(PacketPtr packet)
|
||||||
packet2payload(packet, *trans);
|
packet2payload(packet, *trans);
|
||||||
|
|
||||||
/* Attach the packet pointer to the TLM transaction to keep track */
|
/* Attach the packet pointer to the TLM transaction to keep track */
|
||||||
gem5Extension* extension = new gem5Extension(packet);
|
Gem5Extension* extension = new Gem5Extension(packet);
|
||||||
trans->set_auto_extension(extension);
|
trans->set_auto_extension(extension);
|
||||||
|
|
||||||
/* Execute b_transport: */
|
/* Execute b_transport: */
|
||||||
if (packet->cmd == MemCmd::SwapReq) {
|
if (packet->cmd == MemCmd::SwapReq) {
|
||||||
SC_REPORT_FATAL("transactor", "SwapReq not supported");
|
SC_REPORT_FATAL("SCSlavePort", "SwapReq not supported");
|
||||||
} else if (packet->isRead()) {
|
} else if (packet->isRead()) {
|
||||||
iSocket->b_transport(*trans, delay);
|
iSocket->b_transport(*trans, delay);
|
||||||
} else if (packet->isInvalidate()) {
|
} else if (packet->isInvalidate()) {
|
||||||
|
@ -120,7 +122,7 @@ sc_transactor::recvAtomic(PacketPtr packet)
|
||||||
} else if (packet->isWrite()) {
|
} else if (packet->isWrite()) {
|
||||||
iSocket->b_transport(*trans, delay);
|
iSocket->b_transport(*trans, delay);
|
||||||
} else {
|
} else {
|
||||||
SC_REPORT_FATAL("transactor", "Typo of request not supported");
|
SC_REPORT_FATAL("SCSlavePort", "Typo of request not supported");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (packet->needsResponse()) {
|
if (packet->needsResponse()) {
|
||||||
|
@ -136,7 +138,7 @@ sc_transactor::recvAtomic(PacketPtr packet)
|
||||||
* Similar to TLM's debug transport
|
* Similar to TLM's debug transport
|
||||||
*/
|
*/
|
||||||
void
|
void
|
||||||
sc_transactor::recvFunctional(PacketPtr packet)
|
SCSlavePort::recvFunctional(PacketPtr packet)
|
||||||
{
|
{
|
||||||
/* Prepare the transaction */
|
/* Prepare the transaction */
|
||||||
tlm::tlm_generic_payload * trans = mm.allocate();
|
tlm::tlm_generic_payload * trans = mm.allocate();
|
||||||
|
@ -144,38 +146,38 @@ sc_transactor::recvFunctional(PacketPtr packet)
|
||||||
packet2payload(packet, *trans);
|
packet2payload(packet, *trans);
|
||||||
|
|
||||||
/* Attach the packet pointer to the TLM transaction to keep track */
|
/* Attach the packet pointer to the TLM transaction to keep track */
|
||||||
gem5Extension* extension = new gem5Extension(packet);
|
Gem5Extension* extension = new Gem5Extension(packet);
|
||||||
trans->set_auto_extension(extension);
|
trans->set_auto_extension(extension);
|
||||||
|
|
||||||
/* Execute Debug Transport: */
|
/* Execute Debug Transport: */
|
||||||
unsigned int bytes = iSocket->transport_dbg(*trans);
|
unsigned int bytes = iSocket->transport_dbg(*trans);
|
||||||
if (bytes != trans->get_data_length()) {
|
if (bytes != trans->get_data_length()) {
|
||||||
SC_REPORT_FATAL("transactor","debug transport was not completed");
|
SC_REPORT_FATAL("SCSlavePort","debug transport was not completed");
|
||||||
}
|
}
|
||||||
|
|
||||||
trans->release();
|
trans->release();
|
||||||
}
|
}
|
||||||
|
|
||||||
bool
|
bool
|
||||||
sc_transactor::recvTimingSnoopResp(PacketPtr packet)
|
SCSlavePort::recvTimingSnoopResp(PacketPtr packet)
|
||||||
{
|
{
|
||||||
/* Snooping should be implemented with tlm_dbg_transport */
|
/* Snooping should be implemented with tlm_dbg_transport */
|
||||||
SC_REPORT_FATAL("transactor","unimplemented func.: recvTimingSnoopResp");
|
SC_REPORT_FATAL("SCSlavePort","unimplemented func.: recvTimingSnoopResp");
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
sc_transactor::recvFunctionalSnoop(PacketPtr packet)
|
SCSlavePort::recvFunctionalSnoop(PacketPtr packet)
|
||||||
{
|
{
|
||||||
/* Snooping should be implemented with tlm_dbg_transport */
|
/* Snooping should be implemented with tlm_dbg_transport */
|
||||||
SC_REPORT_FATAL("transactor","unimplemented func.: recvFunctionalSnoop");
|
SC_REPORT_FATAL("SCSlavePort","unimplemented func.: recvFunctionalSnoop");
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Similar to TLM's non-blocking transport (AT)
|
* Similar to TLM's non-blocking transport (AT)
|
||||||
*/
|
*/
|
||||||
bool
|
bool
|
||||||
sc_transactor::recvTimingReq(PacketPtr packet)
|
SCSlavePort::recvTimingReq(PacketPtr packet)
|
||||||
{
|
{
|
||||||
CAUGHT_UP;
|
CAUGHT_UP;
|
||||||
|
|
||||||
|
@ -213,7 +215,7 @@ sc_transactor::recvTimingReq(PacketPtr packet)
|
||||||
packet2payload(packet, *trans);
|
packet2payload(packet, *trans);
|
||||||
|
|
||||||
/* Attach the packet pointer to the TLM transaction to keep track */
|
/* Attach the packet pointer to the TLM transaction to keep track */
|
||||||
gem5Extension* extension = new gem5Extension(packet);
|
Gem5Extension* extension = new Gem5Extension(packet);
|
||||||
trans->set_auto_extension(extension);
|
trans->set_auto_extension(extension);
|
||||||
|
|
||||||
/* Starting TLM non-blocking sequence (AT) Refer to IEEE1666-2011 SystemC
|
/* Starting TLM non-blocking sequence (AT) Refer to IEEE1666-2011 SystemC
|
||||||
|
@ -231,9 +233,9 @@ sc_transactor::recvTimingReq(PacketPtr packet)
|
||||||
/* The Timing annotation must be honored: */
|
/* The Timing annotation must be honored: */
|
||||||
sc_assert(phase == tlm::END_REQ || phase == tlm::BEGIN_RESP);
|
sc_assert(phase == tlm::END_REQ || phase == tlm::BEGIN_RESP);
|
||||||
|
|
||||||
payloadEvent<sc_transactor> * pe;
|
PayloadEvent<SCSlavePort> * pe;
|
||||||
pe = new payloadEvent<sc_transactor>(*this,
|
pe = new PayloadEvent<SCSlavePort>(*this,
|
||||||
&sc_transactor::pec, "PEQ");
|
&SCSlavePort::pec, "PEQ");
|
||||||
pe->notify(*trans, phase, delay);
|
pe->notify(*trans, phase, delay);
|
||||||
} else if (status == tlm::TLM_COMPLETED) {
|
} else if (status == tlm::TLM_COMPLETED) {
|
||||||
/* Transaction is over nothing has do be done. */
|
/* Transaction is over nothing has do be done. */
|
||||||
|
@ -245,8 +247,8 @@ sc_transactor::recvTimingReq(PacketPtr packet)
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
sc_transactor::pec(
|
SCSlavePort::pec(
|
||||||
sc_transactor::payloadEvent<sc_transactor> * pe,
|
PayloadEvent<SCSlavePort> * pe,
|
||||||
tlm::tlm_generic_payload& trans,
|
tlm::tlm_generic_payload& trans,
|
||||||
const tlm::tlm_phase& phase)
|
const tlm::tlm_phase& phase)
|
||||||
{
|
{
|
||||||
|
@ -267,7 +269,7 @@ sc_transactor::pec(
|
||||||
{
|
{
|
||||||
CAUGHT_UP;
|
CAUGHT_UP;
|
||||||
|
|
||||||
PacketPtr packet = gem5Extension::getExtension(trans).getPacket();
|
PacketPtr packet = Gem5Extension::getExtension(trans).getPacket();
|
||||||
|
|
||||||
sc_assert(!blockingResponse);
|
sc_assert(!blockingResponse);
|
||||||
|
|
||||||
|
@ -292,13 +294,13 @@ sc_transactor::pec(
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
SC_REPORT_FATAL("transactor", "Invalid protocol phase in pec");
|
SC_REPORT_FATAL("SCSlavePort", "Invalid protocol phase in pec");
|
||||||
}
|
}
|
||||||
delete pe;
|
delete pe;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
sc_transactor::recvRespRetry()
|
SCSlavePort::recvRespRetry()
|
||||||
{
|
{
|
||||||
CAUGHT_UP;
|
CAUGHT_UP;
|
||||||
|
|
||||||
|
@ -307,7 +309,7 @@ sc_transactor::recvRespRetry()
|
||||||
|
|
||||||
tlm::tlm_generic_payload *trans = blockingResponse;
|
tlm::tlm_generic_payload *trans = blockingResponse;
|
||||||
blockingResponse = NULL;
|
blockingResponse = NULL;
|
||||||
PacketPtr packet = gem5Extension::getExtension(trans).getPacket();
|
PacketPtr packet = Gem5Extension::getExtension(trans).getPacket();
|
||||||
|
|
||||||
bool need_retry = !iSocket.sendTimingResp(packet);
|
bool need_retry = !iSocket.sendTimingResp(packet);
|
||||||
|
|
||||||
|
@ -321,24 +323,24 @@ sc_transactor::recvRespRetry()
|
||||||
}
|
}
|
||||||
|
|
||||||
tlm::tlm_sync_enum
|
tlm::tlm_sync_enum
|
||||||
sc_transactor::nb_transport_bw(tlm::tlm_generic_payload& trans,
|
SCSlavePort::nb_transport_bw(tlm::tlm_generic_payload& trans,
|
||||||
tlm::tlm_phase& phase,
|
tlm::tlm_phase& phase,
|
||||||
sc_core::sc_time& delay)
|
sc_core::sc_time& delay)
|
||||||
{
|
{
|
||||||
payloadEvent<sc_transactor> * pe;
|
PayloadEvent<SCSlavePort> * pe;
|
||||||
pe = new payloadEvent<sc_transactor>(*this, &sc_transactor::pec, "PE");
|
pe = new PayloadEvent<SCSlavePort>(*this, &SCSlavePort::pec, "PE");
|
||||||
pe->notify(trans, phase, delay);
|
pe->notify(trans, phase, delay);
|
||||||
return tlm::TLM_ACCEPTED;
|
return tlm::TLM_ACCEPTED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
sc_transactor::invalidate_direct_mem_ptr(sc_dt::uint64 start_range,
|
SCSlavePort::invalidate_direct_mem_ptr(sc_dt::uint64 start_range,
|
||||||
sc_dt::uint64 end_range)
|
sc_dt::uint64 end_range)
|
||||||
{
|
{
|
||||||
SC_REPORT_FATAL("transactor", "unimpl. func: invalidate_direct_mem_ptr");
|
SC_REPORT_FATAL("SCSlavePort", "unimpl. func: invalidate_direct_mem_ptr");
|
||||||
}
|
}
|
||||||
|
|
||||||
sc_transactor::sc_transactor(const std::string &name_,
|
SCSlavePort::SCSlavePort(const std::string &name_,
|
||||||
const std::string &systemc_name,
|
const std::string &systemc_name,
|
||||||
ExternalSlave &owner_) :
|
ExternalSlave &owner_) :
|
||||||
tlm::tlm_initiator_socket<>(systemc_name.c_str()),
|
tlm::tlm_initiator_socket<>(systemc_name.c_str()),
|
||||||
|
@ -351,7 +353,7 @@ sc_transactor::sc_transactor(const std::string &name_,
|
||||||
m_export.bind(*this);
|
m_export.bind(*this);
|
||||||
}
|
}
|
||||||
|
|
||||||
class sc_transactorHandler : public ExternalSlave::Handler
|
class SlavePortHandler : public ExternalSlave::Handler
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
ExternalSlave::Port *getExternalPort(const std::string &name,
|
ExternalSlave::Port *getExternalPort(const std::string &name,
|
||||||
|
@ -359,14 +361,14 @@ class sc_transactorHandler : public ExternalSlave::Handler
|
||||||
const std::string &port_data)
|
const std::string &port_data)
|
||||||
{
|
{
|
||||||
// This will make a new initiatiator port
|
// This will make a new initiatiator port
|
||||||
return new sc_transactor(name, port_data, owner);
|
return new SCSlavePort(name, port_data, owner);
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
void
|
void
|
||||||
registerSCPorts()
|
SCSlavePort::registerPortHandler()
|
||||||
{
|
{
|
||||||
ExternalSlave::registerHandler("tlm", new sc_transactorHandler);
|
ExternalSlave::registerHandler("tlm_slave", new SlavePortHandler);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
|
@ -1,5 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2015, University of Kaiserslautern
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -30,10 +31,11 @@
|
||||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
* Authors: Matthias Jung
|
* Authors: Matthias Jung
|
||||||
|
* Christian Menard
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __SIM_SC_TRANSACTOR_HH__
|
#ifndef __SC_SLAVE_PORT_HH__
|
||||||
#define __SIM_SC_TRANSACTOR_HH__
|
#define __SC_SLAVE_PORT_HH__
|
||||||
|
|
||||||
#include <tlm_utils/simple_initiator_socket.h>
|
#include <tlm_utils/simple_initiator_socket.h>
|
||||||
|
|
||||||
|
@ -44,6 +46,7 @@
|
||||||
#include "mem/external_slave.hh"
|
#include "mem/external_slave.hh"
|
||||||
#include "sc_mm.hh"
|
#include "sc_mm.hh"
|
||||||
#include "sc_module.hh"
|
#include "sc_module.hh"
|
||||||
|
#include "sc_peq.hh"
|
||||||
|
|
||||||
namespace Gem5SystemC
|
namespace Gem5SystemC
|
||||||
{
|
{
|
||||||
|
@ -54,74 +57,26 @@ namespace Gem5SystemC
|
||||||
assert(curTick() == sc_core::sc_time_stamp().value()); \
|
assert(curTick() == sc_core::sc_time_stamp().value()); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
/**
|
||||||
class sc_transactor : public tlm::tlm_initiator_socket<>,
|
* This is a gem5 slave port that translates gem5 packets to TLM transactions.
|
||||||
|
*
|
||||||
|
* Upon receiving a packet (recvAtomic, recvTiningReq, recvFunctional) the port
|
||||||
|
* creates a new TLM payload and initializes it with information from the gem5
|
||||||
|
* packet. The original packet is added as an extension to the TLM payload.
|
||||||
|
* Then the port issues a TLM transaction in the SystemC world. By storing the
|
||||||
|
* original packet as a payload extension, the packet can be restored and send
|
||||||
|
* back to the gem5 world upon receiving a response from the SystemC world.
|
||||||
|
*/
|
||||||
|
class SCSlavePort : public tlm::tlm_initiator_socket<>,
|
||||||
public tlm::tlm_bw_transport_if<>,
|
public tlm::tlm_bw_transport_if<>,
|
||||||
public ExternalSlave::Port
|
public ExternalSlave::Port
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
sc_transactor &iSocket;
|
SCSlavePort &iSocket;
|
||||||
|
|
||||||
/**
|
|
||||||
* A 'Fake Payload Event Queue', similar to the TLM PEQs. This will help
|
|
||||||
* that gem5 behaves like a normal TLM Initiator
|
|
||||||
*/
|
|
||||||
template<typename OWNER>
|
|
||||||
class payloadEvent : public Event
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
OWNER &port;
|
|
||||||
const std::string eventName;
|
|
||||||
void (OWNER::* handler)(payloadEvent<OWNER> * pe,
|
|
||||||
tlm::tlm_generic_payload& trans,
|
|
||||||
const tlm::tlm_phase &phase);
|
|
||||||
|
|
||||||
protected:
|
|
||||||
tlm::tlm_generic_payload *t;
|
|
||||||
tlm::tlm_phase p;
|
|
||||||
|
|
||||||
void process() { (port.*handler)(this,*t, p); }
|
|
||||||
|
|
||||||
public:
|
|
||||||
const std::string name() const { return eventName; }
|
|
||||||
|
|
||||||
payloadEvent(
|
|
||||||
OWNER &port_,
|
|
||||||
void (OWNER::* handler_)(payloadEvent<OWNER> * pe,
|
|
||||||
tlm::tlm_generic_payload& trans,
|
|
||||||
const tlm::tlm_phase &phase),
|
|
||||||
const std::string &event_name) :
|
|
||||||
port(port_),
|
|
||||||
eventName(event_name),
|
|
||||||
handler(handler_)
|
|
||||||
{ }
|
|
||||||
|
|
||||||
/// Schedule an event into gem5
|
|
||||||
void
|
|
||||||
notify(tlm::tlm_generic_payload& trans,
|
|
||||||
const tlm::tlm_phase &phase,
|
|
||||||
const sc_core::sc_time& delay)
|
|
||||||
{
|
|
||||||
assert(!scheduled());
|
|
||||||
|
|
||||||
t = &trans;
|
|
||||||
p = phase;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Get time from SystemC as this will alway be more up to date
|
|
||||||
* than gem5's
|
|
||||||
*/
|
|
||||||
Tick nextEventTick = sc_core::sc_time_stamp().value()
|
|
||||||
+ delay.value();
|
|
||||||
|
|
||||||
port.owner.wakeupEventQueue(nextEventTick);
|
|
||||||
port.owner.schedule(this, nextEventTick);
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
/** One instance of pe and the related callback needed */
|
/** One instance of pe and the related callback needed */
|
||||||
//payloadEvent<sc_transactor> pe;
|
//payloadEvent<SCSlavePort> pe;
|
||||||
void pec(payloadEvent<sc_transactor> * pe,
|
void pec(PayloadEvent<SCSlavePort> * pe,
|
||||||
tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase);
|
tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -160,15 +115,15 @@ class sc_transactor : public tlm::tlm_initiator_socket<>,
|
||||||
sc_dt::uint64 end_range);
|
sc_dt::uint64 end_range);
|
||||||
|
|
||||||
public:
|
public:
|
||||||
sc_transactor(const std::string &name_,
|
SCSlavePort(const std::string &name_,
|
||||||
const std::string &systemc_name,
|
const std::string &systemc_name,
|
||||||
ExternalSlave &owner_);
|
ExternalSlave &owner_);
|
||||||
|
|
||||||
|
static void registerPortHandler();
|
||||||
|
|
||||||
|
friend PayloadEvent<SCSlavePort>;
|
||||||
};
|
};
|
||||||
|
|
||||||
void registerPort(const std::string &name, Port &port);
|
|
||||||
|
|
||||||
void registerSCPorts();
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif // __SIM_SC_PORT_HH__
|
#endif // __SC_SLAVE_PORT_H__
|
|
@ -1,5 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2015, University of Kaiserslautern
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
@ -31,6 +32,7 @@
|
||||||
*
|
*
|
||||||
* Authors: Matthias Jung
|
* Authors: Matthias Jung
|
||||||
* Abdul Mutaal Ahmad
|
* Abdul Mutaal Ahmad
|
||||||
|
* Christian Menard
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -41,87 +43,41 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <tlm_utils/simple_target_socket.h>
|
|
||||||
|
|
||||||
#include <cstdlib>
|
|
||||||
#include <iomanip>
|
|
||||||
#include <iostream>
|
|
||||||
#include <sstream>
|
|
||||||
#include <systemc>
|
#include <systemc>
|
||||||
#include <tlm>
|
#include <tlm>
|
||||||
#include <typeinfo>
|
|
||||||
|
|
||||||
#include "base/statistics.hh"
|
#include "sc_slave_port.hh"
|
||||||
#include "base/str.hh"
|
|
||||||
#include "base/trace.hh"
|
|
||||||
#include "cpu/base.hh"
|
|
||||||
#include "sc_logger.hh"
|
|
||||||
#include "sc_module.hh"
|
|
||||||
#include "sc_port.hh"
|
|
||||||
#include "sc_target.hh"
|
|
||||||
#include "sim/cxx_config_ini.hh"
|
#include "sim/cxx_config_ini.hh"
|
||||||
#include "sim/cxx_manager.hh"
|
|
||||||
#include "sim/init_signals.hh"
|
#include "sim/init_signals.hh"
|
||||||
#include "sim/serialize.hh"
|
|
||||||
#include "sim/simulate.hh"
|
|
||||||
#include "sim/stat_control.hh"
|
#include "sim/stat_control.hh"
|
||||||
#include "sim/system.hh"
|
#include "sim_control.hh"
|
||||||
#include "stats.hh"
|
#include "stats.hh"
|
||||||
|
|
||||||
// Defining global string variable decalred in stats.hh
|
void
|
||||||
std::string filename;
|
usage(const std::string& prog_name)
|
||||||
|
|
||||||
void usage(const std::string &prog_name)
|
|
||||||
{
|
{
|
||||||
std::cerr << "Usage: " << prog_name << (
|
std::cerr
|
||||||
" <config_file.ini> [ <option> ]\n\n"
|
<< "Usage: " << prog_name
|
||||||
"OPTIONS:\n"
|
<< (" <config_file.ini> [ <option> ]\n\n"
|
||||||
|
"OPTIONS:\n"
|
||||||
|
|
||||||
" -o <offset> -- set memory offset\n"
|
" -o <offset> -- set memory offset\n"
|
||||||
" -p <object> <param> <value> -- set a parameter\n"
|
" -p <object> <param> <value> -- set a parameter\n"
|
||||||
" -v <object> <param> <values> -- set a vector parameter from a\n"
|
" -v <object> <param> <values> -- set a vector parameter from a\n"
|
||||||
" comma separated values string\n"
|
" comma separated values string\n"
|
||||||
" -d <flag> -- set a debug flag\n"
|
" -d <flag> -- set a debug flag\n"
|
||||||
" (-<flag> clear a flag)\n"
|
" (-<flag> clear a flag)\n"
|
||||||
" -D -- debug on\n"
|
" -D -- debug on\n"
|
||||||
" -e <ticks> -- end of simulation after a \n"
|
" -e <ticks> -- end of simulation after a \n"
|
||||||
" given number of ticks\n"
|
" given number of ticks\n"
|
||||||
"\n"
|
"\n");
|
||||||
);
|
|
||||||
std::exit(EXIT_FAILURE);
|
std::exit(EXIT_FAILURE);
|
||||||
}
|
}
|
||||||
|
|
||||||
class SimControl : public Gem5SystemC::Module
|
SimControl::SimControl(sc_core::sc_module_name name, int argc_, char** argv_)
|
||||||
{
|
: Gem5SystemC::Module(name),
|
||||||
protected:
|
argc(argc_),
|
||||||
int argc;
|
argv(argv_)
|
||||||
char **argv;
|
|
||||||
CxxConfigManager *config_manager;
|
|
||||||
Gem5SystemC::Logger logger;
|
|
||||||
|
|
||||||
Tick sim_end;
|
|
||||||
bool debug;
|
|
||||||
unsigned int offset;
|
|
||||||
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(SimControl);
|
|
||||||
|
|
||||||
SimControl(sc_core::sc_module_name name, int argc_, char **argv_);
|
|
||||||
|
|
||||||
void before_end_of_elaboration();
|
|
||||||
|
|
||||||
bool getDebugFlag() { return debug; }
|
|
||||||
|
|
||||||
unsigned int getOffset() { return offset; }
|
|
||||||
|
|
||||||
void run();
|
|
||||||
};
|
|
||||||
|
|
||||||
SimControl::SimControl(sc_core::sc_module_name name,
|
|
||||||
int argc_,
|
|
||||||
char **argv_) : Gem5SystemC::Module(name),
|
|
||||||
argc(argc_),
|
|
||||||
argv(argv_)
|
|
||||||
{
|
{
|
||||||
SC_THREAD(run);
|
SC_THREAD(run);
|
||||||
|
|
||||||
|
@ -133,7 +89,7 @@ SimControl::SimControl(sc_core::sc_module_name name,
|
||||||
}
|
}
|
||||||
|
|
||||||
cxxConfigInit();
|
cxxConfigInit();
|
||||||
Gem5SystemC::registerSCPorts();
|
Gem5SystemC::SCSlavePort::registerPortHandler();
|
||||||
|
|
||||||
Trace::setDebugLogger(&logger);
|
Trace::setDebugLogger(&logger);
|
||||||
|
|
||||||
|
@ -268,64 +224,3 @@ SimControl::run()
|
||||||
config_manager->deleteObjects();
|
config_manager->deleteObjects();
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
reportHandler(const sc_core::sc_report &report,
|
|
||||||
const sc_core::sc_actions &actions)
|
|
||||||
{
|
|
||||||
uint64_t systemc_time = report.get_time().value();
|
|
||||||
uint64_t gem5_time = curTick();
|
|
||||||
|
|
||||||
std::cerr << report.get_time();
|
|
||||||
|
|
||||||
if (gem5_time < systemc_time) {
|
|
||||||
std::cerr << " (<) ";
|
|
||||||
} else if (gem5_time > systemc_time) {
|
|
||||||
std::cerr << " (!) ";
|
|
||||||
} else {
|
|
||||||
std::cerr << " (=) ";
|
|
||||||
}
|
|
||||||
|
|
||||||
std::cerr << ": " << report.get_msg_type()
|
|
||||||
<< ' ' << report.get_msg() << '\n';
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
int
|
|
||||||
sc_main(int argc, char **argv)
|
|
||||||
{
|
|
||||||
sc_core::sc_report_handler::set_handler(reportHandler);
|
|
||||||
|
|
||||||
SimControl sim_control("gem5", argc, argv);
|
|
||||||
Target *memory;
|
|
||||||
|
|
||||||
filename = "m5out/stats-tlm.txt";
|
|
||||||
|
|
||||||
tlm::tlm_initiator_socket <> *mem_port =
|
|
||||||
dynamic_cast<tlm::tlm_initiator_socket<> *>(
|
|
||||||
sc_core::sc_find_object("gem5.memory")
|
|
||||||
);
|
|
||||||
|
|
||||||
if (mem_port) {
|
|
||||||
SC_REPORT_INFO("sc_main", "Port Found");
|
|
||||||
unsigned long long int size = 512*1024*1024ULL;
|
|
||||||
memory = new Target("memory",
|
|
||||||
sim_control.getDebugFlag(),
|
|
||||||
size,
|
|
||||||
sim_control.getOffset());
|
|
||||||
|
|
||||||
memory->socket.bind(*mem_port);
|
|
||||||
} else {
|
|
||||||
SC_REPORT_FATAL("sc_main", "Port Not Found");
|
|
||||||
std::exit(EXIT_FAILURE);
|
|
||||||
}
|
|
||||||
|
|
||||||
sc_core::sc_start();
|
|
||||||
|
|
||||||
SC_REPORT_INFO("sc_main", "End of Simulation");
|
|
||||||
|
|
||||||
CxxConfig::statsDump();
|
|
||||||
|
|
||||||
return EXIT_SUCCESS;
|
|
||||||
}
|
|
76
util/tlm/sim_control.hh
Normal file
76
util/tlm/sim_control.hh
Normal file
|
@ -0,0 +1,76 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015, University of Kaiserslautern
|
||||||
|
* Copyright (c) 2016, Dresden University of Technology (TU Dresden)
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are
|
||||||
|
* met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
*
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
*
|
||||||
|
* 3. Neither the name of the copyright holder nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||||
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
|
||||||
|
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||||
|
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||||
|
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* Authors: Matthias Jung
|
||||||
|
* Christian Menard
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __SC_SIM_CONTROL_HH__
|
||||||
|
#define __SC_SIM_CONTROL_HH__
|
||||||
|
|
||||||
|
#include <tlm_utils/simple_target_socket.h>
|
||||||
|
|
||||||
|
#include <systemc>
|
||||||
|
#include <tlm>
|
||||||
|
|
||||||
|
#include "sc_logger.hh"
|
||||||
|
#include "sc_module.hh"
|
||||||
|
#include "sim/cxx_manager.hh"
|
||||||
|
#include "sim/system.hh"
|
||||||
|
|
||||||
|
class SimControl : public Gem5SystemC::Module
|
||||||
|
{
|
||||||
|
protected:
|
||||||
|
int argc;
|
||||||
|
char** argv;
|
||||||
|
CxxConfigManager* config_manager;
|
||||||
|
Gem5SystemC::Logger logger;
|
||||||
|
|
||||||
|
Tick sim_end;
|
||||||
|
bool debug;
|
||||||
|
unsigned int offset;
|
||||||
|
|
||||||
|
public:
|
||||||
|
SC_HAS_PROCESS(SimControl);
|
||||||
|
|
||||||
|
SimControl(sc_core::sc_module_name name, int argc_, char** argv_);
|
||||||
|
|
||||||
|
void before_end_of_elaboration();
|
||||||
|
|
||||||
|
bool getDebugFlag() { return debug; }
|
||||||
|
|
||||||
|
unsigned int getOffset() { return offset; }
|
||||||
|
|
||||||
|
void run();
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
Loading…
Reference in a new issue