Get rid of the ParamContext for pseudo instructions and move
the parameters to the BaseCPU object. --HG-- extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
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cc77304676
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b16e559177
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@ -155,6 +155,10 @@ class BaseCPU : public MemObject
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int cpu_id;
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#if FULL_SYSTEM
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Tick profile;
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bool do_statistics_insts;
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bool do_checkpoint_insts;
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bool do_quiesce;
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#endif
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Tick progress_interval;
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BaseCPU *checker;
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@ -57,6 +57,10 @@ Param<int> cpu_id;
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SimObjectParam<AlphaISA::ITB *> itb;
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SimObjectParam<AlphaISA::DTB *> dtb;
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Param<Tick> profile;
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Param<bool> do_quiesce;
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Param<bool> do_checkpoint_insts;
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Param<bool> do_statistics_insts;
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#else
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SimObjectVectorParam<Process *> workload;
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#endif // FULL_SYSTEM
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@ -163,6 +167,10 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU)
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INIT_PARAM(itb, "Instruction translation buffer"),
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INIT_PARAM(dtb, "Data translation buffer"),
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INIT_PARAM(profile, ""),
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INIT_PARAM(do_quiesce, ""),
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INIT_PARAM(do_checkpoint_insts, ""),
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INIT_PARAM(do_statistics_insts, ""),
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#else
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INIT_PARAM(workload, "Processes to run"),
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#endif // FULL_SYSTEM
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@ -306,6 +314,10 @@ CREATE_SIM_OBJECT(DerivO3CPU)
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params->itb = itb;
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params->dtb = dtb;
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params->profile = profile;
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params->do_quiesce = do_quiesce;
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params->do_checkpoint_insts = do_checkpoint_insts;
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params->do_statistics_insts = do_statistics_insts;
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#else
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params->workload = workload;
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#endif // FULL_SYSTEM
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@ -64,6 +64,10 @@ Param<int> cpu_id;
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SimObjectParam<TheISA::ITB *> itb;
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SimObjectParam<TheISA::DTB *> dtb;
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Param<Tick> profile;
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Param<bool> do_quiesce;
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Param<bool> do_checkpoint_insts;
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Param<bool> do_statistics_insts
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#else
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SimObjectVectorParam<Process *> workload;
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//SimObjectParam<PageTable *> page_table;
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@ -184,6 +188,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivOzoneCPU)
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INIT_PARAM(itb, "Instruction translation buffer"),
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INIT_PARAM(dtb, "Data translation buffer"),
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INIT_PARAM(profile, ""),
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INIT_PARAM(do_quiesce, ""),
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INIT_PARAM(do_checkpoint_insts, ""),
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INIT_PARAM(do_statistics_insts, ""),
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#else
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INIT_PARAM(workload, "Processes to run"),
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// INIT_PARAM(page_table, "Page table"),
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@ -341,6 +348,9 @@ CREATE_SIM_OBJECT(DerivOzoneCPU)
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params->itb = itb;
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params->dtb = dtb;
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params->profile = profile;
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params->do_quiesce = do_quiesce;
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params->do_checkpoint_insts = do_checkpoint_insts;
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params->do_statistics_insts = do_statistics_insts;
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#else
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params->workload = workload;
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// params->pTable = page_table;
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@ -500,6 +500,10 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
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SimObjectParam<TheISA::ITB *> itb;
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SimObjectParam<TheISA::DTB *> dtb;
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Param<Tick> profile;
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Param<bool> do_quiesce;
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Param<bool> do_checkpoint_insts;
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Param<bool> do_statistics_insts;
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#else
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SimObjectParam<Process *> workload;
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#endif // FULL_SYSTEM
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@ -532,6 +536,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
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INIT_PARAM(itb, "Instruction TLB"),
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INIT_PARAM(dtb, "Data TLB"),
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INIT_PARAM(profile, ""),
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INIT_PARAM(do_quiesce, ""),
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INIT_PARAM(do_checkpoint_insts, ""),
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INIT_PARAM(do_statistics_insts, ""),
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#else
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INIT_PARAM(workload, "processes to run"),
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#endif // FULL_SYSTEM
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@ -569,6 +576,9 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU)
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params->itb = itb;
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params->dtb = dtb;
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params->profile = profile;
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params->do_quiesce = do_quiesce;
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params->do_checkpoint_insts = do_checkpoint_insts;
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params->do_statistics_insts = do_statistics_insts;
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#else
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params->process = workload;
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#endif
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@ -665,6 +665,10 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TimingSimpleCPU)
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SimObjectParam<TheISA::ITB *> itb;
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SimObjectParam<TheISA::DTB *> dtb;
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Param<Tick> profile;
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Param<bool> do_quiesce;
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Param<bool> do_checkpoint_insts;
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Param<bool> do_statistics_insts;
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#else
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SimObjectParam<Process *> workload;
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#endif // FULL_SYSTEM
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@ -697,6 +701,9 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TimingSimpleCPU)
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INIT_PARAM(itb, "Instruction TLB"),
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INIT_PARAM(dtb, "Data TLB"),
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INIT_PARAM(profile, ""),
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INIT_PARAM(do_quiesce, ""),
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INIT_PARAM(do_checkpoint_insts, ""),
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INIT_PARAM(do_statistics_insts, ""),
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#else
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INIT_PARAM(workload, "processes to run"),
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#endif // FULL_SYSTEM
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@ -732,6 +739,9 @@ CREATE_SIM_OBJECT(TimingSimpleCPU)
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params->itb = itb;
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params->dtb = dtb;
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params->profile = profile;
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params->do_quiesce = do_quiesce;
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params->do_checkpoint_insts = do_checkpoint_insts;
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params->do_statistics_insts = do_statistics_insts;
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#else
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params->process = workload;
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#endif
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@ -15,6 +15,12 @@ class BaseCPU(SimObject):
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cpu_id = Param.Int("CPU identifier")
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if build_env['FULL_SYSTEM']:
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do_qiesce = Param.Bool(True, "enable quiesce instructions")
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do_checkpoint_insts = Param.Bool(True,
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"enable checkpoint pseudo instructions")
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do_statistics_insts = Param.Bool(True,
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"enable statistics pseudo instructions")
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if build_env['TARGET_ISA'] == 'sparc':
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dtb = Param.SparcDTB(SparcDTB(), "Data TLB")
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itb = Param.SparcITB(SparcITB(), "Instruction TLB")
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@ -40,7 +40,6 @@
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#include "cpu/thread_context.hh"
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#include "cpu/quiesce_event.hh"
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#include "arch/kernel_stats.hh"
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#include "sim/param.hh"
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#include "sim/pseudo_inst.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_exit.hh"
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@ -57,10 +56,6 @@ using namespace TheISA;
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namespace AlphaPseudo
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{
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bool doStatisticsInsts;
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bool doCheckpointInsts;
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bool doQuiesce;
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void
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arm(ThreadContext *tc)
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{
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@ -71,7 +66,7 @@ namespace AlphaPseudo
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void
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quiesce(ThreadContext *tc)
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{
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if (!doQuiesce)
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if (!tc->getCpuPtr()->params->do_quiesce)
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return;
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DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
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@ -84,7 +79,7 @@ namespace AlphaPseudo
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void
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quiesceNs(ThreadContext *tc, uint64_t ns)
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{
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if (!doQuiesce || ns == 0)
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if (!tc->getCpuPtr()->params->do_quiesce || ns == 0)
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return;
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EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
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@ -107,7 +102,7 @@ namespace AlphaPseudo
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void
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quiesceCycles(ThreadContext *tc, uint64_t cycles)
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{
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if (!doQuiesce || cycles == 0)
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if (!tc->getCpuPtr()->params->do_quiesce || cycles == 0)
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return;
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EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
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@ -197,7 +192,7 @@ namespace AlphaPseudo
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void
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resetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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if (!tc->getCpuPtr()->params->do_statistics_insts)
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return;
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@ -211,7 +206,7 @@ namespace AlphaPseudo
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void
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dumpstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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if (!tc->getCpuPtr()->params->do_statistics_insts)
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return;
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@ -252,7 +247,7 @@ namespace AlphaPseudo
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void
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dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!doStatisticsInsts)
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if (!tc->getCpuPtr()->params->do_statistics_insts)
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return;
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@ -266,7 +261,7 @@ namespace AlphaPseudo
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void
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m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
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{
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if (!doCheckpointInsts)
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if (!tc->getCpuPtr()->params->do_checkpoint_insts)
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return;
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Tick when = curTick + delay * Clock::Int::ns;
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@ -278,7 +273,7 @@ namespace AlphaPseudo
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uint64_t
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readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
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{
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const string &file = tc->getCpuPtr()->system->params()->readfile;
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const string &file = tc->getSystemPtr()->params()->readfile;
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if (file.empty()) {
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return ULL(0);
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}
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@ -310,33 +305,6 @@ namespace AlphaPseudo
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return result;
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}
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class Context : public ParamContext
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{
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public:
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Context(const string §ion) : ParamContext(section) {}
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void checkParams();
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};
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Context context("pseudo_inst");
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Param<bool> __quiesce(&context, "quiesce",
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"enable quiesce instructions",
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true);
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Param<bool> __statistics(&context, "statistics",
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"enable statistics pseudo instructions",
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true);
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Param<bool> __checkpoint(&context, "checkpoint",
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"enable checkpoint pseudo instructions",
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true);
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void
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Context::checkParams()
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{
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doQuiesce = __quiesce;
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doStatisticsInsts = __statistics;
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doCheckpointInsts = __checkpoint;
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}
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void debugbreak(ThreadContext *tc)
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{
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debug_break();
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