ARM: Add a register, immediate, immediate to register base for [su]bfx.

This commit is contained in:
Gabe Black 2010-06-02 12:58:08 -05:00
parent 504ac6518b
commit b1158e4938
3 changed files with 56 additions and 0 deletions

View file

@ -196,6 +196,18 @@ RegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
return ss.str();
}
std::string
RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);
printReg(ss, dest);
ss << ", ";
printReg(ss, op1);
ccprintf(ss, ", #%d, #%d", imm1, imm2);
return ss.str();
}
std::string
RegImmRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{

View file

@ -176,6 +176,24 @@ class RegRegRegOp : public PredOp
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
class RegRegImmImmOp : public PredOp
{
protected:
IntRegIndex dest;
IntRegIndex op1;
uint32_t imm1;
uint32_t imm2;
RegRegImmImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
IntRegIndex _dest, IntRegIndex _op1,
uint32_t _imm1, uint32_t _imm2) :
PredOp(mnem, _machInst, __opClass),
dest(_dest), op1(_op1), imm1(_imm1), imm2(_imm2)
{}
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
class RegImmRegShiftOp : public PredOp
{
protected:

View file

@ -196,6 +196,32 @@ def template RegRegRegOpConstructor {{
}
}};
def template RegRegImmImmOpDeclare {{
class %(class_name)s : public %(base_class)s
{
protected:
public:
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
uint32_t _imm1, uint32_t _imm2);
%(BasicExecDeclare)s
};
}};
def template RegRegImmImmOpConstructor {{
inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest,
IntRegIndex _op1,
uint32_t _imm1,
uint32_t _imm2)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
_dest, _op1, _imm1, _imm2)
{
%(constructor)s;
}
}};
def template RegImmRegOpDeclare {{
class %(class_name)s : public %(base_class)s
{