Tracing: Make tracing aware of macro and micro ops.
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2adc60795b
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@ -170,10 +170,12 @@ TraceFlag('ExecSpeculative')
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TraceFlag('ExecSymbol')
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TraceFlag('ExecThread')
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TraceFlag('ExecTicks')
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TraceFlag('ExecMicro')
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TraceFlag('ExecMacro')
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TraceFlag('Fetch')
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TraceFlag('IntrControl')
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TraceFlag('PCEvent')
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TraceFlag('Quiesce')
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CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
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'ExecEffAddr', 'ExecResult', 'ExecSymbol' ])
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'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ])
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@ -46,7 +46,7 @@ using namespace TheISA;
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namespace Trace {
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void
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Trace::ExeTracerRecord::dump()
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Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
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{
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ostream &outs = Trace::output();
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@ -61,7 +61,6 @@ Trace::ExeTracerRecord::dump()
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if (IsOn(ExecThread))
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outs << "T" << thread->threadId() << " : ";
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std::string sym_str;
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Addr sym_addr;
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if (debugSymbolTable
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@ -69,22 +68,32 @@ Trace::ExeTracerRecord::dump()
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&& debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
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if (PC != sym_addr)
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sym_str += csprintf("+%d", PC - sym_addr);
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outs << "@" << sym_str << " : ";
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outs << "@" << sym_str;
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}
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else {
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outs << "0x" << hex << PC << " : ";
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outs << "0x" << hex << PC;
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}
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if (inst->isMicroop()) {
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outs << "." << setw(2) << dec << upc;
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} else {
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outs << " ";
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}
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outs << " : ";
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//
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// Print decoded instruction
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//
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outs << setw(26) << left;
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outs << staticInst->disassemble(PC, debugSymbolTable);
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outs << inst->disassemble(PC, debugSymbolTable);
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if (ran) {
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outs << " : ";
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if (IsOn(ExecOpClass)) {
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outs << Enums::OpClassStrings[staticInst->opClass()] << " : ";
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outs << Enums::OpClassStrings[inst->opClass()] << " : ";
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}
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if (IsOn(ExecResult) && data_status != DataInvalid) {
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@ -99,6 +108,7 @@ Trace::ExeTracerRecord::dump()
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if (IsOn(ExecCPSeq) && cp_seq_valid)
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outs << " CPSeq=" << dec << cp_seq;
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}
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//
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// End of line...
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@ -106,6 +116,29 @@ Trace::ExeTracerRecord::dump()
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outs << endl;
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}
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void
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Trace::ExeTracerRecord::dump()
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{
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/*
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* The behavior this check tries to achieve is that if ExecMacro is on,
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* the macroop will be printed. If it's on and microops are also on, it's
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* printed before the microops start printing to give context. If the
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* microops aren't printed, then it's printed only when the final microop
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* finishes. Macroops then behave like regular instructions and don't
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* complete/print when they fault.
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*/
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if (IsOn(ExecMacro) && staticInst->isMicroop() &&
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(IsOn(ExecMicro) &&
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macroStaticInst && staticInst->isFirstMicroop()) ||
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(!IsOn(ExecMicro) &&
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macroStaticInst && staticInst->isLastMicroop())) {
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traceInst(macroStaticInst, false);
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}
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if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
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traceInst(staticInst, true);
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}
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}
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/* namespace Trace */ }
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////////////////////////////////////////////////////////////////////////
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@ -47,11 +47,15 @@ class ExeTracerRecord : public InstRecord
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{
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public:
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ExeTracerRecord(Tick _when, ThreadContext *_thread,
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const StaticInstPtr &_staticInst, Addr _pc, bool spec)
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: InstRecord(_when, _thread, _staticInst, _pc, spec)
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const StaticInstPtr _staticInst, Addr _pc, bool spec,
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const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
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: InstRecord(_when, _thread, _staticInst, _pc, spec,
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_macroStaticInst, _upc)
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{
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}
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void traceInst(StaticInstPtr inst, bool ran);
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void dump();
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};
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@ -64,7 +68,8 @@ class ExeTracer : public InstTracer
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InstRecord *
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getInstRecord(Tick when, ThreadContext *tc,
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const StaticInstPtr staticInst, Addr pc)
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const StaticInstPtr staticInst, Addr pc,
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const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
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{
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if (!IsOn(ExecEnable))
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return NULL;
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@ -76,7 +81,7 @@ class ExeTracer : public InstTracer
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return NULL;
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return new ExeTracerRecord(when, tc,
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staticInst, pc, tc->misspeculating());
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staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
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}
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};
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@ -47,8 +47,10 @@ class IntelTraceRecord : public InstRecord
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{
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public:
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IntelTraceRecord(Tick _when, ThreadContext *_thread,
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const StaticInstPtr &_staticInst, Addr _pc, bool spec)
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: InstRecord(_when, _thread, _staticInst, _pc, spec)
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const StaticInstPtr _staticInst, Addr _pc, bool spec,
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const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
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: InstRecord(_when, _thread, _staticInst, _pc, spec,
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_macroStaticInst, _upc)
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{
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}
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@ -64,7 +66,8 @@ class IntelTrace : public InstTracer
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IntelTraceRecord *
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getInstRecord(Tick when, ThreadContext *tc,
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const StaticInstPtr staticInst, Addr pc)
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const StaticInstPtr staticInst, Addr pc,
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const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
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{
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if (!IsOn(ExecEnable))
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return NULL;
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@ -76,7 +79,7 @@ class IntelTrace : public InstTracer
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return NULL;
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return new IntelTraceRecord(when, tc,
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staticInst, pc, tc->misspeculating());
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staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
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}
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};
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@ -46,8 +46,10 @@ class LegionTraceRecord : public InstRecord
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{
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public:
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LegionTraceRecord(Tick _when, ThreadContext *_thread,
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const StaticInstPtr &_staticInst, Addr _pc, bool spec)
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: InstRecord(_when, _thread, _staticInst, _pc, spec)
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const StaticInstPtr _staticInst, Addr _pc, bool spec,
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const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
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: InstRecord(_when, _thread, _staticInst, _pc, spec,
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_macroStaticInst, _upc)
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{
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}
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@ -63,13 +65,14 @@ class LegionTrace : public InstTracer
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LegionTraceRecord *
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getInstRecord(Tick when, ThreadContext *tc,
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const StaticInstPtr staticInst, Addr pc)
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const StaticInstPtr staticInst, Addr pc,
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const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
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{
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if (tc->misspeculating())
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return NULL;
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return new LegionTraceRecord(when, tc,
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staticInst, pc, tc->misspeculating());
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staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
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}
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};
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@ -54,8 +54,11 @@ class NativeTraceRecord : public InstRecord
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public:
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NativeTraceRecord(NativeTrace * _parent,
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Tick _when, ThreadContext *_thread,
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const StaticInstPtr &_staticInst, Addr _pc, bool spec)
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: InstRecord(_when, _thread, _staticInst, _pc, spec), parent(_parent)
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const StaticInstPtr _staticInst, Addr _pc, bool spec,
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const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
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: InstRecord(_when, _thread, _staticInst, _pc, spec,
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_macroStaticInst, _upc),
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parent(_parent)
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{
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}
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@ -192,13 +195,14 @@ class NativeTrace : public InstTracer
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NativeTraceRecord *
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getInstRecord(Tick when, ThreadContext *tc,
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const StaticInstPtr staticInst, Addr pc)
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const StaticInstPtr staticInst, Addr pc,
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const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
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{
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if (tc->misspeculating())
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return NULL;
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return new NativeTraceRecord(this, when, tc,
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staticInst, pc, tc->misspeculating());
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staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
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}
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void
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@ -418,8 +418,9 @@ BaseSimpleCPU::preExecute()
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if(curStaticInst)
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{
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#if TRACING_ON
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traceData = tracer->getInstRecord(curTick, tc, curStaticInst,
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thread->readPC());
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traceData = tracer->getInstRecord(curTick, tc,
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curStaticInst, thread->readPC(),
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curMacroStaticInst, thread->readMicroPC());
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DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
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curStaticInst->getName(), curStaticInst->machInst);
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@ -55,6 +55,8 @@ class InstRecord
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// dump the record
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StaticInstPtr staticInst;
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Addr PC;
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StaticInstPtr macroStaticInst;
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MicroPC upc;
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bool misspeculating;
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// The remaining fields are only valid for particular instruction
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@ -86,10 +88,13 @@ class InstRecord
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public:
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InstRecord(Tick _when, ThreadContext *_thread,
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const StaticInstPtr &_staticInst,
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Addr _pc, bool spec)
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const StaticInstPtr _staticInst,
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Addr _pc, bool spec,
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const StaticInstPtr _macroStaticInst = NULL,
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MicroPC _upc = 0)
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: when(_when), thread(_thread),
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staticInst(_staticInst), PC(_pc),
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macroStaticInst(_macroStaticInst), upc(_upc),
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misspeculating(spec)
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{
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data_status = DataInvalid;
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@ -137,7 +142,9 @@ class InstTracer : public SimObject
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virtual InstRecord *
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getInstRecord(Tick when, ThreadContext *tc,
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const StaticInstPtr staticInst, Addr pc) = 0;
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const StaticInstPtr staticInst, Addr pc,
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const StaticInstPtr macroStaticInst = NULL,
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MicroPC _upc = 0) = 0;
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};
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