Tracing: Make tracing aware of macro and micro ops.

This commit is contained in:
Gabe Black 2009-01-06 22:34:18 -08:00
parent 2adc60795b
commit b0ab5c894d
8 changed files with 101 additions and 43 deletions

View file

@ -170,10 +170,12 @@ TraceFlag('ExecSpeculative')
TraceFlag('ExecSymbol')
TraceFlag('ExecThread')
TraceFlag('ExecTicks')
TraceFlag('ExecMicro')
TraceFlag('ExecMacro')
TraceFlag('Fetch')
TraceFlag('IntrControl')
TraceFlag('PCEvent')
TraceFlag('Quiesce')
CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
'ExecEffAddr', 'ExecResult', 'ExecSymbol' ])
'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ])

View file

@ -46,7 +46,7 @@ using namespace TheISA;
namespace Trace {
void
Trace::ExeTracerRecord::dump()
Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
{
ostream &outs = Trace::output();
@ -61,7 +61,6 @@ Trace::ExeTracerRecord::dump()
if (IsOn(ExecThread))
outs << "T" << thread->threadId() << " : ";
std::string sym_str;
Addr sym_addr;
if (debugSymbolTable
@ -69,43 +68,77 @@ Trace::ExeTracerRecord::dump()
&& debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
if (PC != sym_addr)
sym_str += csprintf("+%d", PC - sym_addr);
outs << "@" << sym_str << " : ";
outs << "@" << sym_str;
}
else {
outs << "0x" << hex << PC << " : ";
outs << "0x" << hex << PC;
}
if (inst->isMicroop()) {
outs << "." << setw(2) << dec << upc;
} else {
outs << " ";
}
outs << " : ";
//
// Print decoded instruction
//
outs << setw(26) << left;
outs << staticInst->disassemble(PC, debugSymbolTable);
outs << " : ";
outs << inst->disassemble(PC, debugSymbolTable);
if (IsOn(ExecOpClass)) {
outs << Enums::OpClassStrings[staticInst->opClass()] << " : ";
if (ran) {
outs << " : ";
if (IsOn(ExecOpClass)) {
outs << Enums::OpClassStrings[inst->opClass()] << " : ";
}
if (IsOn(ExecResult) && data_status != DataInvalid) {
ccprintf(outs, " D=%#018x", data.as_int);
}
if (IsOn(ExecEffAddr) && addr_valid)
outs << " A=0x" << hex << addr;
if (IsOn(ExecFetchSeq) && fetch_seq_valid)
outs << " FetchSeq=" << dec << fetch_seq;
if (IsOn(ExecCPSeq) && cp_seq_valid)
outs << " CPSeq=" << dec << cp_seq;
}
if (IsOn(ExecResult) && data_status != DataInvalid) {
ccprintf(outs, " D=%#018x", data.as_int);
}
if (IsOn(ExecEffAddr) && addr_valid)
outs << " A=0x" << hex << addr;
if (IsOn(ExecFetchSeq) && fetch_seq_valid)
outs << " FetchSeq=" << dec << fetch_seq;
if (IsOn(ExecCPSeq) && cp_seq_valid)
outs << " CPSeq=" << dec << cp_seq;
//
// End of line...
//
outs << endl;
}
void
Trace::ExeTracerRecord::dump()
{
/*
* The behavior this check tries to achieve is that if ExecMacro is on,
* the macroop will be printed. If it's on and microops are also on, it's
* printed before the microops start printing to give context. If the
* microops aren't printed, then it's printed only when the final microop
* finishes. Macroops then behave like regular instructions and don't
* complete/print when they fault.
*/
if (IsOn(ExecMacro) && staticInst->isMicroop() &&
(IsOn(ExecMicro) &&
macroStaticInst && staticInst->isFirstMicroop()) ||
(!IsOn(ExecMicro) &&
macroStaticInst && staticInst->isLastMicroop())) {
traceInst(macroStaticInst, false);
}
if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
traceInst(staticInst, true);
}
}
/* namespace Trace */ }
////////////////////////////////////////////////////////////////////////

View file

@ -47,11 +47,15 @@ class ExeTracerRecord : public InstRecord
{
public:
ExeTracerRecord(Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst, Addr _pc, bool spec)
: InstRecord(_when, _thread, _staticInst, _pc, spec)
const StaticInstPtr _staticInst, Addr _pc, bool spec,
const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
: InstRecord(_when, _thread, _staticInst, _pc, spec,
_macroStaticInst, _upc)
{
}
void traceInst(StaticInstPtr inst, bool ran);
void dump();
};
@ -64,7 +68,8 @@ class ExeTracer : public InstTracer
InstRecord *
getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst, Addr pc)
const StaticInstPtr staticInst, Addr pc,
const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
{
if (!IsOn(ExecEnable))
return NULL;
@ -76,7 +81,7 @@ class ExeTracer : public InstTracer
return NULL;
return new ExeTracerRecord(when, tc,
staticInst, pc, tc->misspeculating());
staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
}
};

View file

@ -47,8 +47,10 @@ class IntelTraceRecord : public InstRecord
{
public:
IntelTraceRecord(Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst, Addr _pc, bool spec)
: InstRecord(_when, _thread, _staticInst, _pc, spec)
const StaticInstPtr _staticInst, Addr _pc, bool spec,
const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
: InstRecord(_when, _thread, _staticInst, _pc, spec,
_macroStaticInst, _upc)
{
}
@ -64,7 +66,8 @@ class IntelTrace : public InstTracer
IntelTraceRecord *
getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst, Addr pc)
const StaticInstPtr staticInst, Addr pc,
const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
{
if (!IsOn(ExecEnable))
return NULL;
@ -76,7 +79,7 @@ class IntelTrace : public InstTracer
return NULL;
return new IntelTraceRecord(when, tc,
staticInst, pc, tc->misspeculating());
staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
}
};

View file

@ -46,8 +46,10 @@ class LegionTraceRecord : public InstRecord
{
public:
LegionTraceRecord(Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst, Addr _pc, bool spec)
: InstRecord(_when, _thread, _staticInst, _pc, spec)
const StaticInstPtr _staticInst, Addr _pc, bool spec,
const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
: InstRecord(_when, _thread, _staticInst, _pc, spec,
_macroStaticInst, _upc)
{
}
@ -63,13 +65,14 @@ class LegionTrace : public InstTracer
LegionTraceRecord *
getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst, Addr pc)
const StaticInstPtr staticInst, Addr pc,
const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
{
if (tc->misspeculating())
return NULL;
return new LegionTraceRecord(when, tc,
staticInst, pc, tc->misspeculating());
staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
}
};

View file

@ -54,8 +54,11 @@ class NativeTraceRecord : public InstRecord
public:
NativeTraceRecord(NativeTrace * _parent,
Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst, Addr _pc, bool spec)
: InstRecord(_when, _thread, _staticInst, _pc, spec), parent(_parent)
const StaticInstPtr _staticInst, Addr _pc, bool spec,
const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
: InstRecord(_when, _thread, _staticInst, _pc, spec,
_macroStaticInst, _upc),
parent(_parent)
{
}
@ -192,13 +195,14 @@ class NativeTrace : public InstTracer
NativeTraceRecord *
getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst, Addr pc)
const StaticInstPtr staticInst, Addr pc,
const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
{
if (tc->misspeculating())
return NULL;
return new NativeTraceRecord(this, when, tc,
staticInst, pc, tc->misspeculating());
staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
}
void

View file

@ -418,8 +418,9 @@ BaseSimpleCPU::preExecute()
if(curStaticInst)
{
#if TRACING_ON
traceData = tracer->getInstRecord(curTick, tc, curStaticInst,
thread->readPC());
traceData = tracer->getInstRecord(curTick, tc,
curStaticInst, thread->readPC(),
curMacroStaticInst, thread->readMicroPC());
DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
curStaticInst->getName(), curStaticInst->machInst);

View file

@ -55,6 +55,8 @@ class InstRecord
// dump the record
StaticInstPtr staticInst;
Addr PC;
StaticInstPtr macroStaticInst;
MicroPC upc;
bool misspeculating;
// The remaining fields are only valid for particular instruction
@ -86,10 +88,13 @@ class InstRecord
public:
InstRecord(Tick _when, ThreadContext *_thread,
const StaticInstPtr &_staticInst,
Addr _pc, bool spec)
const StaticInstPtr _staticInst,
Addr _pc, bool spec,
const StaticInstPtr _macroStaticInst = NULL,
MicroPC _upc = 0)
: when(_when), thread(_thread),
staticInst(_staticInst), PC(_pc),
macroStaticInst(_macroStaticInst), upc(_upc),
misspeculating(spec)
{
data_status = DataInvalid;
@ -137,7 +142,9 @@ class InstTracer : public SimObject
virtual InstRecord *
getInstRecord(Tick when, ThreadContext *tc,
const StaticInstPtr staticInst, Addr pc) = 0;
const StaticInstPtr staticInst, Addr pc,
const StaticInstPtr macroStaticInst = NULL,
MicroPC _upc = 0) = 0;
};