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regressions: update a couple of configs

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The configs for pc-simple-timing-ruby, t1000-simple-atomic had not been
updated correctly in the patch 6e6cefc1db1f.
This commit is contained in:
Nilay Vaish 2013-07-02 10:10:58 -05:00
parent 1be0098c0b
commit af58313fd6
2 changed files with 8 additions and 3 deletions
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7
tests/configs/pc-simple-timing-ruby.py
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@ -56,10 +56,13 @@ options.num_cpus = 2
#the system
mdesc = SysConfig(disk = 'linux-x86.img')
system = FSConfig.makeLinuxX86System('timing', DDR3_1600_x64, options.num_cpus,
mdesc=mdesc, Ruby=True,
mdesc=mdesc, Ruby=True)
system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9.smp')
system.cpu = [TimingSimpleCPU(cpu_id=i) for i in xrange(options.num_cpus)]
system.clk_domain = SrcClockDomain(clock = '1GHz')
system.cpu_clk_domain = SrcClockDomain(clock = '2GHz')
system.cpu = [TimingSimpleCPU(cpu_id=i, clk_domain = system.cpu_clk_domain)
for i in xrange(options.num_cpus)]
Ruby.create_system(options, system, system.piobus, system._dma_ports)

4
tests/configs/t1000-simple-atomic.py
View file

@ -31,8 +31,10 @@ from m5.objects import *
m5.util.addToPath('../configs/common')
import FSConfig
cpu = AtomicSimpleCPU(cpu_id=0)
system = FSConfig.makeSparcSystem('atomic', SimpleMemory)
system.clk_domain = SrcClockDomain(clock = '1GHz')
system.cpu_clk_domain = SrcClockDomain(clock = '1GHz')
cpu = AtomicSimpleCPU(cpu_id=0, clk_domain = system.cpu_clk_domain)
system.cpu = cpu
# create the interrupt controller
cpu.createInterruptController()