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Fixing the extended twin format to go with the new isa parser interface.

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--HG--
extra : convert_revision : f41183cfa011b21e7ab8cbcdef0ac1d464692362
This commit is contained in:
Gabe Black 2006-12-18 18:17:30 -05:00
parent 9e7dc34383
commit af1e8d2d40
1 changed files with 7 additions and 7 deletions
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14
src/arch/sparc/isa/formats/mem/blockmem.isa
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@ -494,18 +494,18 @@ let {{
else:
flag_code = "flags[IsDelayedCommit] = true;"
pcedCode = matcher.sub("RdLow", code)
iop = InstObjParams(name, Name, 'TwinMem', pcedCode,
opt_flags, {"ea_code": addrCalcReg,
iop = InstObjParams(name, Name, 'TwinMem',
{"code": pcedCode, "ea_code": addrCalcReg,
"fault_check": faultCode, "micro_pc": microPc,
"set_flags": flag_code})
iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
opt_flags, {"ea_code": addrCalcImm,
"set_flags": flag_code}, opt_flags)
iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm',
{"code": pcedCode, "ea_code": addrCalcImm,
"fault_check": faultCode, "micro_pc": microPc,
"set_flags": flag_code})
"set_flags": flag_code}, opt_flags)
decoder_output += BlockMemMicroConstructor.subst(iop)
decoder_output += BlockMemMicroConstructor.subst(iop_imm)
exec_output += doDualSplitExecute(
pcedCode, addrCalcReg, addrCalcImm, LoadExecute, faultCode,
pcedCode, addrCalcReg, addrCalcImm, LoadFuncs, faultCode,
makeMicroName(name, microPc),
makeMicroName(name + "Imm", microPc),
makeMicroName(Name, microPc),