ARM: Fix up thumb decoding of coproc instructions.
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dea707704f
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ad9c5af945
1 changed files with 9 additions and 25 deletions
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@ -92,7 +92,8 @@
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}
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0x3: WarnUnimpl::Advanced_SIMD();
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default: decode LTCOPROC {
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0xa, 0xb: decode HTOPCODE_9_4 {
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0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStre();
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0xf: decode HTOPCODE_9_4 {
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0x00: Unknown::undefined();
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0x04: WarnUnimpl::mcrr(); // mcrr2
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0x05: WarnUnimpl::mrrc(); // mrrc2
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@ -106,13 +107,6 @@
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default: WarnUnimpl::ldc(); // ldc2 (immediate)
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}
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}
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default: decode HTOPCODE_9_5 {
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0x00: Unknown::undefined();
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0x02: WarnUnimpl::SIMD_VFP_64_bit_core_extension_transfer();
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0x01, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
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0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f:
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WarnUnimpl::Extension_register_load_store_instruction();
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}
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}
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}
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}
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@ -144,23 +138,20 @@
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default: decode HTOPCODE_9_8 {
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0x2: decode LTOPCODE_4 {
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0x0: decode LTCOPROC {
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0xa, 0xb: WarnUnimpl::VFP_Inst();
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0xa, 0xb: decode OPCODE_23_20 {
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##include "vfp.isa"
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}
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default: WarnUnimpl::cdp(); // cdp2
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}
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0x1: decode LTCOPROC {
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0xa, 0xb: WarnUnimpl::Core_to_extension_transfer();
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default: decode CPNUM {
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15: McrMrc15::mcr2Mrc215();
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default: decode HTOPCODE_4 {
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0x0: WarnUnimpl::mcr2();
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0x1: WarnUnimpl::mrc2();
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}
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}
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0xa, 0xb: ShortFpTransfer::shortFpTransfer();
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0xf: McrMrc15::mcrMrc15();
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}
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}
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0x3: WarnUnimpl::Advanced_SIMD();
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default: decode LTCOPROC {
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0xa, 0xb: decode HTOPCODE_9_4 {
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0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStre();
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0xf: decode HTOPCODE_9_4 {
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0x00: Unknown::undefined();
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0x04: WarnUnimpl::mcrr(); // mcrr2
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0x05: WarnUnimpl::mrrc(); // mrrc2
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@ -174,13 +165,6 @@
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default: WarnUnimpl::ldc(); // ldc2 (immediate)
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}
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}
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default: decode HTOPCODE_9_5 {
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0x00: Unknown::undefined();
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0x02: WarnUnimpl::SIMD_VFP_64_bit_core_extension_transfer();
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0x01, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
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0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f:
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WarnUnimpl::Extension_register_load_store_instruction();
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}
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}
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}
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}
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