Make the floating point zero register special handling only apply for ALPHA.

--HG--
extra : convert_revision : 4f393a5471656b29cecbacfcb337992239775915
This commit is contained in:
Gabe Black 2007-04-22 17:50:43 +00:00
parent cea5435760
commit acc62514b1
4 changed files with 25 additions and 0 deletions

View file

@ -168,7 +168,9 @@ SimpleFreeList::addReg(PhysRegIndex freed_reg)
if (freed_reg != TheISA::ZeroReg) if (freed_reg != TheISA::ZeroReg)
freeIntRegs.push(freed_reg); freeIntRegs.push(freed_reg);
} else if (freed_reg < numPhysicalRegs) { } else if (freed_reg < numPhysicalRegs) {
#if THE_ISA == ALPHA_ISA
if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs)) if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
#endif
freeFloatRegs.push(freed_reg); freeFloatRegs.push(freed_reg);
} }
} }

View file

@ -179,7 +179,9 @@ class PhysRegFile
DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
int(reg_idx), (uint64_t)val); int(reg_idx), (uint64_t)val);
#if THE_ISA == ALPHA_ISA
if (reg_idx != TheISA::ZeroReg) if (reg_idx != TheISA::ZeroReg)
#endif
floatRegFile[reg_idx].d = val; floatRegFile[reg_idx].d = val;
} }
@ -194,7 +196,9 @@ class PhysRegFile
DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
int(reg_idx), (uint64_t)val); int(reg_idx), (uint64_t)val);
#if THE_ISA == ALPHA_ISA
if (reg_idx != TheISA::ZeroReg) if (reg_idx != TheISA::ZeroReg)
#endif
floatRegFile[reg_idx].d = val; floatRegFile[reg_idx].d = val;
} }

View file

@ -165,17 +165,21 @@ SimpleRenameMap::rename(RegIndex arch_reg)
// If it's not referencing the zero register, then rename the // If it's not referencing the zero register, then rename the
// register. // register.
#if THE_ISA == ALPHA_ISA
if (arch_reg != floatZeroReg) { if (arch_reg != floatZeroReg) {
#endif
renamed_reg = freeList->getFloatReg(); renamed_reg = freeList->getFloatReg();
floatRenameMap[arch_reg].physical_reg = renamed_reg; floatRenameMap[arch_reg].physical_reg = renamed_reg;
assert(renamed_reg < numPhysicalRegs && assert(renamed_reg < numPhysicalRegs &&
renamed_reg >= numPhysicalIntRegs); renamed_reg >= numPhysicalIntRegs);
#if THE_ISA == ALPHA_ISA
} else { } else {
// Otherwise return the zero register so nothing bad happens. // Otherwise return the zero register so nothing bad happens.
renamed_reg = floatZeroReg; renamed_reg = floatZeroReg;
} }
#endif
} else { } else {
// Subtract off the base offset for miscellaneous registers. // Subtract off the base offset for miscellaneous registers.
arch_reg = arch_reg - numLogicalRegs; arch_reg = arch_reg - numLogicalRegs;

View file

@ -29,6 +29,7 @@
* Kevin Lim * Kevin Lim
*/ */
#include "arch/isa_specific.hh"
#include "cpu/o3/scoreboard.hh" #include "cpu/o3/scoreboard.hh"
Scoreboard::Scoreboard(unsigned activeThreads, Scoreboard::Scoreboard(unsigned activeThreads,
@ -79,11 +80,18 @@ Scoreboard::name() const
bool bool
Scoreboard::getReg(PhysRegIndex phys_reg) Scoreboard::getReg(PhysRegIndex phys_reg)
{ {
#if THE_ISA == ALPHA_ISA
// Always ready if int or fp zero reg. // Always ready if int or fp zero reg.
if (phys_reg == zeroRegIdx || if (phys_reg == zeroRegIdx ||
phys_reg == (zeroRegIdx + numPhysicalIntRegs)) { phys_reg == (zeroRegIdx + numPhysicalIntRegs)) {
return 1; return 1;
} }
#else
// Always ready if int zero reg.
if (phys_reg == zeroRegIdx) {
return 1;
}
#endif
return regScoreBoard[phys_reg]; return regScoreBoard[phys_reg];
} }
@ -99,11 +107,18 @@ Scoreboard::setReg(PhysRegIndex phys_reg)
void void
Scoreboard::unsetReg(PhysRegIndex ready_reg) Scoreboard::unsetReg(PhysRegIndex ready_reg)
{ {
#if THE_ISA == ALPHA_ISA
if (ready_reg == zeroRegIdx || if (ready_reg == zeroRegIdx ||
ready_reg == (zeroRegIdx + numPhysicalIntRegs)) { ready_reg == (zeroRegIdx + numPhysicalIntRegs)) {
// Don't do anything if int or fp zero reg. // Don't do anything if int or fp zero reg.
return; return;
} }
#else
if (ready_reg == zeroRegIdx) {
// Don't do anything if int zero reg.
return;
}
#endif
regScoreBoard[ready_reg] = 0; regScoreBoard[ready_reg] = 0;
} }