Initial try of consolidating configuration files so they can be shared more easily, especially across regression tests and simple examples.
configs/test/fs.py:
Pull a lot of the default options out of the config file now that they are in the Python objects themselves. Also merge this file with the single_fs.py, allowing one file to be used for both. Previously they differed only by the system they instantiated.
configs/test/test.py:
Initial stab at consolidating configuration files so they aren't redundant between the regression tests and the simple examples.
--HG--
extra : convert_revision : e8ae3de5a6d8864831f21089d4fdb8ec690e4731
This commit is contained in:
Kevin Lim
parent
35ab2296d3
commit
a9ca36639f
2 changed files with 52 additions and 216 deletions
|
|
@ -2,10 +2,15 @@ import m5
|
|||
from m5.objects import *
|
||||
import os,optparse,sys
|
||||
from SysPaths import *
|
||||
from FullO3Config import *
|
||||
|
||||
parser = optparse.OptionParser(option_list=m5.standardOptions)
|
||||
|
||||
parser.add_option("-d", "--detailed", action="store_true")
|
||||
parser.add_option("-t", "--timing", action="store_true")
|
||||
parser.add_option("-m", "--maxtick", type="int")
|
||||
parser.add_option("--dual", help="Run full system using dual systems",
|
||||
action="store_true")
|
||||
|
||||
(options, args) = parser.parse_args()
|
||||
m5.setStandardOptions(options)
|
||||
|
|
@ -19,179 +24,52 @@ test_base = os.path.dirname(__file__)
|
|||
|
||||
linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img'))
|
||||
|
||||
class IdeControllerPciData(PciConfigData):
|
||||
VendorID = 0x8086
|
||||
DeviceID = 0x7111
|
||||
Command = 0x0
|
||||
Status = 0x280
|
||||
Revision = 0x0
|
||||
ClassCode = 0x01
|
||||
SubClassCode = 0x01
|
||||
ProgIF = 0x85
|
||||
BAR0 = 0x00000001
|
||||
BAR1 = 0x00000001
|
||||
BAR2 = 0x00000001
|
||||
BAR3 = 0x00000001
|
||||
BAR4 = 0x00000001
|
||||
BAR5 = 0x00000001
|
||||
InterruptLine = 0x1f
|
||||
InterruptPin = 0x01
|
||||
BAR0Size = '8B'
|
||||
BAR1Size = '4B'
|
||||
BAR2Size = '8B'
|
||||
BAR3Size = '4B'
|
||||
BAR4Size = '16B'
|
||||
class CowIdeDisk(IdeDisk):
|
||||
image = CowDiskImage(child=RawDiskImage(read_only=True),
|
||||
read_only=False)
|
||||
|
||||
class SinicPciData(PciConfigData):
|
||||
VendorID = 0x1291
|
||||
DeviceID = 0x1293
|
||||
Status = 0x0290
|
||||
SubClassCode = 0x00
|
||||
ClassCode = 0x02
|
||||
ProgIF = 0x00
|
||||
BAR0 = 0x00000000
|
||||
BAR1 = 0x00000000
|
||||
BAR2 = 0x00000000
|
||||
BAR3 = 0x00000000
|
||||
BAR4 = 0x00000000
|
||||
BAR5 = 0x00000000
|
||||
MaximumLatency = 0x34
|
||||
MinimumGrant = 0xb0
|
||||
InterruptLine = 0x1e
|
||||
InterruptPin = 0x01
|
||||
BAR0Size = '64kB'
|
||||
|
||||
class NSGigEPciData(PciConfigData):
|
||||
VendorID = 0x100B
|
||||
DeviceID = 0x0022
|
||||
Status = 0x0290
|
||||
SubClassCode = 0x00
|
||||
ClassCode = 0x02
|
||||
ProgIF = 0x00
|
||||
BAR0 = 0x00000001
|
||||
BAR1 = 0x00000000
|
||||
BAR2 = 0x00000000
|
||||
BAR3 = 0x00000000
|
||||
BAR4 = 0x00000000
|
||||
BAR5 = 0x00000000
|
||||
MaximumLatency = 0x34
|
||||
MinimumGrant = 0xb0
|
||||
InterruptLine = 0x1e
|
||||
InterruptPin = 0x01
|
||||
BAR0Size = '256B'
|
||||
BAR1Size = '4kB'
|
||||
|
||||
class LinuxRootDisk(IdeDisk):
|
||||
raw_image = RawDiskImage(image_file=linux_image, read_only=True)
|
||||
image = CowDiskImage(child=Parent.raw_image, read_only=False)
|
||||
|
||||
class LinuxSwapDisk(IdeDisk):
|
||||
raw_image = RawDiskImage(image_file = disk('linux-bigswap2.img'),
|
||||
read_only=True)
|
||||
image = CowDiskImage(child = Parent.raw_image, read_only=False)
|
||||
|
||||
class SpecwebFilesetDisk(IdeDisk):
|
||||
raw_image = RawDiskImage(image_file = disk('specweb-fileset.img'),
|
||||
read_only=True)
|
||||
image = CowDiskImage(child = Parent.raw_image, read_only=False)
|
||||
def childImage(self, ci):
|
||||
self.image.child.image_file = ci
|
||||
|
||||
class BaseTsunami(Tsunami):
|
||||
cchip = TsunamiCChip(pio_addr=0x801a0000000)
|
||||
pchip = TsunamiPChip(pio_addr=0x80180000000)
|
||||
pciconfig = PciConfigAll()
|
||||
fake_sm_chip = IsaFake(pio_addr=0x801fc000370)
|
||||
|
||||
fake_uart1 = IsaFake(pio_addr=0x801fc0002f8)
|
||||
fake_uart2 = IsaFake(pio_addr=0x801fc0003e8)
|
||||
fake_uart3 = IsaFake(pio_addr=0x801fc0002e8)
|
||||
fake_uart4 = IsaFake(pio_addr=0x801fc0003f0)
|
||||
|
||||
fake_ppc = IsaFake(pio_addr=0x801fc0003bc)
|
||||
|
||||
fake_OROM = IsaFake(pio_addr=0x800000a0000, pio_size=0x60000)
|
||||
|
||||
fake_pnp_addr = IsaFake(pio_addr=0x801fc000279)
|
||||
fake_pnp_write = IsaFake(pio_addr=0x801fc000a79)
|
||||
fake_pnp_read0 = IsaFake(pio_addr=0x801fc000203)
|
||||
fake_pnp_read1 = IsaFake(pio_addr=0x801fc000243)
|
||||
fake_pnp_read2 = IsaFake(pio_addr=0x801fc000283)
|
||||
fake_pnp_read3 = IsaFake(pio_addr=0x801fc0002c3)
|
||||
fake_pnp_read4 = IsaFake(pio_addr=0x801fc000303)
|
||||
fake_pnp_read5 = IsaFake(pio_addr=0x801fc000343)
|
||||
fake_pnp_read6 = IsaFake(pio_addr=0x801fc000383)
|
||||
fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3)
|
||||
|
||||
fake_ata0 = IsaFake(pio_addr=0x801fc0001f0)
|
||||
fake_ata1 = IsaFake(pio_addr=0x801fc000170)
|
||||
|
||||
fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer')
|
||||
io = TsunamiIO(pio_addr=0x801fc000000)
|
||||
uart = Uart8250(pio_addr=0x801fc0003f8)
|
||||
ethernet = NSGigE(configdata=NSGigEPciData(),
|
||||
pci_bus=0, pci_dev=1, pci_func=0)
|
||||
etherint = NSGigEInt(device=Parent.ethernet)
|
||||
console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk)
|
||||
|
||||
class LinuxTsunami(BaseTsunami):
|
||||
disk0 = LinuxRootDisk(driveID='master')
|
||||
disk1 = SpecwebFilesetDisk(driveID='slave')
|
||||
disk2 = LinuxSwapDisk(driveID='master')
|
||||
ide = IdeController(disks=[Parent.disk0, Parent.disk1, Parent.disk2],
|
||||
configdata=IdeControllerPciData(),
|
||||
ide = IdeController(disks=[Parent.disk0, Parent.disk2],
|
||||
pci_func=0, pci_dev=0, pci_bus=0)
|
||||
|
||||
class MyLinuxAlphaSystem(LinuxAlphaSystem):
|
||||
magicbus = Bus(bus_id=0)
|
||||
magicbus2 = Bus(bus_id=1)
|
||||
iobus = Bus(bus_id=0)
|
||||
membus = Bus(bus_id=1)
|
||||
bridge = Bridge()
|
||||
physmem = PhysicalMemory(range = AddrRange('128MB'))
|
||||
bridge.side_a = magicbus.port
|
||||
bridge.side_b = magicbus2.port
|
||||
physmem.port = magicbus2.port
|
||||
tsunami = LinuxTsunami()
|
||||
tsunami.cchip.pio = magicbus.port
|
||||
tsunami.pchip.pio = magicbus.port
|
||||
tsunami.pciconfig.pio = magicbus.default
|
||||
tsunami.fake_sm_chip.pio = magicbus.port
|
||||
tsunami.ethernet.pio = magicbus.port
|
||||
tsunami.ethernet.dma = magicbus.port
|
||||
tsunami.ethernet.config = magicbus.port
|
||||
tsunami.fake_uart1.pio = magicbus.port
|
||||
tsunami.fake_uart2.pio = magicbus.port
|
||||
tsunami.fake_uart3.pio = magicbus.port
|
||||
tsunami.fake_uart4.pio = magicbus.port
|
||||
tsunami.ide.pio = magicbus.port
|
||||
tsunami.ide.dma = magicbus.port
|
||||
tsunami.ide.config = magicbus.port
|
||||
tsunami.fake_ppc.pio = magicbus.port
|
||||
tsunami.fake_OROM.pio = magicbus.port
|
||||
tsunami.fake_pnp_addr.pio = magicbus.port
|
||||
tsunami.fake_pnp_write.pio = magicbus.port
|
||||
tsunami.fake_pnp_read0.pio = magicbus.port
|
||||
tsunami.fake_pnp_read1.pio = magicbus.port
|
||||
tsunami.fake_pnp_read2.pio = magicbus.port
|
||||
tsunami.fake_pnp_read3.pio = magicbus.port
|
||||
tsunami.fake_pnp_read4.pio = magicbus.port
|
||||
tsunami.fake_pnp_read5.pio = magicbus.port
|
||||
tsunami.fake_pnp_read6.pio = magicbus.port
|
||||
tsunami.fake_pnp_read7.pio = magicbus.port
|
||||
tsunami.fake_ata0.pio = magicbus.port
|
||||
tsunami.fake_ata1.pio = magicbus.port
|
||||
tsunami.fb.pio = magicbus.port
|
||||
tsunami.io.pio = magicbus.port
|
||||
tsunami.uart.pio = magicbus.port
|
||||
tsunami.console.pio = magicbus.port
|
||||
raw_image = RawDiskImage(image_file=disk('linux-latest.img'),
|
||||
read_only=True)
|
||||
simple_disk = SimpleDisk(disk=Parent.raw_image)
|
||||
bridge.side_a = iobus.port
|
||||
bridge.side_b = membus.port
|
||||
physmem.port = membus.port
|
||||
disk0 = CowIdeDisk(driveID='master')
|
||||
disk2 = CowIdeDisk(driveID='master')
|
||||
disk0.childImage(linux_image)
|
||||
disk2.childImage(disk('linux-bigswap2.img'))
|
||||
tsunami = BaseTsunami()
|
||||
tsunami.attachIO(iobus)
|
||||
tsunami.ide.pio = iobus.port
|
||||
tsunami.ide.dma = iobus.port
|
||||
tsunami.ide.config = iobus.port
|
||||
tsunami.ethernet.pio = iobus.port
|
||||
tsunami.ethernet.dma = iobus.port
|
||||
tsunami.ethernet.config = iobus.port
|
||||
simple_disk = SimpleDisk(disk=RawDiskImage(image_file = linux_image,
|
||||
read_only = True))
|
||||
intrctrl = IntrControl()
|
||||
if options.timing:
|
||||
if options.detailed:
|
||||
cpu = DetailedO3CPU()
|
||||
elif options.timing:
|
||||
cpu = TimingSimpleCPU()
|
||||
else:
|
||||
cpu = AtomicSimpleCPU()
|
||||
cpu.mem = magicbus2
|
||||
cpu.icache_port = magicbus2.port
|
||||
cpu.dcache_port = magicbus2.port
|
||||
cpu.mem = membus
|
||||
cpu.icache_port = membus.port
|
||||
cpu.dcache_port = membus.port
|
||||
cpu.itb = AlphaITB()
|
||||
cpu.dtb = AlphaDTB()
|
||||
sim_console = SimConsole(listener=ConsoleListener(port=3456))
|
||||
|
|
@ -199,14 +77,10 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem):
|
|||
pal = binary('ts_osfpal')
|
||||
console = binary('console')
|
||||
boot_osflags = 'root=/dev/hda1 console=ttyS0'
|
||||
# readfile = os.path.join(test_base, 'halt.sh')
|
||||
|
||||
|
||||
|
||||
class TsunamiRoot(System):
|
||||
class TsunamiRoot(Root):
|
||||
pass
|
||||
|
||||
|
||||
def DualRoot(clientSystem, serverSystem):
|
||||
self = Root()
|
||||
self.client = clientSystem
|
||||
|
|
@ -219,12 +93,18 @@ def DualRoot(clientSystem, serverSystem):
|
|||
self.clock = '5GHz'
|
||||
return self
|
||||
|
||||
root = DualRoot(
|
||||
MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')),
|
||||
MyLinuxAlphaSystem(readfile=script('netperf-server.rcS')))
|
||||
if options.dual:
|
||||
root = DualRoot(
|
||||
MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')),
|
||||
MyLinuxAlphaSystem(readfile=script('netperf-server.rcS')))
|
||||
else:
|
||||
root = TsunamiRoot(clock = '2GHz', system = MyLinuxAlphaSystem())
|
||||
|
||||
m5.instantiate(root)
|
||||
|
||||
exit_event = m5.simulate()
|
||||
if options.maxtick:
|
||||
exit_event = m5.simulate(options.maxtick)
|
||||
else:
|
||||
exit_event = m5.simulate()
|
||||
|
||||
print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()
|
||||
|
|
|
|||
|
|
@ -1,38 +1,13 @@
|
|||
# Simple test script
|
||||
#
|
||||
# Alpha: "m5 test.py"
|
||||
# MIPS: "m5 test.py -a Mips -c hello_mips"
|
||||
# MIPS: "m5 test.py -c hello_mips"
|
||||
|
||||
import os, optparse, sys
|
||||
import m5
|
||||
from m5.objects import *
|
||||
from FullO3Config import *
|
||||
import os, optparse, sys
|
||||
m5.AddToPath('../common')
|
||||
from SEConfig import *
|
||||
|
||||
# parse command-line arguments
|
||||
parser = optparse.OptionParser(option_list=m5.standardOptions)
|
||||
|
||||
parser.add_option("-c", "--cmd", default="hello",
|
||||
help="The binary to run in syscall emulation mode.")
|
||||
parser.add_option("-o", "--options", default="",
|
||||
help="The options to pass to the binary, use \" \" around the entire\
|
||||
string.")
|
||||
parser.add_option("-i", "--input", default="",
|
||||
help="A file of input to give to the binary.")
|
||||
parser.add_option("-t", "--timing", action="store_true",
|
||||
help="Use simple timing CPU.")
|
||||
parser.add_option("-d", "--detailed", action="store_true",
|
||||
help="Use detailed CPU.")
|
||||
parser.add_option("-m", "--maxtick", type="int",
|
||||
help="Set the maximum number of ticks to run for")
|
||||
|
||||
(options, args) = parser.parse_args()
|
||||
m5.setStandardOptions(options)
|
||||
|
||||
if args:
|
||||
print "Error: script doesn't take any positional arguments"
|
||||
sys.exit(1)
|
||||
|
||||
# build configuration
|
||||
this_dir = os.path.dirname(__file__)
|
||||
|
||||
process = LiveProcess()
|
||||
|
|
@ -41,16 +16,7 @@ process.cmd = options.cmd + " " + options.options
|
|||
if options.input != "":
|
||||
process.input = options.input
|
||||
|
||||
magicbus = Bus()
|
||||
mem = PhysicalMemory()
|
||||
|
||||
if options.timing and options.detailed:
|
||||
print "Error: you may only specify one cpu model";
|
||||
sys.exit(1)
|
||||
|
||||
if options.timing:
|
||||
cpu = TimingSimpleCPU()
|
||||
elif options.detailed:
|
||||
if options.detailed:
|
||||
#check for SMT workload
|
||||
workloads = options.cmd.split(';')
|
||||
if len(workloads) > 1:
|
||||
|
|
@ -70,17 +36,7 @@ elif options.detailed:
|
|||
process += [smt_process, ]
|
||||
smt_idx += 1
|
||||
|
||||
cpu = DetailedO3CPU()
|
||||
else:
|
||||
cpu = AtomicSimpleCPU()
|
||||
cpu.workload = process
|
||||
cpu.mem = magicbus
|
||||
cpu.icache_port=magicbus.port
|
||||
cpu.dcache_port=magicbus.port
|
||||
|
||||
system = System(physmem = mem, cpu = cpu)
|
||||
mem.port = magicbus.port
|
||||
root = Root(system = system)
|
||||
|
||||
# instantiate configuration
|
||||
m5.instantiate(root)
|
||||
|
|
|
|||
Loading…
Reference in a new issue