Comment out code that messed up SMT (but will be needed eventually).
src/cpu/o3/cpu.cc: Comment out reseting CPU structures for now. This can be updated to work in the future. --HG-- extra : convert_revision : bc1a86e2fe47da5acb14ba8b64568b0355431f1c
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@ -701,10 +701,17 @@ FullO3CPU<Impl>::removeThread(unsigned tid)
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assert(iew.ldstQueue.getCount(tid) == 0);
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assert(iew.ldstQueue.getCount(tid) == 0);
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// Reset ROB/IQ/LSQ Entries
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// Reset ROB/IQ/LSQ Entries
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// Commented out for now. This should be possible to do by
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// telling all the pipeline stages to drain first, and then
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// checking until the drain completes. Once the pipeline is
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// drained, call resetEntries(). - 10-09-06 ktlim
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/*
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if (activeThreads.size() >= 1) {
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if (activeThreads.size() >= 1) {
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commit.rob->resetEntries();
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commit.rob->resetEntries();
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iew.resetEntries();
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iew.resetEntries();
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}
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}
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*/
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}
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}
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