bus changes
src/mem/bus.cc: src/mem/bus.hh: minor fix and some formatting changes src/python/m5/objects/Bus.py: changed bits to bytes --HG-- extra : convert_revision : dcd22205604b7a2727eaf2094084c4858f3589c5
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3 changed files with 17 additions and 9 deletions
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@ -68,7 +68,9 @@ Bus::init()
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}
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Bus::BusFreeEvent::BusFreeEvent(Bus *_bus) : Event(&mainEventQueue), bus(_bus)
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{}
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{
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assert(!scheduled());
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}
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void Bus::BusFreeEvent::process()
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{
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@ -104,6 +106,7 @@ Bus::occupyBus(int numCycles)
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} else {
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busIdle.reschedule(tickNextIdle);
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}
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DPRINTF(Bus, "The bus is now occupied from tick %d to %d\n", curTick, tickNextIdle);
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}
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/** Function called by the port when the bus is receiving a Timing
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@ -155,6 +158,11 @@ Bus::recvTiming(Packet *pkt)
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if (port->sendTiming(pkt)) {
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// Packet was successfully sent. Return true.
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// Also take care of retries
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if (retryingPort) {
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retryList.pop_front();
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retryingPort = NULL;
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}
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return true;
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}
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@ -170,11 +178,11 @@ Bus::recvRetry(int id)
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if (retryList.size()) {
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retryingPort = retryList.front();
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retryingPort->sendRetry();
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//If the retryingPort pointer isn't null, either sendTiming wasn't
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//called, or it was and the packet was successfully sent.
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// If the retryingPort pointer isn't null, sendTiming wasn't called
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if (retryingPort) {
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warn("sendRetry didn't call sendTiming\n");
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retryList.pop_front();
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retryingPort = 0;
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retryingPort = NULL;
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}
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}
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}
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@ -54,7 +54,7 @@ class Bus : public MemObject
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int busId;
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/** the clock speed for the bus */
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int clock;
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/** the width of the bus in bits */
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/** the width of the bus in bytes */
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int width;
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/** the next tick at which the bus will be idle */
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Tick tickNextIdle;
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@ -230,7 +230,7 @@ class Bus : public MemObject
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} else {
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// The device was retrying a packet. It didn't work, so we'll leave
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// it at the head of the retry list.
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retryingPort = 0;
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retryingPort = NULL;
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// We shouldn't be receiving a packet from one port when a different
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// one is retrying.
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@ -250,7 +250,7 @@ class Bus : public MemObject
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Bus(const std::string &n, int bus_id, int _clock, int _width)
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: MemObject(n), busId(bus_id), clock(_clock), width(_width),
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tickNextIdle(0), busIdle(this), retryingPort(0), defaultPort(NULL)
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tickNextIdle(0), busIdle(this), retryingPort(NULL), defaultPort(NULL)
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{
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//Both the width and clock period must be positive
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assert(width);
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@ -7,4 +7,4 @@ class Bus(MemObject):
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default = Port("Default port for requests that aren't handeled by a device.")
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bus_id = Param.Int(0, "blah")
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clock = Param.Clock("1GHz", "bus clock speed")
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width = Param.Int(64, "bus width (bits)")
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width = Param.Int(64, "bus width (bytes)")
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