Rearrange the FS configs to be more shared. Also check in the full-system tests. Reference stats coming soon.

configs/test/fs.py:
    Pull out a lot of common code and put it into configs/common/FSConfig.py.

--HG--
extra : convert_revision : 175b18d75f82ddecbcc9a6418fe40df314db55d5
This commit is contained in:
Kevin Lim 2006-07-21 15:56:35 -04:00
parent acf9cf21a2
commit a6c2e5cca0
3 changed files with 125 additions and 81 deletions

104
configs/common/FSConfig.py Normal file
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@ -0,0 +1,104 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Kevin Lim
import m5
from m5.objects import *
from FullO3Config import *
from SysPaths import *
from Util import *
script.dir = '/z/saidi/work/m5.newmem/configs/boot'
linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img'))
class CowIdeDisk(IdeDisk):
image = CowDiskImage(child=RawDiskImage(read_only=True),
read_only=False)
def childImage(self, ci):
self.image.child.image_file = ci
class BaseTsunami(Tsunami):
ethernet = NSGigE(configdata=NSGigEPciData(),
pci_bus=0, pci_dev=1, pci_func=0)
etherint = NSGigEInt(device=Parent.ethernet)
ide = IdeController(disks=[Parent.disk0, Parent.disk2],
pci_func=0, pci_dev=0, pci_bus=0)
def MyLinuxAlphaSystem(cpu, mem_mode, linux_image, icache=None, dcache=None, l2cache=None):
self = LinuxAlphaSystem()
self.iobus = Bus(bus_id=0)
self.membus = Bus(bus_id=1)
self.bridge = Bridge()
self.physmem = PhysicalMemory(range = AddrRange('128MB'))
self.bridge.side_a = self.iobus.port
self.bridge.side_b = self.membus.port
self.physmem.port = self.membus.port
self.disk0 = CowIdeDisk(driveID='master')
self.disk2 = CowIdeDisk(driveID='master')
self.disk0.childImage(linux_image)
self.disk2.childImage(disk('linux-bigswap2.img'))
self.tsunami = BaseTsunami()
self.tsunami.attachIO(self.iobus)
self.tsunami.ide.pio = self.iobus.port
self.tsunami.ide.dma = self.iobus.port
self.tsunami.ide.config = self.iobus.port
self.tsunami.ethernet.pio = self.iobus.port
self.tsunami.ethernet.dma = self.iobus.port
self.tsunami.ethernet.config = self.iobus.port
self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = linux_image,
read_only = True))
self.intrctrl = IntrControl()
self.cpu = cpu
connectCpu(self.cpu, self.membus, icache, dcache, l2cache)
for each_cpu in listWrapper(self.cpu):
each_cpu.itb = AlphaITB()
each_cpu.dtb = AlphaDTB()
self.cpu.clock = '2GHz'
self.sim_console = SimConsole(listener=ConsoleListener(port=3456))
self.kernel = binary('vmlinux')
self.pal = binary('ts_osfpal')
self.console = binary('console')
self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
return self
class TsunamiRoot(Root):
pass
def DualRoot(clientSystem, serverSystem):
self = Root()
self.client = clientSystem
self.server = serverSystem
self.etherdump = EtherDump(file='ethertrace')
self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0],
int2 = Parent.server.tsunami.etherint[0],
dump = Parent.etherdump)
self.clock = '1THz'
return self

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@ -2,8 +2,10 @@ import optparse, os, sys
import m5 import m5
from m5.objects import * from m5.objects import *
m5.AddToPath('../common')
from FSConfig import *
from SysPaths import * from SysPaths import *
from FullO3Config import * from Util import *
parser = optparse.OptionParser() parser = optparse.OptionParser()
@ -19,90 +21,27 @@ if args:
print "Error: script doesn't take any positional arguments" print "Error: script doesn't take any positional arguments"
sys.exit(1) sys.exit(1)
# Base for tests is directory containing this file. if options.detailed:
test_base = os.path.dirname(__file__) cpu = DetailedO3CPU()
cpu2 = DetailedO3CPU()
script.dir = '/z/saidi/work/m5.newmem/configs/boot' mem_mode = 'Timing'
elif options.timing:
linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img')) cpu = TimingSimpleCPU()
cpu2 = TimingSimpleCPU()
class CowIdeDisk(IdeDisk): mem_mode = 'Timing'
image = CowDiskImage(child=RawDiskImage(read_only=True), else:
read_only=False) cpu = AtomicSimpleCPU()
cpu2 = AtomicSimpleCPU()
def childImage(self, ci): mem_mode = 'Atomic'
self.image.child.image_file = ci
class BaseTsunami(Tsunami):
ethernet = NSGigE(configdata=NSGigEPciData(),
pci_bus=0, pci_dev=1, pci_func=0)
etherint = NSGigEInt(device=Parent.ethernet)
ide = IdeController(disks=[Parent.disk0, Parent.disk2],
pci_func=0, pci_dev=0, pci_bus=0)
class MyLinuxAlphaSystem(LinuxAlphaSystem):
iobus = Bus(bus_id=0)
membus = Bus(bus_id=1)
bridge = Bridge()
physmem = PhysicalMemory(range = AddrRange('128MB'))
bridge.side_a = iobus.port
bridge.side_b = membus.port
physmem.port = membus.port
disk0 = CowIdeDisk(driveID='master')
disk2 = CowIdeDisk(driveID='master')
disk0.childImage(linux_image)
disk2.childImage(disk('linux-bigswap2.img'))
tsunami = BaseTsunami()
tsunami.attachIO(iobus)
tsunami.ide.pio = iobus.port
tsunami.ide.dma = iobus.port
tsunami.ide.config = iobus.port
tsunami.ethernet.pio = iobus.port
tsunami.ethernet.dma = iobus.port
tsunami.ethernet.config = iobus.port
simple_disk = SimpleDisk(disk=RawDiskImage(image_file = linux_image,
read_only = True))
intrctrl = IntrControl()
if options.detailed:
cpu = DetailedO3CPU()
elif options.timing:
cpu = TimingSimpleCPU()
mem_mode = 'timing'
else:
cpu = AtomicSimpleCPU()
cpu.mem = membus
cpu.icache_port = membus.port
cpu.dcache_port = membus.port
cpu.itb = AlphaITB()
cpu.dtb = AlphaDTB()
cpu.clock = '2GHz'
sim_console = SimConsole(listener=ConsoleListener(port=3456))
kernel = binary('vmlinux')
pal = binary('ts_osfpal')
console = binary('console')
boot_osflags = 'root=/dev/hda1 console=ttyS0'
class TsunamiRoot(Root):
pass
def DualRoot(clientSystem, serverSystem):
self = Root()
self.client = clientSystem
self.server = serverSystem
self.etherdump = EtherDump(file='ethertrace')
self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0],
int2 = Parent.server.tsunami.etherint[0],
dump = Parent.etherdump)
self.clock = '1THz'
return self
if options.dual: if options.dual:
root = DualRoot( root = DualRoot(
MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')), MyLinuxAlphaSystem(cpu, mem_mode, linux_image),
MyLinuxAlphaSystem(readfile=script('netperf-server.rcS'))) MyLinuxAlphaSystem(cpu2, mem_mode, linux_image))
root.client.readfile = script('netperf-stream-nt-client.rcS')
root.server.readfile = script('netperf-server.rcS')
else: else:
root = TsunamiRoot(clock = '2GHz', system = MyLinuxAlphaSystem()) root = TsunamiRoot(clock = '2GHz', system = MyLinuxAlphaSystem(cpu, mem_mode, linux_image))
m5.instantiate(root) m5.instantiate(root)

1
tests/halt.sh Normal file
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m5 exit