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change from bootStrap* to using the cpuStack array for setting up

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other processor stacks
This commit is contained in:
Ali Saidi 2006-02-23 15:00:04 -05:00
parent c3d47c1de8
commit a50e054ced
2 changed files with 20 additions and 8 deletions
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5
system/alpha/console/console.c
View file

@ -187,8 +187,6 @@ main(int argc, char **argv)
m5Conf.diskOperation = m5AlphaAccess->diskOperation;
m5Conf.outputChar = m5AlphaAccess->outputChar;
m5Conf.inputChar = m5AlphaAccess->inputChar;
m5Conf.bootStrapImpure = m5AlphaAccess->bootStrapImpure;
m5Conf.bootStrapCPU = m5AlphaAccess->bootStrapCPU;
if (m5Conf.version != ALPHA_ACCESS_VERSION) {
panic("Console version mismatch. Console expects %d. has %d \n",
@ -743,8 +741,7 @@ unixBoot(int argc, char **argv)
for (i = 1; i < m5Conf.numCPUs; i++) {
ulong stack = (ulong)unix_boot_alloc(1);
printf_lock("Bootstraping CPU %d with sp=0x%x\n", i, stack);
m5AlphaAccess->bootStrapImpure = stack;
m5AlphaAccess->bootStrapCPU = i;
m5AlphaAccess->cpuStack[i] = stack;
}
/*

23
system/alpha/console/dbmentry.S
View file

@ -56,6 +56,7 @@
*/
#include "fromHudsonOsf.h"
.extern myAlphaAccess
.text
/* return address and padding to octaword align */
@ -68,11 +69,24 @@ _entry:
br t0, 2f # get the current PC
2: ldgp gp, 0(t0) # init gp
/*
* SimOS. Stack pointer is start of a valid phys or KSEG page
*/
/* Processor 0 start stack frame is begining of physical memory (0)
Other processors spin here waiting to get their stacks from
Processor 0, then they can progress as normal.
*/
call_pal PAL_WHAMI_ENTRY
beq v0, cpuz
ldq t3, m5AlphaAccess
addq t3,0x70,t3 # *** If offset in console alpha access struct changes
# This must be changed as well!
bis zero,8,t4
mulq t4,v0,t4
addq t3,t4,t3
cpuwait: ldq t4, 0(t3)
beq t4, cpuwait
bis t4,t4,sp
bis sp,sp,s0 /* save sp */
cpuz: bis sp,sp,s0 /* save sp */
slave: lda v0,(8*1024)(sp) /* end of page */
@ -96,6 +110,7 @@ slave: lda v0,(8*1024)(sp) /* end of page */
* Every good C program has a main()
*/
/* If stack pointer was 0, then this is CPU0*/
beq s0,master
call_pal PAL_WHAMI_ENTRY