x86: x86 instruction-implementation bug fixes

Added explicit data sizes and an opcode type for correct execution.
This commit is contained in:
David Hashe 2015-07-20 09:15:18 -05:00
parent 9560893f0d
commit a2d9aae3c3
3 changed files with 13 additions and 5 deletions

View file

@ -1,4 +1,5 @@
// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
// Copyright (c) 2012-2013 AMD
// All rights reserved.
//
// The license below extends only to copyright in the software and shall
@ -361,6 +362,11 @@
0x3: MOV(Dd,Rd);
default: UD2();
}
// operand size (0x66)
0x1: decode OPCODE_OP_BOTTOM3 {
0x0: MOV(Rd,Cd);
0x2: MOV(Cd,Rd);
}
default: UD2();
}
0x05: decode LEGACY_DECODEVAL {

View file

@ -1,4 +1,5 @@
# Copyright (c) 2007 The Hewlett-Packard Development Company
# Copyright (c) 2012-2013 AMD
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@ -127,9 +128,9 @@ farJmpProcessDescriptor:
rcri t0, t4, 13, flags=(ECF,), dataSize=2
br rom_local_label("farJmpSystemDescriptor"), flags=(nCECF,)
chks t2, t4, CSCheck, dataSize=8
wrdl cs, t4, t2
wrsel cs, t2
wrip t0, t1
wrdl cs, t4, t2, dataSize=4
wrsel cs, t2, dataSize=4
wrip t0, t1, dataSize=4
eret
farJmpSystemDescriptor:

View file

@ -1,4 +1,5 @@
# Copyright (c) 2007 The Hewlett-Packard Development Company
# Copyright (c) 2012-2013 AMD
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@ -78,7 +79,7 @@ def macroop LGDT_16_M
# Get the base
ld t2, seg, sib, 'adjustedDisp + 2', dataSize=4
zexti t2, t2, 23, dataSize=8
wrbase tsg, t2
wrbase tsg, t2, dataSize=8
wrlimit tsg, t1
};
@ -139,7 +140,7 @@ def macroop LIDT_16_M
# Get the base
ld t2, seg, sib, 'adjustedDisp + 2', dataSize=4
zexti t2, t2, 23, dataSize=8
wrbase idtr, t2
wrbase idtr, t2, dataSize=8
wrlimit idtr, t1
};