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X86: Refine the local APIC.

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--HG--
extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
This commit is contained in:
Gabe Black 2008-03-06 20:37:28 -05:00
parent 66aaabf4ae
commit a245b0eedf
2 changed files with 22 additions and 39 deletions
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59
src/arch/x86/miscregfile.cc
View file

@ -156,12 +156,8 @@ MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
case MISCREG_APIC_DESTINATION_FORMAT:
panic("Local APIC Destination Format register unimplemented.\n");
break;
case MISCREG_APIC_SPURIOUS_INTERRUPT_VECTOR:
panic("Local APIC Spurious Interrupt Vector"
" register unimplemented.\n");
break;
case MISCREG_APIC_ERROR_STATUS:
panic("Local APIC Error Status register unimplemented.\n");
regVal[MISCREG_APIC_INTERNAL_STATE] &= ~ULL(0x1);
break;
case MISCREG_APIC_INTERRUPT_COMMAND_LOW:
panic("Local APIC Interrupt Command low"
@ -171,25 +167,6 @@ MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
panic("Local APIC Interrupt Command high"
" register unimplemented.\n");
break;
case MISCREG_APIC_LVT_TIMER:
panic("Local APIC LVT Timer register unimplemented.\n");
break;
case MISCREG_APIC_LVT_THERMAL_SENSOR:
panic("Local APIC LVT Thermal Sensor register unimplemented.\n");
break;
case MISCREG_APIC_LVT_PERFORMANCE_MONITORING_COUNTERS:
panic("Local APIC LVT Performance Monitoring Counters"
" register unimplemented.\n");
break;
case MISCREG_APIC_LVT_LINT0:
panic("Local APIC LVT LINT0 register unimplemented.\n");
break;
case MISCREG_APIC_LVT_LINT1:
panic("Local APIC LVT LINT1 register unimplemented.\n");
break;
case MISCREG_APIC_LVT_ERROR:
panic("Local APIC LVT Error register unimplemented.\n");
break;
case MISCREG_APIC_INITIAL_COUNT:
panic("Local APIC Initial Count register unimplemented.\n");
break;
@ -261,11 +238,22 @@ void MiscRegFile::setReg(int miscReg,
panic("Local APIC Destination Format register unimplemented.\n");
break;
case MISCREG_APIC_SPURIOUS_INTERRUPT_VECTOR:
panic("Local APIC Spurious Interrupt Vector"
" register unimplemented.\n");
regVal[MISCREG_APIC_INTERNAL_STATE] &= ~ULL(1 << 1);
regVal[MISCREG_APIC_INTERNAL_STATE] |= val & (1 << 8);
if (val & (1 << 9))
warn("Focus processor checking not implemented.\n");
break;
case MISCREG_APIC_ERROR_STATUS:
panic("Local APIC Error Status register unimplemented.\n");
{
if (regVal[MISCREG_APIC_INTERNAL_STATE] & 0x1) {
regVal[MISCREG_APIC_INTERNAL_STATE] &= ~ULL(0x1);
newVal = 0;
} else {
regVal[MISCREG_APIC_INTERNAL_STATE] |= ULL(0x1);
return;
}
}
break;
case MISCREG_APIC_INTERRUPT_COMMAND_LOW:
panic("Local APIC Interrupt Command low"
@ -276,23 +264,16 @@ void MiscRegFile::setReg(int miscReg,
" register unimplemented.\n");
break;
case MISCREG_APIC_LVT_TIMER:
panic("Local APIC LVT Timer register unimplemented.\n");
break;
case MISCREG_APIC_LVT_THERMAL_SENSOR:
panic("Local APIC LVT Thermal Sensor register unimplemented.\n");
break;
case MISCREG_APIC_LVT_PERFORMANCE_MONITORING_COUNTERS:
panic("Local APIC LVT Performance Monitoring Counters"
" register unimplemented.\n");
break;
case MISCREG_APIC_LVT_LINT0:
panic("Local APIC LVT LINT0 register unimplemented.\n");
break;
case MISCREG_APIC_LVT_LINT1:
panic("Local APIC LVT LINT1 register unimplemented.\n");
break;
case MISCREG_APIC_LVT_ERROR:
panic("Local APIC LVT Error register unimplemented.\n");
{
uint64_t readOnlyMask = (1 << 12) | (1 << 14);
newVal = (val & ~readOnlyMask) |
(regVal[miscReg] & readOnlyMask);
}
break;
case MISCREG_APIC_INITIAL_COUNT:
panic("Local APIC Initial Count register unimplemented.\n");

2
src/arch/x86/miscregs.hh
View file

@ -373,6 +373,8 @@ namespace X86ISA
MISCREG_APIC_DIVIDE_COUNT,
MISCREG_APIC_END = MISCREG_APIC_DIVIDE_COUNT,
MISCREG_APIC_INTERNAL_STATE,
// "Fake" MSRs for internally implemented devices
MISCREG_PCI_CONFIG_ADDRESS,