Update O3 ref outputs: very minor stats change due to previous cset.
(from Steve on behalf of m5test). --HG-- extra : convert_revision : 696efdaa3dd7680dfc9c797a6a46a5053238c7d2
This commit is contained in:
Steve Reinhardt
parent
0b6876a0c0
commit
a1d5beab95
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@ -368,9 +368,10 @@ cwd=
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egid=100
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env=
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euid=100
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executable=tests/test-progs/hello/bin/alpha/linux/hello
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executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
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gid=100
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input=cin
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max_stack_size=67108864
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output=cout
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pid=100
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ppid=99
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@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 409 # Nu
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global.BPredUnit.condPredicted 1184 # Number of conditional branches predicted
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global.BPredUnit.lookups 2029 # Number of BP lookups
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global.BPredUnit.usedRAS 277 # Number of times the RAS was used to get a target.
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host_inst_rate 84357 # Simulator instruction rate (inst/s)
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host_mem_usage 197344 # Number of bytes of host memory used
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host_seconds 0.07 # Real time elapsed on the host
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host_tick_rate 71887995 # Simulator tick rate (ticks/s)
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host_inst_rate 61994 # Simulator instruction rate (inst/s)
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host_mem_usage 152004 # Number of bytes of host memory used
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host_seconds 0.09 # Real time elapsed on the host
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host_tick_rate 52834669 # Simulator tick rate (ticks/s)
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memdepunit.memDep.conflictingLoads 23 # Number of conflicting loads.
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memdepunit.memDep.conflictingStores 124 # Number of conflicting stores.
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memdepunit.memDep.insertedLoads 2030 # Number of loads inserted to the mem dependence unit.
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@ -21,7 +21,7 @@ sim_insts 5623 # Nu
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sim_seconds 0.000005 # Number of seconds simulated
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sim_ticks 4806000 # Number of ticks simulated
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system.cpu.commit.COM:branches 862 # Number of branches committed
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system.cpu.commit.COM:bw_lim_events 85 # number cycles where commit BW limit reached
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system.cpu.commit.COM:bw_lim_events 86 # number cycles where commit BW limit reached
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system.cpu.commit.COM:bw_limited 0 # number of insts not committed due to BW limits
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system.cpu.commit.COM:committed_per_cycle.start_dist # Number of insts commited each cycle
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system.cpu.commit.COM:committed_per_cycle.samples 8660
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@ -29,12 +29,12 @@ system.cpu.commit.COM:committed_per_cycle.min_value 0
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0 6353 7336.03%
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1 1192 1376.44%
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2 402 464.20%
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3 185 213.63%
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3 186 214.78%
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4 132 152.42%
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5 93 107.39%
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6 110 127.02%
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5 92 106.24%
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6 109 125.87%
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7 108 124.71%
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8 85 98.15%
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8 86 99.31%
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system.cpu.commit.COM:committed_per_cycle.max_value 8
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system.cpu.commit.COM:committed_per_cycle.end_dist
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@ -241,12 +241,12 @@ system.cpu.iew.EXEC:rate 0.833975 # In
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system.cpu.iew.EXEC:refs 2660 # number of memory reference insts executed
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system.cpu.iew.EXEC:stores 1006 # Number of stores executed
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system.cpu.iew.EXEC:swp 0 # number of swp insts executed
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system.cpu.iew.WB:consumers 5426 # num instructions consuming a value
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system.cpu.iew.WB:consumers 5428 # num instructions consuming a value
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system.cpu.iew.WB:count 7664 # cumulative count of insts written-back
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system.cpu.iew.WB:fanout 0.742905 # average fanout of values written-back
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system.cpu.iew.WB:fanout 0.742815 # average fanout of values written-back
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system.cpu.iew.WB:penalized 0 # number of instrctions required to write to 'other' IQ
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system.cpu.iew.WB:penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ
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system.cpu.iew.WB:producers 4031 # num instructions producing a value
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system.cpu.iew.WB:producers 4032 # num instructions producing a value
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system.cpu.iew.WB:rate 0.797254 # insts written-back per cycle
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system.cpu.iew.WB:sent 7781 # cumulative count of insts sent to commit
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system.cpu.iew.branchMispredicts 401 # Number of branch mispredicts detected at execute
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@ -318,9 +318,9 @@ system.cpu.iq.ISSUE:issued_per_cycle.start_dist # Number of
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system.cpu.iq.ISSUE:issued_per_cycle.samples 9449
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system.cpu.iq.ISSUE:issued_per_cycle.min_value 0
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0 6104 6459.94%
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1 1119 1184.25%
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2 811 858.29%
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3 592 626.52%
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1 1118 1183.19%
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2 813 860.41%
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3 591 625.46%
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4 460 486.82%
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5 212 224.36%
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6 105 111.12%
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@ -1,2 +1,3 @@
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0: system.remote_gdb.listener: listening for remote gdb on port 7000
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warn: Entering event queue @ 0. Starting simulation...
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warn: Increasing stack size by one page.
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@ -6,9 +6,9 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Aug 13 2007 17:39:24
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M5 started Mon Aug 13 17:39:25 2007
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M5 executing on nacho
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M5 compiled Jan 15 2008 08:14:31
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M5 started Tue Jan 15 08:12:22 2008
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M5 executing on m45-034.pool
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/linux/o3-timing tests/run.py quick/00.hello/alpha/linux/o3-timing
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Global frequency set at 1000000000000 ticks per second
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Exiting @ tick 4806000 because target called exit()
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@ -368,9 +368,10 @@ cwd=
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egid=100
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env=
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euid=100
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executable=tests/test-progs/hello/bin/alpha/tru64/hello
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executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
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gid=100
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input=cin
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max_stack_size=67108864
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output=cout
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pid=100
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ppid=99
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@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 213 # Nu
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global.BPredUnit.condPredicted 401 # Number of conditional branches predicted
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global.BPredUnit.lookups 824 # Number of BP lookups
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global.BPredUnit.usedRAS 163 # Number of times the RAS was used to get a target.
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host_inst_rate 66708 # Simulator instruction rate (inst/s)
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host_mem_usage 196356 # Number of bytes of host memory used
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host_seconds 0.04 # Real time elapsed on the host
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host_tick_rate 66966767 # Simulator tick rate (ticks/s)
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host_inst_rate 1500 # Simulator instruction rate (inst/s)
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host_mem_usage 151288 # Number of bytes of host memory used
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host_seconds 1.59 # Real time elapsed on the host
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host_tick_rate 1513804 # Simulator tick rate (ticks/s)
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memdepunit.memDep.conflictingLoads 7 # Number of conflicting loads.
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memdepunit.memDep.conflictingStores 7 # Number of conflicting stores.
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memdepunit.memDep.insertedLoads 698 # Number of loads inserted to the mem dependence unit.
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@ -26,9 +26,9 @@ system.cpu.commit.COM:bw_limited 0 # nu
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system.cpu.commit.COM:committed_per_cycle.start_dist # Number of insts commited each cycle
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system.cpu.commit.COM:committed_per_cycle.samples 4452
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system.cpu.commit.COM:committed_per_cycle.min_value 0
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0 3490 7839.17%
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1 258 579.51%
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2 340 763.70%
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0 3491 7841.42%
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1 256 575.02%
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2 341 765.95%
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3 140 314.47%
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4 70 157.23%
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5 70 157.23%
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@ -1,3 +1,4 @@
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0: system.remote_gdb.listener: listening for remote gdb on port 7000
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warn: Entering event queue @ 0. Starting simulation...
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warn: Increasing stack size by one page.
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warn: ignoring syscall sigprocmask(1, 18446744073709547831, ...)
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@ -6,9 +6,9 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Aug 13 2007 17:39:24
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M5 started Mon Aug 13 17:39:27 2007
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M5 executing on nacho
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M5 compiled Jan 15 2008 08:14:31
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M5 started Tue Jan 15 08:12:16 2008
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M5 executing on m45-034.pool
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/o3-timing tests/run.py quick/00.hello/alpha/tru64/o3-timing
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Global frequency set at 1000000000000 ticks per second
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Exiting @ tick 2410000 because target called exit()
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@ -371,6 +371,7 @@ euid=100
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executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
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gid=100
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input=cin
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max_stack_size=67108864
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output=cout
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pid=100
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ppid=99
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@ -387,6 +388,7 @@ euid=100
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executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
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gid=100
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input=cin
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max_stack_size=67108864
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output=cout
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pid=100
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ppid=99
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@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect 1092 # Nu
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global.BPredUnit.condPredicted 2350 # Number of conditional branches predicted
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global.BPredUnit.lookups 4075 # Number of BP lookups
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global.BPredUnit.usedRAS 561 # Number of times the RAS was used to get a target.
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host_inst_rate 92493 # Simulator instruction rate (inst/s)
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host_mem_usage 197924 # Number of bytes of host memory used
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host_seconds 0.12 # Real time elapsed on the host
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host_tick_rate 47019704 # Simulator tick rate (ticks/s)
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host_inst_rate 64609 # Simulator instruction rate (inst/s)
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host_mem_usage 152616 # Number of bytes of host memory used
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host_seconds 0.17 # Real time elapsed on the host
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host_tick_rate 32849793 # Simulator tick rate (ticks/s)
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memdepunit.memDep.conflictingLoads 14 # Number of conflicting loads.
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memdepunit.memDep.conflictingLoads 12 # Number of conflicting loads.
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memdepunit.memDep.conflictingStores 35 # Number of conflicting stores.
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@ -34,10 +34,10 @@ system.cpu.commit.COM:bw_limited_1 0 # nu
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system.cpu.commit.COM:committed_per_cycle.start_dist # Number of insts commited each cycle
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system.cpu.commit.COM:committed_per_cycle.samples 11403
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system.cpu.commit.COM:committed_per_cycle.min_value 0
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0 6781 5946.68%
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1 2144 1880.21%
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2 950 833.11%
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3 495 434.10%
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0 6780 5945.80%
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1 2145 1881.08%
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2 951 833.99%
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3 494 433.22%
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4 331 290.27%
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5 216 189.42%
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6 215 188.55%
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@ -1,3 +1,5 @@
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0: system.remote_gdb.listener: listening for remote gdb on port 7000
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0: system.remote_gdb.listener: listening for remote gdb on port 7001
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warn: Entering event queue @ 0. Starting simulation...
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warn: Increasing stack size by one page.
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warn: Increasing stack size by one page.
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@ -7,9 +7,9 @@ The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Aug 14 2007 15:45:23
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M5 started Tue Aug 14 15:45:27 2007
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M5 executing on nacho
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M5 compiled Jan 15 2008 08:14:31
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M5 started Tue Jan 15 08:14:22 2008
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M5 executing on m45-038.pool
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/01.hello-2T-smt/alpha/linux/o3-timing tests/run.py quick/01.hello-2T-smt/alpha/linux/o3-timing
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Global frequency set at 1000000000000 ticks per second
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Exiting @ tick 5727000 because target called exit()
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