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o3: Fix occupancy checks for SMT

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A number of calls to isEmpty() and numFreeEntries()
should be thread-specific.

In cpu.cc, the fact that tid is /*commented*/ out is a bug. Say the rob
has instructions from thread 0 (isEmpty() returns false), and none from
thread 1. If we are trying to squash all of thread 1, then
readTailInst(thread 1) will be called because rob->isEmpty() returns
false. The result is end_it is not in the list and the while
statement loops indefinitely back over the cpu's instList.

In iew_impl.hh, all threads are told they have the entire remaining IQ, when
each thread actually has a certain allocation. The result is extra stalls at
the iew dispatch stage which the rename stage usually takes care of.

In commit_impl.hh, rob->readHeadInst(thread 1) can be called if the rob only
contains instructions from thread 0. This returns a dummyInst (which may work
since we are trying to squash all instructions, but hardly seems like the right
way to do it).

In rob_impl.hh this fix skips the rest of the function more frequently and is
more efficient.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
This commit is contained in:
Faissal Sleiman 2014-04-19 09:00:30 -05:00
parent d9fa950396
commit a1570f544f
4 changed files with 4 additions and 4 deletions
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2
src/cpu/o3/commit_impl.hh
View file

@ -561,7 +561,7 @@ DefaultCommit<Impl>::squashAll(ThreadID tid)
// then use one older sequence number.
// Hopefully this doesn't mess things up. Basically I want to squash
// all instructions of this thread.
InstSeqNum squashed_inst = rob->isEmpty() ?
InstSeqNum squashed_inst = rob->isEmpty(tid) ?
lastCommitedSeqNum[tid] : rob->readHeadInst(tid)->seqNum - 1;
// All younger instructions will be squashed. Set the sequence

2
src/cpu/o3/cpu.cc
View file

@ -1640,7 +1640,7 @@ FullO3CPU<Impl>::removeInstsNotInROB(ThreadID tid)
if (instList.empty()) {
return;
} else if (rob.isEmpty(/*tid*/)) {
} else if (rob.isEmpty(tid)) {
DPRINTF(O3CPU, "ROB is empty, squashing all insts.\n");
end_it = instList.begin();
rob_empty = true;

2
src/cpu/o3/iew_impl.hh
View file

@ -1598,7 +1598,7 @@ DefaultIEW<Impl>::tick()
toRename->iewInfo[tid].usedIQ = true;
toRename->iewInfo[tid].freeIQEntries =
instQueue.numFreeEntries();
instQueue.numFreeEntries(tid);
toRename->iewInfo[tid].usedLSQ = true;
toRename->iewInfo[tid].freeLSQEntries =
ldstQueue.numFreeEntries(tid);

2
src/cpu/o3/rob_impl.hh
View file

@ -486,7 +486,7 @@ template <class Impl>
void
ROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid)
{
if (isEmpty()) {
if (isEmpty(tid)) {
DPRINTF(ROB, "Does not need to squash due to being empty "
"[sn:%i]\n",
squash_num);