CPU: Unify initMemProxies across CPUs and simulation modes
This patch unifies where initMemProxies is called, in the init() method of each BaseCPU subclass, before TheISA::initCPU is called. Moreover, it also ensures that initMemProxies is called in both full-system and syscall-emulation mode, thus unifying also across the modes. An additional check is added in the ThreadState to ensure that initMemProxies is only called once.
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6 changed files with 39 additions and 39 deletions
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@ -787,21 +787,20 @@ InOrderCPU::tick()
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void
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InOrderCPU::init()
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{
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if (!deferRegistration) {
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registerThreadContexts();
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}
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BaseCPU::init();
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for (ThreadID tid = 0; tid < numThreads; ++tid) {
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// Set inSyscall so that the CPU doesn't squash when initially
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// setting up registers.
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for (ThreadID tid = 0; tid < numThreads; ++tid)
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thread[tid]->inSyscall = true;
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// Initialise the ThreadContext's memory proxies
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thread[tid]->initMemProxies(thread[tid]->getTC());
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}
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if (FullSystem) {
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for (ThreadID tid = 0; tid < numThreads; tid++) {
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ThreadContext *src_tc = threadContexts[tid];
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TheISA::initCPU(src_tc, src_tc->contextId());
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// Initialise the ThreadContext's memory proxies
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thread[tid]->initMemProxies(thread[tid]->getTC());
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}
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}
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@ -639,10 +639,13 @@ FullO3CPU<Impl>::init()
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{
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BaseCPU::init();
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for (ThreadID tid = 0; tid < numThreads; ++tid) {
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// Set inSyscall so that the CPU doesn't squash when initially
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// setting up registers.
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for (ThreadID tid = 0; tid < numThreads; ++tid)
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thread[tid]->inSyscall = true;
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// Initialise the ThreadContext's memory proxies
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thread[tid]->initMemProxies(thread[tid]->getTC());
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}
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// this CPU could still be unconnected if we are restoring from a
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// checkpoint and this CPU is to be switched in, thus we can only
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@ -655,8 +658,6 @@ FullO3CPU<Impl>::init()
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for (ThreadID tid = 0; tid < numThreads; tid++) {
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ThreadContext *src_tc = threadContexts[tid];
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TheISA::initCPU(src_tc, src_tc->contextId());
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// Initialise the ThreadContext's memory proxies
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thread[tid]->initMemProxies(thread[tid]->getTC());
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}
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}
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@ -80,6 +80,10 @@ void
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AtomicSimpleCPU::init()
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{
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BaseCPU::init();
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// Initialise the ThreadContext's memory proxies
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tcBase()->initMemProxies(tcBase());
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if (FullSystem) {
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ThreadID size = threadContexts.size();
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for (ThreadID i = 0; i < size; ++i) {
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@ -89,9 +93,6 @@ AtomicSimpleCPU::init()
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}
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}
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// Initialise the ThreadContext's memory proxies
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tcBase()->initMemProxies(tcBase());
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if (hasPhysMemPort) {
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AddrRangeList pmAddrList = physmemPort.getPeer()->getAddrRanges();
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physMemAddr = *pmAddrList.begin();
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@ -64,6 +64,10 @@ void
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TimingSimpleCPU::init()
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{
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BaseCPU::init();
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// Initialise the ThreadContext's memory proxies
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tcBase()->initMemProxies(tcBase());
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if (FullSystem) {
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for (int i = 0; i < threadContexts.size(); ++i) {
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ThreadContext *tc = threadContexts[i];
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@ -71,9 +75,6 @@ TimingSimpleCPU::init()
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TheISA::initCPU(tc, _cpuId);
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}
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}
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// Initialise the ThreadContext's memory proxies
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tcBase()->initMemProxies(tcBase());
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}
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void
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@ -101,17 +101,25 @@ ThreadState::unserialize(Checkpoint *cp, const std::string §ion)
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void
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ThreadState::initMemProxies(ThreadContext *tc)
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{
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// Note that this only refers to the port on the CPU side and can
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// safely be done at init() time even if the CPU is not connected
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// (i.e. due to restoring from a checkpoint and later switching
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// in.
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if (physProxy == NULL)
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// this cannot be done in the constructor as the thread state
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// The port proxies only refer to the data port on the CPU side
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// and can safely be done at init() time even if the CPU is not
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// connected, i.e. when restoring from a checkpoint and later
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// switching the CPU in.
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if (FullSystem) {
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assert(physProxy == NULL);
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// This cannot be done in the constructor as the thread state
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// itself is created in the base cpu constructor and the
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// getPort is a virtual function at the moment
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// getDataPort is a virtual function
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physProxy = new PortProxy(baseCpu->getDataPort());
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if (virtProxy == NULL)
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assert(virtProxy == NULL);
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virtProxy = new FSTranslatingPortProxy(tc);
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} else {
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assert(proxy == NULL);
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proxy = new SETranslatingPortProxy(baseCpu->getDataPort(),
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process,
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SETranslatingPortProxy::NextPage);
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}
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}
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void
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@ -127,13 +135,3 @@ ThreadState::profileSample()
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if (profile)
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profile->sample(profileNode, profilePC);
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}
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SETranslatingPortProxy &
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ThreadState::getMemProxy()
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{
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if (proxy == NULL)
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proxy = new SETranslatingPortProxy(baseCpu->getDataPort(),
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process,
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SETranslatingPortProxy::NextPage);
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return *proxy;
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}
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@ -85,7 +85,7 @@ struct ThreadState {
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* Initialise the physical and virtual port proxies and tie them to
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* the data port of the CPU.
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*
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* tc ThreadContext for the virtual-to-physical translation
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* @param tc ThreadContext for the virtual-to-physical translation
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*/
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void initMemProxies(ThreadContext *tc);
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@ -105,7 +105,7 @@ struct ThreadState {
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Process *getProcessPtr() { return process; }
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SETranslatingPortProxy &getMemProxy();
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SETranslatingPortProxy &getMemProxy() { return *proxy; }
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/** Reads the number of instructions functionally executed and
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* committed.
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