IGbE: Remove is8257 variable
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1704ba2273
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9f89d43b65
2 changed files with 8 additions and 13 deletions
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@ -69,7 +69,6 @@ class EtherDevice(PciDevice):
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class IGbE(EtherDevice):
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# Base class for two IGbE adapters listed above
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type = 'IGbE'
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#abstract = True
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hardware_address = Param.EthernetAddr(NextEthernetAddr,
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"Ethernet Hardware Address")
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use_flow_control = Param.Bool(False,
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@ -105,20 +104,22 @@ class IGbE(EtherDevice):
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wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs")
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tx_read_delay = Param.Latency('0ns', "delay after tx dma read")
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rx_write_delay = Param.Latency('0ns', "delay after rx dma read")
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is8257 = Param.Bool("Select between and 8254x and 8257x device")
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phy_pid = Param.UInt16("Phy PID that corresponds to device ID")
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phy_epid = Param.UInt16("Phy EPID that corresponds to device ID")
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class IGbE_e1000(IGbE):
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# Older Intel 8254x based gigabit ethernet adapter
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# Uses Intel e1000 driver
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DeviceID = 0x1075
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is8257 = False
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phy_pid = 0x02A8
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phy_epid = 0x0380
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class IGbE_igb(IGbE):
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# Newer Intel 8257x based gigabit ethernet adapter
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# Uses Intel igb driver and in theory supports packet splitting and LRO
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DeviceID = 0x10C9
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is8257 = True
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phy_pid = 0x0141
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phy_epid = 0x0CC0
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class EtherDevBase(EtherDevice):
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type = 'EtherDevBase'
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@ -446,16 +446,10 @@ IGbE::write(PacketPtr pkt)
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regs.mdic.data(0x796D); // link up
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break;
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case PHY_PID:
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if (params()->is8257)
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regs.mdic.data(0x0141);
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else
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regs.mdic.data(0x02A8);
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regs.mdic.data(params()->phy_pid);
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break;
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case PHY_EPID:
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if (params()->is8257)
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regs.mdic.data(0x0CC0);
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else
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regs.mdic.data(0x0380);
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regs.mdic.data(params()->phy_epid);
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break;
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case PHY_GSTATUS:
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regs.mdic.data(0x7C00);
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