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ruby: remove extra whitespace and correct misspelled words

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This commit is contained in:
Brandon Potter 2015-07-10 16:05:23 -05:00
parent a74c446e7d
commit 9eda4bdc5a
18 changed files with 52 additions and 51 deletions
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2
src/mem/ruby/network/MessageBuffer.hh
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@ -180,7 +180,7 @@ class MessageBuffer
Cycles m_time_last_time_size_checked;
unsigned int m_size_last_time_size_checked;
// variables used so enqueues appear to happen imediately, while
// variables used so enqueues appear to happen immediately, while
// pop happen the next cycle
Cycles m_time_last_time_enqueue;
Tick m_time_last_time_pop;

2
src/mem/ruby/network/Network.hh
View file

@ -61,7 +61,7 @@ class Network : public ClockedObject
typedef RubyNetworkParams Params;
Network(const Params *p);
const Params * params() const
{ return dynamic_cast<const Params *>(_params);}
{ return dynamic_cast<const Params *>(_params); }
virtual ~Network();
virtual void init();

6
src/mem/ruby/network/garnet/BaseGarnetNetwork.hh
View file

@ -48,9 +48,9 @@ class BaseGarnetNetwork : public Network
BaseGarnetNetwork(const Params *p);
void init();
int getNiFlitSize() {return m_ni_flit_size; }
int getVCsPerVnet() {return m_vcs_per_vnet; }
bool isFaultModelEnabled() {return m_enable_fault_model;}
int getNiFlitSize() { return m_ni_flit_size; }
int getVCsPerVnet() { return m_vcs_per_vnet; }
bool isFaultModelEnabled() { return m_enable_fault_model; }
FaultModel* fault_model;
void increment_injected_flits(int vnet) { m_flits_injected[vnet]++; }

4
src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh
View file

@ -54,8 +54,8 @@ class GarnetNetwork_d : public BaseGarnetNetwork
~GarnetNetwork_d();
void init();
int getBuffersPerDataVC() {return m_buffers_per_data_vc; }
int getBuffersPerCtrlVC() {return m_buffers_per_ctrl_vc; }
int getBuffersPerDataVC() { return m_buffers_per_data_vc; }
int getBuffersPerCtrlVC() { return m_buffers_per_ctrl_vc; }
void collateStats();
void regStats();

3
src/mem/ruby/structures/BankedArray.hh
View file

@ -61,7 +61,8 @@ class BankedArray
unsigned int mapIndexToBank(int64 idx);
public:
BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit);
BankedArray(unsigned int banks, Cycles accessLatency,
unsigned int startIndexBit);
// Note: We try the access based on the cache index, not the address
// This is so we don't get aliasing on blocks being replaced

10
src/mem/ruby/system/System.cc
View file

@ -86,16 +86,16 @@ RubySystem::RubySystem(const Params *p)
void
RubySystem::registerNetwork(Network* network_ptr)
{
m_network = network_ptr;
m_network = network_ptr;
}
void
RubySystem::registerAbstractController(AbstractController* cntrl)
{
m_abs_cntrl_vec.push_back(cntrl);
m_abs_cntrl_vec.push_back(cntrl);
MachineID id = cntrl->getMachineID();
g_abs_controls[id.getType()][id.getNum()] = cntrl;
MachineID id = cntrl->getMachineID();
g_abs_controls[id.getType()][id.getNum()] = cntrl;
}
RubySystem::~RubySystem()
@ -189,7 +189,7 @@ RubySystem::serializeOld(CheckpointOut &cp)
// Restore curTick
setCurTick(curtick_original);
// Aggergate the trace entries together into a single array
// Aggregate the trace entries together into a single array
uint8_t *raw_data = new uint8_t[4096];
uint64 cache_trace_size = m_cache_recorder->aggregateRecords(&raw_data,
4096);