sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

X86: Let segment manipulation microops be conditional.

Browse source
This commit is contained in:
Gabe Black 2008-10-12 20:25:06 -07:00
parent e9158d763a
commit 9e1fe2050a
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/arch/x86/isa/microops/regop.isa
View file

@ -978,7 +978,7 @@ let {{
''' '''
# Microops for manipulating segmentation registers # Microops for manipulating segmentation registers
class SegOp(RegOp): class SegOp(CondRegOp):
abstract = True abstract = True
def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"): def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"):
super(SegOp, self).__init__(dest, \ super(SegOp, self).__init__(dest, \