arm: Add TLB PMU probes
This changeset adds probe points that can be used to implement PMU counters for TLB stats. The following probes are supported: * ArmISA::TLB::ppRefills / TLB Refills (TLB insertions)
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@ -197,6 +197,7 @@ TLB::insert(Addr addr, TlbEntry &entry)
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table[0] = entry;
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table[0] = entry;
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inserts++;
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inserts++;
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ppRefills->notify(1);
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}
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}
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void
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void
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@ -531,6 +532,12 @@ TLB::regStats()
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accesses = readAccesses + writeAccesses + instAccesses;
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accesses = readAccesses + writeAccesses + instAccesses;
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}
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}
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void
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TLB::regProbePoints()
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{
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ppRefills.reset(new ProbePoints::PMU(getProbeManager(), "Refills"));
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}
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Fault
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Fault
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TLB::translateSe(RequestPtr req, ThreadContext *tc, Mode mode,
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TLB::translateSe(RequestPtr req, ThreadContext *tc, Mode mode,
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Translation *translation, bool &delay, bool timing)
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Translation *translation, bool &delay, bool timing)
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@ -53,6 +53,7 @@
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#include "mem/request.hh"
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#include "mem/request.hh"
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#include "params/ArmTLB.hh"
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#include "params/ArmTLB.hh"
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#include "sim/fault_fwd.hh"
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#include "sim/fault_fwd.hh"
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#include "sim/probe/pmu.hh"
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#include "sim/tlb.hh"
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#include "sim/tlb.hh"
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class ThreadContext;
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class ThreadContext;
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@ -131,6 +132,9 @@ class TLB : public BaseTLB
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Stats::Formula misses;
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Stats::Formula misses;
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Stats::Formula accesses;
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Stats::Formula accesses;
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/** PMU probe for TLB refills */
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ProbePoints::PMUUPtr ppRefills;
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int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU
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int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU
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bool bootUncacheability;
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bool bootUncacheability;
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@ -291,6 +295,8 @@ class TLB : public BaseTLB
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void regStats();
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void regStats();
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void regProbePoints() M5_ATTR_OVERRIDE;
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/**
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/**
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* Get the table walker master port. This is used for migrating
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* Get the table walker master port. This is used for migrating
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* port connections during a CPU takeOverFrom() call. For
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* port connections during a CPU takeOverFrom() call. For
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