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arm: Fix decoding of PMXEVTYPER_EL0 and PMCCFILTR_EL0

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The aarch64 system register decoder is currently not decoding
PMXEVTYPER_EL0 and PMCCFILTR_EL0 correctly. This changeset updates the
decoder so that they are decoded using the values in table C5-6 in ARM
DDI 0478A.c.
This commit is contained in:
Andreas Sandberg 2014-12-08 04:49:53 -05:00
parent 6a9fbd295d
commit 9b7578d8c7
1 changed files with 6 additions and 1 deletions
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7
src/arch/arm/miscregs.cc
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@ -3177,7 +3177,7 @@ decodeAArch64SysReg(unsigned op0, unsigned op1,
case 0:
return MISCREG_PMCCNTR_EL0;
case 1:
return MISCREG_PMCCFILTR_EL0;
return MISCREG_PMXEVTYPER_EL0;
case 2:
return MISCREG_PMXEVCNTR_EL0;
}
@ -3434,6 +3434,11 @@ decodeAArch64SysReg(unsigned op0, unsigned op1,
return MISCREG_PMEVTYPER5_EL0;
}
break;
case 15:
switch (op2) {
case 7:
return MISCREG_PMCCFILTR_EL0;
}
}
break;
case 4: