diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa
index bc49d3362..778754e0c 100644
--- a/src/arch/x86/isa/microasm.isa
+++ b/src/arch/x86/isa/microasm.isa
@@ -86,7 +86,7 @@ let {{
 
     # Add in symbols for the various checks of segment selectors.
     for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
-                  "SSCheck", "IretCheck", "IntCSCheck"):
+                  "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck"):
         assembler.symbols[check] = "Seg%s" % check
 
     for reg in ("TR", "IDTR"):
diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 200024690..2e6160ec6 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -234,7 +234,7 @@ output header {{
 
     enum SegmentSelectorCheck {
       SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck,
-      SegSSCheck, SegIretCheck, SegIntCSCheck
+      SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck
     };
 
     enum LongModeDescriptorType {
@@ -1066,11 +1066,13 @@ let {{
                 panic("CS checks for far calls/jumps through call gates"
                         "not implemented.\\n");
                 break;
-              case SegIntGateCheck:
+              case SegSoftIntGateCheck:
                 // Check permissions.
                 if (desc.dpl < m5reg.cpl) {
                     fault = new GeneralProtection((uint16_t)selector);
                 }
+                // Fall through on purpose
+              case SegIntGateCheck:
                 // Make sure the gate's the right type.
                 if (m5reg.mode == LongMode && ((desc.type & 0xe) != 0xe) ||
                         ((desc.type & 0x6) != 0x6)) {