X86: Make exceptions handle stack switching.
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1 changed files with 14 additions and 13 deletions
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@ -80,29 +80,22 @@ def rom
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andi t10, t10, 3, dataSize=8
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rdattr t5, cs, dataSize=8
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srli t5, t5, 3, dataSize=8
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sub t5, t5, t10, dataSize=8
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andi t0, t5, 0x3, flags=(EZF,), dataSize=8
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andi t5, t5, 0x3, dataSize=8
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sub t0, t5, t10, flags=(EZF,), dataSize=8
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# We're going to change priviledge, so zero out the stack selector. We
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# need to let the IST have priority so we don't branch yet.
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wrsel t11, t0, flags=(nCEZF,)
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# Check the IST field of the gate descriptor
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srli t10, t4, 32, dataSize=8
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andi t10, t10, 0x7, dataSize=8
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subi t0, t10, 1, flags=(ECF,), dataSize=8
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srli t12, t4, 32, dataSize=8
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andi t12, t12, 0x7, dataSize=8
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subi t0, t12, 1, flags=(ECF,), dataSize=8
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br rom_local_label("%(startLabel)s_istStackSwitch"), flags=(nCECF,)
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br rom_local_label("%(startLabel)s_cplStackSwitch"), flags=(nCEZF,)
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# If we're here, it's because the stack isn't being switched.
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# Set t6 to the new aligned rsp.
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mov t6, t6, rsp, dataSize=8
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andi t6, t6, 0xF0, dataSize=1
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subi t6, t6, 40 + %(errorCodeSize)d, dataSize=8
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# Check that we can access everything we need to on the stack
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ldst t0, hs, [1, t0, t6], dataSize=8, addressSize=8
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ldst t0, hs, [1, t0, t6], \
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32 + %(errorCodeSize)d, dataSize=8, addressSize=8
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br rom_local_label("%(startLabel)s_stackSwitched")
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%(startLabel)s_istStackSwitch:
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@ -110,10 +103,18 @@ def rom
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br rom_local_label("%(startLabel)s_stackSwitched")
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%(startLabel)s_cplStackSwitch:
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panic "CPL change initiated stack switching isn't implemented"
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# Get the new rsp from the TSS
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ld t6, tr, [8, t10, t0], 4, dataSize=8, addressSize=8
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%(startLabel)s_stackSwitched:
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andi t6, t6, 0xF0, dataSize=1
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subi t6, t6, 40 + %(errorCodeSize)d, dataSize=8
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# Check that we can access everything we need to on the stack
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ldst t0, hs, [1, t0, t6], dataSize=8, addressSize=8
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ldst t0, hs, [1, t0, t6], \
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32 + %(errorCodeSize)d, dataSize=8, addressSize=8
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##
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## Point of no return.
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