ide printing to match newmem
--HG-- extra : convert_revision : ca6665bd93d257a8cf9d43600828ac22998c5810
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1c5aa3f8cd
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9892bdb342
1 changed files with 48 additions and 5 deletions
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@ -280,12 +280,28 @@ IdeController::readConfig(int offset, int size, uint8_t *data)
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panic("Invalid PCI configuration read size!\n");
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panic("Invalid PCI configuration read size!\n");
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}
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}
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DPRINTF(IdeCtrl, "PCI read offset: %#x size: %#x data: %#x\n",
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offset, size, *(uint32_t*)data);
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} else {
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} else {
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panic("Read of unimplemented PCI config. register: %x\n", offset);
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panic("Read of unimplemented PCI config. register: %x\n", offset);
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}
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}
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switch (size) {
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case sizeof(uint8_t):
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DPRINTF(IdeCtrl, "PCI read offset: %#x size: %d data: %#x\n",
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offset, size, (uint32_t)*data);
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break;
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case sizeof(uint16_t):
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DPRINTF(IdeCtrl, "PCI read offset: %#x size: %d data: %#x\n",
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offset, size, *(uint16_t*)data);
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break;
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case sizeof(uint32_t):
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DPRINTF(IdeCtrl, "PCI read offset: %#x size: %d data: %#x\n",
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offset, size, *(uint32_t*)data);
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break;
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default:
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panic("Invalid PCI configuration read size!\n");
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}
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}
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}
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void
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void
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@ -317,8 +333,22 @@ IdeController::writeConfig(int offset, int size, const uint8_t *data)
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panic("Write of unimplemented PCI config. register: %x\n", offset);
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panic("Write of unimplemented PCI config. register: %x\n", offset);
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}
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}
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DPRINTF(IdeCtrl, "PCI write offset: %#x size: %#x data: %#x\n",
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switch(size) {
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offset, size, data);
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case sizeof(uint8_t):
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DPRINTF(IdeCtrl, "PCI write offset: %#x size: %d data: %#x\n",
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offset, size, (uint32_t)*data);
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break;
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case sizeof(uint16_t):
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DPRINTF(IdeCtrl, "PCI write offset: %#x size: %d data: %#x\n",
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offset, size, *(uint16_t*)data);
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break;
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case sizeof(uint32_t):
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DPRINTF(IdeCtrl, "PCI write offset: %#x size: %d data: %#x\n",
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offset, size, *(uint32_t*)data);
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break;
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default:
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panic("Invalid PCI configuration write size!\n");
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}
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// Catch the writes to specific PCI registers that have side affects
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// Catch the writes to specific PCI registers that have side affects
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// (like updating the PIO ranges)
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// (like updating the PIO ranges)
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@ -455,6 +485,13 @@ IdeController::read(MemReqPtr &req, uint8_t *data)
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panic("IDE controller read of unknown register block type!\n");
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panic("IDE controller read of unknown register block type!\n");
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}
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}
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if (req->size == 1)
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DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n",
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offset, req->size, (uint32_t)*data);
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else if (req->size == 2)
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DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n",
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offset, req->size, *(uint16_t*)data);
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else
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DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n",
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DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n",
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offset, req->size, *(uint32_t*)data);
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offset, req->size, *(uint32_t*)data);
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@ -624,7 +661,13 @@ IdeController::write(MemReqPtr &req, const uint8_t *data)
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default:
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default:
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panic("IDE controller write of unknown register block type!\n");
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panic("IDE controller write of unknown register block type!\n");
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}
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}
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if (req->size == 1)
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DPRINTF(IdeCtrl, "write to offset: %#x size: %#x data: %#x\n",
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offset, req->size, (uint32_t)*data);
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else if (req->size == 2)
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DPRINTF(IdeCtrl, "write to offset: %#x size: %#x data: %#x\n",
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offset, req->size, *(uint16_t*)data);
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else
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DPRINTF(IdeCtrl, "write to offset: %#x size: %#x data: %#x\n",
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DPRINTF(IdeCtrl, "write to offset: %#x size: %#x data: %#x\n",
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offset, req->size, *(uint32_t*)data);
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offset, req->size, *(uint32_t*)data);
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