Info: Clean up some info files.
Get rid of RELEASE_NOTES since we no longer do releases, update some of the information in README, and update the date in LICENSE.
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5 changed files with 22 additions and 174 deletions
2
LICENSE
2
LICENSE
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@ -1,4 +1,4 @@
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Copyright (c) 2000-2008 The Regents of The University of Michigan
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Copyright (c) 2000-2011 The Regents of The University of Michigan
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All rights reserved.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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Redistribution and use in source and binary forms, with or without
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34
README
34
README
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@ -1,4 +1,4 @@
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This is release 2.0_beta6 of the M5 simulator.
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This is the M5 simulator.
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For detailed information about building the simulator and getting
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For detailed information about building the simulator and getting
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started please refer to http://www.m5sim.org.
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started please refer to http://www.m5sim.org.
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@ -9,13 +9,16 @@ http://www.m5sim.org/wiki/index.php/Running_M5
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Short version:
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Short version:
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1. If you don't have SCons version 0.96.91 or newer, get it from
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1. If you don't have SCons version 0.98.1 or newer, get it from
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http://wwww.scons.org.
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http://wwww.scons.org.
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2. If you don't have SWIG version 1.3.28 or newer, get it from
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2. If you don't have SWIG version 1.3.31 or newer, get it from
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http://wwww.swig.org.
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http://wwww.swig.org.
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3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This
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3. Make sure you also have gcc version 3.4.6 or newer, Python 2.4 or newer
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(the dev version with header files), zlib, and the m4 preprocessor.
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4. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This
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will build the debug version of the m5 binary (m5.debug) for the Alpha
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will build the debug version of the m5 binary (m5.debug) for the Alpha
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syscall emulation target, and run the quick regression tests on it.
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syscall emulation target, and run the quick regression tests on it.
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@ -25,18 +28,21 @@ WHAT'S INCLUDED (AND NOT)
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-------------------------
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-------------------------
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The basic source release includes these subdirectories:
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The basic source release includes these subdirectories:
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- m5:
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- m5:
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- src: source code of the m5 simulator
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- configs: simulation configuration scripts
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- tests: regression tests
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- ext: less-common external packages needed to build m5
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- ext: less-common external packages needed to build m5
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- src: source code of the m5 simulator
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- system: source for some optional system software for simulated systems
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- tests: regression tests
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- util: useful utility programs and files
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To run full-system simulations, you will need compiled console,
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To run full-system simulations, you will need compiled system firmware
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PALcode, and kernel binaries and one or more disk images. These files
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(console and PALcode for Alpha), kernel binaries and one or more disk images.
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are collected in a separate archive, m5_system.tar.bz2. This file
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These files for Alpha are collected in a separate archive, m5_system.tar.bz2.
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can he downloaded separately.
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This file can he downloaded separately.
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M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
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Depending on the ISA used, M5 may support Linux 2.4/2.6, FreeBSD, and the
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Tru64 version of Unix. We are able to distribute Linux and FreeBSD
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proprietary Compaq/HP Tru64 version of Unix. We are able to distribute Linux
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bootdisks, but we are unable to distribute bootable disk images of
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and FreeBSD bootdisks, but we are unable to distribute bootable disk images of
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Tru64 Unix. If you have a Tru64 license and are interested in
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Tru64 Unix. If you have a Tru64 license and are interested in
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obtaining disk images, contact us at m5-users@m5sim.org
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obtaining disk images, contact us at m5-users@m5sim.org
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149
RELEASE_NOTES
149
RELEASE_NOTES
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@ -1,149 +0,0 @@
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October 6, 2008: m5_2.0_beta6
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--------------------
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New Features
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1. Support for gcc 4.3
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2. Core m5 code in libm5 for integration with other simulators
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3. Preliminary support for X86 SE mode
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4. Additional system calls emulated
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5. m5term updated to work on OS X
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6. Ability to disable listen sockets
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7. Event queue performance improvements and rewrite
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8. Better errors for unconnected memory ports
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Bug fixes
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1. ALPHA_SE O3 perlbmk benchmark
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2. Translation bug where O3 could fetch from uncachable memory
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3. Many minor bugs
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Outstanding issues for 2.0 release:
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--------------------
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1. Statistics cleanup
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2. Improve regression system
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3. Testing
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4. Validation
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March 1, 2008: m5_2.0_beta5
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--------------------
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New Features
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1. Rick Strong's Simpoints config changes
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2. Support for FSU ARM port
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3. EXTRAS= option allow architectures to be specified
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Bug fixes
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1. Bus timing more realistic
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2. Cache writeback, LL/SC fixes
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3. Minor IGbE NIC fixes
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4. O3 op latency fix
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5. SPARC TLB demap fixes
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6. SPARC SE memory layout fixes
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7. Variety of MIPS fixes
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Nov 4, 2007: m5_2.0_beta4
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--------------------
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New Features
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1. New cache model
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2. Use of a I/O cache between devices and memory
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3. Ability to include compiled code with EXTRAS=
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4. Python creation of params structures for initialization
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5. Ability to remotely debug in SE
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Bug fixes:
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1. Fix SE serialization
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2. SPARC_FS booting with TimingSimpleCPU
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3. Rename cycles() to ticks()
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4. Various SPARC ISA fixes
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5. Draining code for checkpointing
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6. Various performance improvements
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Possible Incompatibilities:
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1. Real TLBs are now used in SE mode. This is more accurate however it could
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cause some problems if you've modified the way page handling is done in
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SE mode.
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2. There have been many changes to the way the SCons files work. SimObjects,
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sources files, and trace flags are all specified in the SConscript files.
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To see how to add your sources take a look at one of them.
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3. Python is now used to created the parameter structs that were created
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manually before. The parameters listed in a py file are turned into
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a header file with the same name (e.g. BadDevice.py -> BadDevice.hh).
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With this change the structs can be populated automatically and the
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ugly macros to define and create SimObjects at the bottem of source
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files are gone. The parameter structs also automatically inherit
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parameters from their parents.
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May 16, 2007: m5_2.0_beta3
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--------------------
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New Features
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1. Some support for SPARC full-system simulation
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2. Reworking of trace facitities (parameter names changed, variadic macros
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removed)
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3. Scons script cleanups
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4. Some support for compiling with Intel CC
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Bug fixes since beta 2:
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1. Many SPARC linux syscall emulation support fixes
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2. Multiprocessor linux boot using the detailed O3 CPU module
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3. Workaround for DMA bug (final solution to be released with 2.0f)
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4. Simulator performance and memory leak fixes
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5. Fixed issue where console could stop printing in ALPHA_FS
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6. Fix issues with remote debugging
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7. Several compile fixes, including gcc 4.1
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8. Many other minor fixes and enhancements
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Nov. 28, 2006: m5_2.0_beta2
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--------------------
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Bug fixes since beta 1:
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1. Many cache issues resolved
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2. Uni-coherence fixes in full-system
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3. LL/SC Support
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4. Draining/Switchover
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5. Functional Accesses
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6. Bus now has real timing
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7. Single config file for all SpecCPU2000 benchmarks
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8. Several other minor bug fixes and enhancements
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Aug. 25, 2006: m5_2.0_beta patch 1
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--------------------
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Handful of minor bug fixes for m5_2.0_beta,
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along with a few new regression tests.
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Aug. 15, 2006: m5_2.0_beta
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--------------------
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Major update to M5 including:
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- New CPU model
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- New memory system
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- More extensive python integration
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- Preliminary syscall emulation support for MIPS and SPARC
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This is a *beta* release, meaning that some features are not complete,
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and some features from M5 1.X aren't currently supported (e.g., MP
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coherence). We are working to address these limitations and hope to
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have a complete 2.0 release soon.
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Oct. 8, 2005: m5_1.1
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--------------------
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Update release for IOSCA workshop mini-tutorial. New features include:
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- Preliminary FreeBSD support
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- Integration of regression tests into scons build framework
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- Several bug fixes and better compatibility for Cygwin hosts
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- Major cleanup of Alpha system code (console, PAL, etc.) to make
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it easier for others to build/modify
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- Fixes to enable compilation under g++ 4.0
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- Numerous minor bug fixes
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June 10, 2005: m5_1.0_web
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-------------------------
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The 1.0 release posted on Sourceforge after the ISCA tutorial contains
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just a few very minor fixes relative to the CD.
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June 5, 2005: m5_1.0_tutorial
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-----------------------------
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First non-beta release. This release was on the CD distributed at the
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ISCA tutorial. Major enhancements relative to beta releases include
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Linux support and Python-based configuration language.
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June 17, 2004: m5_1.0_beta2
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---------------------------
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Stealth-mode beta bug-fix update, not widely advertised.
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Oct. 17, 2003: m5_1.0_beta1
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---------------------------
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Early beta release.
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@ -446,7 +446,7 @@ def makeInfoPyFile(target, source, env):
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# Generate a file that wraps the basic top level files
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# Generate a file that wraps the basic top level files
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env.Command('python/m5/info.py',
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env.Command('python/m5/info.py',
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[ '#/AUTHORS', '#/LICENSE', '#/README', '#/RELEASE_NOTES' ],
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[ '#/AUTHORS', '#/LICENSE', '#/README', ],
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MakeAction(makeInfoPyFile, Transform("INFO")))
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MakeAction(makeInfoPyFile, Transform("INFO")))
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PySource('m5', 'python/m5/info.py')
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PySource('m5', 'python/m5/info.py')
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help="Show full copyright information")
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help="Show full copyright information")
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add_option('-R', "--readme", action="store_true", default=False,
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add_option('-R', "--readme", action="store_true", default=False,
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help="Show the readme")
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help="Show the readme")
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add_option('-N', "--release-notes", action="store_true", default=False,
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help="Show the release notes")
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# Options for configuring the base simulator
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# Options for configuring the base simulator
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add_option('-d', "--outdir", metavar="DIR", default="m5out",
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add_option('-d', "--outdir", metavar="DIR", default="m5out",
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@ -207,13 +205,6 @@ def main():
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print info.README
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print info.README
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print
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print
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if options.release_notes:
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done = True
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print 'Release Notes:'
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print
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print info.RELEASE_NOTES
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print
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if options.trace_help:
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if options.trace_help:
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done = True
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done = True
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check_tracing()
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check_tracing()
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