Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
--HG-- extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
This commit is contained in:
parent
b4dfbf3aab
commit
9731fb3fd7
5 changed files with 284 additions and 6 deletions
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@ -48,27 +48,29 @@ Import('env')
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# Base sources used by all configurations.
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base_sources = Split('''
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faults.cc
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isa_traits.cc
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miscregfile.cc
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floatregfile.cc
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intregfile.cc
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miscregfile.cc
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regfile.cc
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''')
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# Full-system sources
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full_system_sources = Split('''
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tlb.cc
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arguments.cc
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ev5.cc
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freebsd/system.cc
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idle_event.cc
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ipr.cc
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kernel_stats.cc
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linux/system.cc
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osfpal.cc
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pagetable.cc
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stacktrace.cc
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vtophys.cc
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remote_gdb.cc
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system.cc
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freebsd/system.cc
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linux/system.cc
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tlb.cc
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tru64/system.cc
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vtophys.cc
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''')
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49
src/arch/alpha/floatregfile.cc
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49
src/arch/alpha/floatregfile.cc
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@ -0,0 +1,49 @@
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Gabe Black
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* Kevin Lim
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*/
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#include "arch/alpha/floatregfile.hh"
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#include "sim/serialize.hh"
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namespace AlphaISA
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{
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void
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FloatRegFile::serialize(std::ostream &os)
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{
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SERIALIZE_ARRAY(q, NumFloatRegs);
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}
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void
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FloatRegFile::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ARRAY(q, NumFloatRegs);
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}
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}
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63
src/arch/alpha/floatregfile.hh
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63
src/arch/alpha/floatregfile.hh
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@ -0,0 +1,63 @@
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Gabe Black
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*/
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#ifndef __ARCH_ALPHA_FLOATREGFILE_HH__
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#define __ARCH_ALPHA_FLOATREGFILE_HH__
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#include "arch/alpha/isa_traits.hh"
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#include "arch/alpha/types.hh"
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#include <string.h>
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#include <iostream>
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class Checkpoint;
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namespace AlphaISA
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{
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class FloatRegFile
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{
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public:
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union {
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uint64_t q[NumFloatRegs]; // integer qword view
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double d[NumFloatRegs]; // double-precision floating point view
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};
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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void clear()
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{ bzero(d, sizeof(d)); }
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};
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}
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#endif
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63
src/arch/alpha/pagetable.cc
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63
src/arch/alpha/pagetable.cc
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@ -0,0 +1,63 @@
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/alpha/pagetable.hh"
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#include "sim/serialize.hh"
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namespace AlphaISA
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{
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void
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PTE::serialize(std::ostream &os)
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{
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SERIALIZE_SCALAR(tag);
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SERIALIZE_SCALAR(ppn);
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SERIALIZE_SCALAR(xre);
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SERIALIZE_SCALAR(xwe);
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SERIALIZE_SCALAR(asn);
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SERIALIZE_SCALAR(asma);
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SERIALIZE_SCALAR(fonr);
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SERIALIZE_SCALAR(fonw);
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SERIALIZE_SCALAR(valid);
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}
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void
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PTE::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_SCALAR(tag);
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UNSERIALIZE_SCALAR(ppn);
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UNSERIALIZE_SCALAR(xre);
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UNSERIALIZE_SCALAR(xwe);
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UNSERIALIZE_SCALAR(asn);
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UNSERIALIZE_SCALAR(asma);
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UNSERIALIZE_SCALAR(fonr);
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UNSERIALIZE_SCALAR(fonw);
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UNSERIALIZE_SCALAR(valid);
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}
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}
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101
src/arch/alpha/regfile.cc
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101
src/arch/alpha/regfile.cc
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@ -0,0 +1,101 @@
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Gabe Black
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* Kevin Lim
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*/
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#include "arch/alpha/regfile.hh"
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#include "cpu/thread_context.hh"
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namespace AlphaISA
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{
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void
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RegFile::serialize(std::ostream &os)
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{
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intRegFile.serialize(os);
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floatRegFile.serialize(os);
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miscRegFile.serialize(os);
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SERIALIZE_SCALAR(pc);
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SERIALIZE_SCALAR(npc);
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#if FULL_SYSTEM
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SERIALIZE_SCALAR(intrflag);
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#endif
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}
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void
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RegFile::unserialize(Checkpoint *cp, const std::string §ion)
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{
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intRegFile.unserialize(cp, section);
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floatRegFile.unserialize(cp, section);
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miscRegFile.unserialize(cp, section);
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UNSERIALIZE_SCALAR(pc);
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UNSERIALIZE_SCALAR(npc);
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#if FULL_SYSTEM
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UNSERIALIZE_SCALAR(intrflag);
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#endif
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}
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void
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copyRegs(ThreadContext *src, ThreadContext *dest)
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{
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// First loop through the integer registers.
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for (int i = 0; i < NumIntRegs; ++i) {
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dest->setIntReg(i, src->readIntReg(i));
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}
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// Then loop through the floating point registers.
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for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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}
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// Copy misc. registers
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copyMiscRegs(src, dest);
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// Lastly copy PC/NPC
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dest->setPC(src->readPC());
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dest->setNextPC(src->readNextPC());
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}
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void
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copyMiscRegs(ThreadContext *src, ThreadContext *dest)
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{
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dest->setMiscReg(AlphaISA::MISCREG_FPCR,
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src->readMiscReg(AlphaISA::MISCREG_FPCR));
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dest->setMiscReg(AlphaISA::MISCREG_UNIQ,
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src->readMiscReg(AlphaISA::MISCREG_UNIQ));
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dest->setMiscReg(AlphaISA::MISCREG_LOCKFLAG,
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src->readMiscReg(AlphaISA::MISCREG_LOCKFLAG));
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dest->setMiscReg(AlphaISA::MISCREG_LOCKADDR,
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src->readMiscReg(AlphaISA::MISCREG_LOCKADDR));
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#if FULL_SYSTEM
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copyIprs(src, dest);
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#endif
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}
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}
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