ARM: Make the predecoder handle Thumb instructions.
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3 changed files with 99 additions and 15 deletions
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@ -1,9 +1,20 @@
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# -*- mode:python -*-
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# -*- mode:python -*-
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# Copyright (c) 2007-2008 The Florida State University
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# Copyright (c) 2009 ARM Limited
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# Copyright (c) 2009 ARM Limited
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# All rights reserved.
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# All rights reserved.
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#
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2007-2008 The Florida State University
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# met: redistributions of source code must retain the above copyright
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@ -52,6 +63,7 @@ if env['TARGET_ISA'] == 'arm':
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TraceFlag('Arm')
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TraceFlag('Arm')
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TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
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TraceFlag('Faults', "Trace Exceptions, interrupts, svc/swi")
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TraceFlag('Predecoder', "Instructions returned by the predecoder")
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if env['FULL_SYSTEM']:
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if env['FULL_SYSTEM']:
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Source('interrupts.cc')
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Source('interrupts.cc')
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Source('stacktrace.cc')
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Source('stacktrace.cc')
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@ -1,4 +1,16 @@
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/*
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/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* Copyright (c) 2006 The Regents of The University of Michigan
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* Copyright (c) 2007-2008 The Florida State University
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* Copyright (c) 2007-2008 The Florida State University
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* All rights reserved.
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* All rights reserved.
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@ -47,9 +59,13 @@ namespace ArmISA
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ThreadContext * tc;
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ThreadContext * tc;
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//The extended machine instruction being generated
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//The extended machine instruction being generated
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ExtMachInst emi;
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ExtMachInst emi;
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MachInst data;
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bool bigThumb;
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int offset;
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public:
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public:
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Predecoder(ThreadContext * _tc) : tc(_tc)
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Predecoder(ThreadContext * _tc) :
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tc(_tc), data(0), bigThumb(false), offset(0)
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{}
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{}
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ThreadContext * getTC()
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ThreadContext * getTC()
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@ -62,20 +78,67 @@ namespace ArmISA
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tc = _tc;
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tc = _tc;
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}
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}
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void process()
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{}
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void reset()
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void reset()
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{}
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{
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bigThumb = false;
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offset = 0;
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emi = 0;
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}
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void process()
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{
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if (!emi.thumb) {
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emi.instBits = data;
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emi.sevenAndFour = bits(data, 7) && bits(data, 4);
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emi.isMisc = (bits(data, 24, 23) == 0x2 &&
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bits(data, 20) == 0);
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DPRINTF(Predecoder, "Arm inst.\n");
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} else {
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uint16_t word = (data >> (offset * 8));
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if (bigThumb) {
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// A 32 bit thumb inst is half collected.
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emi.instBits = emi.instBits | word;
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bigThumb = false;
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offset += 2;
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DPRINTF(Predecoder, "Second half of 32 bit Thumb.\n");
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} else {
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uint16_t highBits = word & 0xF800;
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if (highBits == 0xE800 || highBits == 0xF000 ||
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highBits == 0xF800) {
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// The start of a 32 bit thumb inst.
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emi.bigThumb = 1;
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if (offset == 0) {
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// We've got the whole thing.
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DPRINTF(Predecoder,
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"All of 32 bit Thumb.\n");
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emi.instBits = (data >> 16) | (data << 16);
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offset += 4;
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} else {
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// We only have the first half word.
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DPRINTF(Predecoder,
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"First half of 32 bit Thumb.\n");
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emi.instBits = (uint32_t)word << 16;
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bigThumb = true;
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offset += 2;
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}
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} else {
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// A 16 bit thumb inst.
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DPRINTF(Predecoder, "16 bit Thumb.\n");
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offset += 2;
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emi.instBits = word;
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}
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}
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}
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}
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//Use this to give data to the predecoder. This should be used
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//Use this to give data to the predecoder. This should be used
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//when there is control flow.
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//when there is control flow.
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void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
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void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
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{
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{
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emi = inst;
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data = inst;
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emi.thumb = (pc & (ULL(1) << PcTBitShift));
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offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
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emi.sevenAndFour = bits(inst, 7) && bits(inst, 4);
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emi.thumb = (pc & (ULL(1) << PcTBitShift)) ? 1 : 0;
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emi.isMisc = (bits(inst, 24, 23) == 0x2 && bits(inst, 20) == 0);
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process();
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}
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}
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//Use this to give data to the predecoder. This should be used
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//Use this to give data to the predecoder. This should be used
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@ -87,18 +150,27 @@ namespace ArmISA
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bool needMoreBytes()
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bool needMoreBytes()
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{
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{
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return true;
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return sizeof(MachInst) > offset;
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}
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}
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bool extMachInstReady()
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bool extMachInstReady()
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{
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{
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return true;
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// The only way an instruction wouldn't be ready is if this is a
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// 32 bit ARM instruction that's not 32 bit aligned.
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return !bigThumb;
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}
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int getInstSize()
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{
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return (!emi.thumb || emi.bigThumb) ? 4 : 2;
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}
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}
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//This returns a constant reference to the ExtMachInst to avoid a copy
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//This returns a constant reference to the ExtMachInst to avoid a copy
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const ExtMachInst & getExtMachInst()
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ExtMachInst getExtMachInst()
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{
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{
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return emi;
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ExtMachInst thisEmi = emi;
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emi = 0;
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return thisEmi;
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}
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}
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};
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};
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};
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};
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@ -410,7 +410,7 @@ BaseSimpleCPU::preExecute()
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//If an instruction is ready, decode it. Otherwise, we'll have to
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//If an instruction is ready, decode it. Otherwise, we'll have to
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//fetch beyond the MachInst at the current pc.
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//fetch beyond the MachInst at the current pc.
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if (predecoder.extMachInstReady()) {
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if (predecoder.extMachInstReady()) {
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#if THE_ISA == X86_ISA
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#if THE_ISA == X86_ISA || THE_ISA == ARM_ISA
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thread->setNextPC(thread->readPC() + predecoder.getInstSize());
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thread->setNextPC(thread->readPC() + predecoder.getInstSize());
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#endif // X86_ISA
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#endif // X86_ISA
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stayAtPC = false;
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stayAtPC = false;
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