Merge stever@zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5

--HG--
extra : convert_revision : 921d26b6fe29870fa532394b388bc0fe6cac183e

arch/alpha/ev5.cc

@@ -47,6 +47,11 @@ void
 AlphaISA::initCPU(RegFile *regs)
 {
     initIPRs(regs);
+    // CPU comes up with PAL regs enabled
+    swap_palshadow(regs, true);
+
+    regs->pc = regs->ipr[IPR_PAL_BASE] + fault_addr[Reset_Fault];
+    regs->npc = regs->pc + sizeof(MachInst);
 }
 
 void
@@ -97,6 +102,7 @@ AlphaISA::initIPRs(RegFile *regs)
 
     bzero((char *)ipr, NumInternalProcRegs * sizeof(InternalProcReg));
     ipr[IPR_PAL_BASE] = PAL_BASE;
+    ipr[IPR_MCSR] = 0x6;
 }
 
 

cpu/base_cpu.hh

@@ -73,7 +73,7 @@ class BaseCPU : public SimObject
     std::vector<ExecContext *> execContexts;
 
   public:
-    virtual void execCtxStatusChg() {}
+    virtual void execCtxStatusChg(int thread_num) {}
 
   public:
 
@@ -94,7 +94,7 @@ class BaseCPU : public SimObject
 
     virtual void regStats();
 
-    virtual void registerExecContexts();
+    void registerExecContexts();
 
     /// Prepare for another CPU to take over execution.  Called by
     /// takeOverFrom() on its argument.

cpu/exec_context.cc

@@ -44,24 +44,22 @@ using namespace std;
 ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
                          AlphaItb *_itb, AlphaDtb *_dtb,
                          FunctionalMemory *_mem)
-    : kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num),
+    : _status(ExecContext::Unallocated),
+      kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num),
       cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys),
       memCtrl(_sys->memCtrl), physmem(_sys->physmem),
       func_exe_insn(0), storeCondFailures(0)
 {
     memset(&regs, 0, sizeof(RegFile));
-    setStatus(ExecContext::Unallocated);
 }
 #else
 ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
                          Process *_process, int _asid)
-    : cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
+    : _status(ExecContext::Unallocated),
-      process(_process), asid (_asid),
+      cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
+      process(_process), mem(process->getMemory()), asid(_asid),
       func_exe_insn(0), storeCondFailures(0)
 {
-    setStatus(ExecContext::Unallocated);
-
-    mem = process->getMemory();
 }
 
 ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num,
@@ -114,7 +112,7 @@ ExecContext::setStatus(Status new_status)
 #endif
 
     _status = new_status;
-    cpu->execCtxStatusChg();
+    cpu->execCtxStatusChg(thread_num);
 }
 
 void

cpu/exec_context.hh

@@ -68,10 +68,6 @@ class ExecContext
   public:
     Status status() const { return _status; }
 
-    // Unlike setStatus(), initStatus() has no side effects other than
-    // setting the _status variable.
-    void initStatus(Status init_status) { _status = init_status; }
-
     void setStatus(Status new_status);
 
 #ifdef FULL_SYSTEM

cpu/simple_cpu/simple_cpu.cc

@@ -126,19 +126,10 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process,
 #ifdef FULL_SYSTEM
     xc = new ExecContext(this, 0, system, itb, dtb, mem);
 
+    // initialize CPU, including PC
     TheISA::initCPU(&xc->regs);
-
-    IntReg *ipr = xc->regs.ipr;
-    ipr[TheISA::IPR_MCSR] = 0x6;
-
-    AlphaISA::swap_palshadow(&xc->regs, true);
-
-    fault = Reset_Fault;
-    xc->regs.pc = ipr[TheISA::IPR_PAL_BASE] + AlphaISA::fault_addr[fault];
-    xc->regs.npc = xc->regs.pc + sizeof(MachInst);
 #else
     xc = new ExecContext(this, /* thread_num */ 0, _process, /* asid */ 0);
-    fault = No_Fault;
 #endif // !FULL_SYSTEM
 
     icacheInterface = icache_interface;
@@ -163,25 +154,6 @@ SimpleCPU::~SimpleCPU()
 }
 
 
-void
-SimpleCPU::registerExecContexts()
-{
-    BaseCPU::registerExecContexts();
-
-    // if any of this CPU's ExecContexts are active, mark the CPU as
-    // running and schedule its tick event.
-    for (int i = 0; i < execContexts.size(); ++i) {
-        ExecContext *xc = execContexts[i];
-        if (xc->status() == ExecContext::Active && _status != Running) {
-            _status = Running;
-            // this should only happen at initialization time
-            assert(curTick == 0);
-            tickEvent.schedule(0);
-        }
-    }
-}
-
-
 void
 SimpleCPU::switchOut()
 {
@@ -212,6 +184,18 @@ SimpleCPU::takeOverFrom(BaseCPU *oldCPU)
 }
 
 
+void
+SimpleCPU::execCtxStatusChg(int thread_num) {
+    assert(thread_num == 0);
+    assert(xc);
+
+    if (xc->status() == ExecContext::Active)
+        setStatus(Running);
+    else
+        setStatus(Idle);
+}
+
+
 void
 SimpleCPU::regStats()
 {
@@ -531,8 +515,10 @@ SimpleCPU::tick()
 {
     traceData = NULL;
 
+    Fault fault = No_Fault;
+
 #ifdef FULL_SYSTEM
-    if (fault == No_Fault && AlphaISA::check_interrupts &&
+    if (AlphaISA::check_interrupts &&
         xc->cpu->check_interrupts() &&
         !PC_PAL(xc->regs.pc) &&
         status() != IcacheMissComplete) {

cpu/simple_cpu/simple_cpu.hh

@@ -136,8 +136,6 @@ class SimpleCPU : public BaseCPU
     // execution context
     ExecContext *xc;
 
-    void registerExecContexts();
-
     void switchOut();
     void takeOverFrom(BaseCPU *oldCPU);
 
@@ -156,9 +154,6 @@ class SimpleCPU : public BaseCPU
     // current instruction
     MachInst inst;
 
-    // current fault status
-    Fault fault;
-
     // Refcounted pointer to the one memory request.
     MemReqPtr memReq;
 
@@ -178,14 +173,7 @@ class SimpleCPU : public BaseCPU
 
     Status status() const { return _status; }
 
-    virtual void execCtxStatusChg() {
+    virtual void execCtxStatusChg(int thread_num);
-        if (xc) {
-            if (xc->status() == ExecContext::Active)
-                setStatus(Running);
-            else
-                setStatus(Idle);
-        }
-    }
 
     void setStatus(Status new_status) {
         Status old_status = status();

kern/tru64/tru64_system.cc

@@ -72,10 +72,6 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param,
         fatal("Could not load PALcode file %s", palcode);
     pal->loadSections(physmem, true);
 
-    // copy of initial reg file contents
-    initRegs = new RegFile;
-    memset(initRegs, 0, sizeof(RegFile));
-
     // Load console file
     console->loadSections(physmem, true);
 
@@ -90,10 +86,6 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param,
             "Kernel entry = %#x\n",
             kernelStart, kernelEnd, kernelEntry);
 
-    // Setup kernel boot parameters
-    initRegs->pc = 0x4001;
-    initRegs->npc = initRegs->pc + sizeof(MachInst);
-
     DPRINTF(Loader, "Kernel loaded...\n");
 
     kernelPanicEvent = new BreakPCEvent(&pcEventQueue, "kernel panic");
@@ -164,8 +156,6 @@ Tru64System::Tru64System(const string _name, const uint64_t _init_param,
 
 Tru64System::~Tru64System()
 {
-    delete initRegs;
-
     delete kernel;
     delete console;
 
@@ -190,11 +180,7 @@ Tru64System::registerExecContext(ExecContext *xc)
     int xcIndex = System::registerExecContext(xc);
 
     if (xcIndex == 0) {
-        // xc->regs = *initRegs;
+        xc->setStatus(ExecContext::Active);
-        xc->initStatus(ExecContext::Active);
-    }
-    else {
-        xc->initStatus(ExecContext::Unallocated);
     }
 
     RemoteGDB *rgdb = new RemoteGDB(this, xc);

kern/tru64/tru64_system.hh

@@ -67,7 +67,6 @@ class Tru64System : public System
     DumpMbufEvent *dumpMbufEvent;
 
   private:
-    RegFile *initRegs;
 
     Addr kernelStart;
     Addr kernelEnd;

sim/prog.cc

@@ -148,10 +148,7 @@ Process::registerExecContext(ExecContext *xc)
         xc->regs = *init_regs;
 
         // mark this context as active
-        xc->initStatus(ExecContext::Active);
+        xc->setStatus(ExecContext::Active);
-    }
-    else {
-        xc->initStatus(ExecContext::Unallocated);
     }
 
     // return CPU number to caller and increment available CPU count