From 9481d05b8aea0faf336f604f3e18b451d5197c12 Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Mon, 23 Jan 2012 11:07:11 -0600
Subject: [PATCH] MemCmd: Add a command for invalidation requests to LSQ This
 command will be sent from the memory system (Ruby) to the LSQ of an O3 CPU so
 that the LSQ, if it needs to, invalidates the address in the request packet.

---
 src/mem/packet.cc | 3 +++
 src/mem/packet.hh | 1 +
 2 files changed, 4 insertions(+)

diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 64f4fcd14..4c3a785dc 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -168,6 +168,9 @@ MemCmd::commandInfo[] =
     { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
     /* Flush Request */
     { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" },
+    /* Invalidation Request */
+    { SET3(NeedsExclusive, IsInvalidate, IsRequest),
+      InvalidCmd, "InvalidationReq" },
 };
 
 bool
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 6347c21ea..e49ce7577 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -108,6 +108,7 @@ class MemCmd
         // Fake simulator-only commands
         PrintReq,       // Print state matching address
         FlushReq,      //request for a cache flush
+        InvalidationReq,   // request for address to be invalidated from lsq
         NUM_MEM_CMDS
     };