pass the location of the m5 backdoor via the m5AlphaAccess variable
only compile one console console/Makefile: Now that the location of the m5 backdoor is passed into the console via the m5AlphaAccess variable, we only need to compile one console, and don't need to define TLASER or TSUNAMI console/console.c: Don't hardcode the location of the AlphaAccess structure, but rely on m5 to pass in the correct value. Setup "volatile struct AlphaAccess *m5AlphaAccess" for use and get rid of the hardcoded usage.
This commit is contained in:
parent
0b01f18603
commit
941db36a67
2 changed files with 35 additions and 59 deletions
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@ -36,34 +36,23 @@ LD=$(CROSS_COMPILE)ld
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DBMENTRY= fffffc0000010000
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DBMENTRY= fffffc0000010000
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CFLAGS=-I . -I ../h -I$(M5)/dev -fno-builtin -Wa,-m21164
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CFLAGS=-I . -I ../h -I$(M5)/dev -fno-builtin -Wa,-m21164
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OBJS=dbmentry.o printf.o paljtokern.o paljtoslave.o
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OBJS=dbmentry.o printf.o paljtokern.o paljtoslave.o console.o
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TLOBJS+=$(OBJS) console_tl.o
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TSOBJS+=$(OBJS) console_ts.o
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### Make sure that the M5 variable is set ###
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### Make sure that the M5 variable is set ###
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ifndef M5
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ifndef M5
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$(error The M5 variable must be set)
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$(error The M5 variable must be set)
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endif
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endif
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all: console_tl console_ts
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all: console
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%.o: %.S
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%.o: %.S
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$(CC) $(CFLAGS) -nostdinc -o $@ -c $<
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$(CC) $(CFLAGS) -nostdinc -o $@ -c $<
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console_ts.o: console.c
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%.o: %.c
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$(CC) -g3 $(CFLAGS) -D TSUNAMI -o $@ -c $<
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console_tl.o: console.c
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$(CC) -g3 $(CFLAGS) -D TLASER -o $@ -c $<
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printf.o: printf.c
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$(CC) -g3 $(CFLAGS) -o $@ -c $<
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$(CC) -g3 $(CFLAGS) -o $@ -c $<
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console_ts: $(TSOBJS)
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console: $(OBJS)
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$(LD) -o console_ts -N -Ttext $(DBMENTRY) -non_shared $(TSOBJS) -lc
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$(LD) -o console -N -Ttext $(DBMENTRY) -non_shared $(OBJS) -lc
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console_tl: $(TLOBJS)
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$(LD) -o console_tl -N -Ttext $(DBMENTRY) -non_shared $(TLOBJS) -lc
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clean:
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clean:
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rm -f *.o console_t?
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rm -f *.o console
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@ -73,14 +73,6 @@
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#define K1BASE 0xfffffc8000000000
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#define K1BASE 0xfffffc8000000000
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#define KSEG_TO_PHYS(x) (((ulong)x) & ~KSEG)
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#define KSEG_TO_PHYS(x) (((ulong)x) & ~KSEG)
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#ifdef TSUNAMI
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#define ALPHA_ACCESS_BASE 0xfffffd0200000000
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#elif TLASER
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#define ALPHA_ACCESS_BASE 0xfffffc8000a00000
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#else
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#error TSUNAMI/TLASER not defined.
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#endif
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#define ROUNDUP8(x) ((ulong)(((ulong)x)+7) & ~7)
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#define ROUNDUP8(x) ((ulong)(((ulong)x)+7) & ~7)
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#define ROUNDUP128(x) ((ulong)(((ulong)x) + 127) & ~127)
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#define ROUNDUP128(x) ((ulong)(((ulong)x) + 127) & ~127)
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#define ROUNDUP8K(x) ((ulong)(((ulong)(x)) + 8191) & ~8191)
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#define ROUNDUP8K(x) ((ulong)(((ulong)(x)) + 8191) & ~8191)
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@ -113,6 +105,7 @@ void JToKern(char *bootadr, ulong rpb_percpu, ulong free_pfn, ulong k_argc,
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void JToPal(ulong bootadr);
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void JToPal(ulong bootadr);
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void SlaveLoop(int cpu);
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void SlaveLoop(int cpu);
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volatile struct AlphaAccess *m5AlphaAccess;
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struct AlphaAccess m5Conf;
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struct AlphaAccess m5Conf;
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ulong theLock;
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ulong theLock;
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@ -146,15 +139,13 @@ InitConsole()
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char
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char
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GetChar()
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GetChar()
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{
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{
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struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
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return m5AlphaAccess->inputChar;
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return k1Conf->inputChar;
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}
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}
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void
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void
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PutChar(char c)
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PutChar(char c)
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{
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{
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struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
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m5AlphaAccess->outputChar = c;
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k1Conf->outputChar = c;
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}
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}
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int
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int
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@ -167,36 +158,35 @@ int
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main(int argc, char **argv)
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main(int argc, char **argv)
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{
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{
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int x, i;
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int x, i;
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struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
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uint *k1ptr, *ksegptr;
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uint *k1ptr, *ksegptr;
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InitConsole();
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InitConsole();
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printf_lock("M5 console\n");
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printf_lock("M5 console: m5AlphaAccess @ 0x%x\n", m5AlphaAccess);
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/*
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/*
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* get configuration from backdoor
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* get configuration from backdoor
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*/
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*/
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m5Conf.last_offset = k1Conf->last_offset;
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m5Conf.last_offset = m5AlphaAccess->last_offset;
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printf_lock("Got Configuration %d\n", m5Conf.last_offset);
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printf_lock("Got Configuration %d\n", m5Conf.last_offset);
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m5Conf.last_offset = k1Conf->last_offset;
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m5Conf.last_offset = m5AlphaAccess->last_offset;
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m5Conf.version = k1Conf->version;
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m5Conf.version = m5AlphaAccess->version;
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m5Conf.numCPUs = k1Conf->numCPUs;
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m5Conf.numCPUs = m5AlphaAccess->numCPUs;
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m5Conf.intrClockFrequency = k1Conf->intrClockFrequency;
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m5Conf.intrClockFrequency = m5AlphaAccess->intrClockFrequency;
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m5Conf.cpuClock = k1Conf->cpuClock;
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m5Conf.cpuClock = m5AlphaAccess->cpuClock;
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m5Conf.mem_size = k1Conf->mem_size;
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m5Conf.mem_size = m5AlphaAccess->mem_size;
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m5Conf.kernStart = k1Conf->kernStart;
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m5Conf.kernStart = m5AlphaAccess->kernStart;
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m5Conf.kernEnd = k1Conf->kernEnd;
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m5Conf.kernEnd = m5AlphaAccess->kernEnd;
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m5Conf.entryPoint = k1Conf->entryPoint;
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m5Conf.entryPoint = m5AlphaAccess->entryPoint;
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m5Conf.diskUnit = k1Conf->diskUnit;
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m5Conf.diskUnit = m5AlphaAccess->diskUnit;
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m5Conf.diskCount = k1Conf->diskCount;
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m5Conf.diskCount = m5AlphaAccess->diskCount;
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m5Conf.diskPAddr = k1Conf->diskPAddr;
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m5Conf.diskPAddr = m5AlphaAccess->diskPAddr;
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m5Conf.diskBlock = k1Conf->diskBlock;
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m5Conf.diskBlock = m5AlphaAccess->diskBlock;
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m5Conf.diskOperation = k1Conf->diskOperation;
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m5Conf.diskOperation = m5AlphaAccess->diskOperation;
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m5Conf.outputChar = k1Conf->outputChar;
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m5Conf.outputChar = m5AlphaAccess->outputChar;
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m5Conf.inputChar = k1Conf->inputChar;
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m5Conf.inputChar = m5AlphaAccess->inputChar;
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m5Conf.bootStrapImpure = k1Conf->bootStrapImpure;
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m5Conf.bootStrapImpure = m5AlphaAccess->bootStrapImpure;
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m5Conf.bootStrapCPU = k1Conf->bootStrapCPU;
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m5Conf.bootStrapCPU = m5AlphaAccess->bootStrapCPU;
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if (m5Conf.version != ALPHA_ACCESS_VERSION) {
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if (m5Conf.version != ALPHA_ACCESS_VERSION) {
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panic("Console version mismatch. Console expects %d. has %d \n",
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panic("Console version mismatch. Console expects %d. has %d \n",
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* MP bootstrap
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* MP bootstrap
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*/
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*/
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for (i = 1; i < m5Conf.numCPUs; i++) {
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for (i = 1; i < m5Conf.numCPUs; i++) {
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volatile struct AlphaAccess *k1Conf;
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k1Conf = (volatile struct AlphaAccess *)(ALPHA_ACCESS_BASE);
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printf_lock("Bootstraping CPU %d with sp=0x%x\n",
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printf_lock("Bootstraping CPU %d with sp=0x%x\n",
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i, bootStrapImpure[i]);
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i, bootStrapImpure[i]);
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k1Conf->bootStrapImpure = bootStrapImpure[i];
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m5AlphaAccess->bootStrapImpure = bootStrapImpure[i];
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k1Conf->bootStrapCPU = i;
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m5AlphaAccess->bootStrapCPU = i;
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}
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}
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/*
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/*
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@ -866,7 +854,6 @@ struct {
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void
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void
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DeviceOperation(long op, long channel, long count, long address, long block)
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DeviceOperation(long op, long channel, long count, long address, long block)
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{
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{
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struct AlphaAccess *k1Conf = (struct AlphaAccess *)(ALPHA_ACCESS_BASE);
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long pAddr;
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long pAddr;
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if (strcmp(deviceState[channel].name, BOOTDEVICE_NAME )) {
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if (strcmp(deviceState[channel].name, BOOTDEVICE_NAME )) {
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panic("DeviceRead: request out of range \n");
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panic("DeviceRead: request out of range \n");
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}
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}
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k1Conf->diskCount = count;
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m5AlphaAccess->diskCount = count;
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k1Conf->diskPAddr = pAddr;
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m5AlphaAccess->diskPAddr = pAddr;
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k1Conf->diskBlock = block;
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m5AlphaAccess->diskBlock = block;
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k1Conf->diskOperation = op; /* launch */
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m5AlphaAccess->diskOperation = op; /* launch */
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}
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}
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/*
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/*
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