sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

ruby: drop Orion network power model

Browse source 
Orion is being dropped from ruby.  It would be replaced with DSENT
which has better models.  Note that the power / energy numbers reported
after this patch has been applied are not for use.
This commit is contained in:
Nilay Vaish 2014-10-11 15:02:23 -05:00
parent b6d804a1e6
commit 9321a41c62
65 changed files with 6 additions and 10095 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh
View file

@ -37,12 +37,11 @@
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
class InputUnit_d : public Consumer
{
public:

3
src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
View file

@ -37,7 +37,6 @@
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
#include "params/NetworkLink_d.hh"
#include "sim/clocked_object.hh"
@ -56,7 +55,7 @@ class NetworkLink_d : public ClockedObject, public Consumer
int get_id(){return m_id;}
void wakeup();
void calculate_power(double);
void calculate_power(double) {}
double get_dynamic_power() const { return m_power_dyn; }
double get_static_power()const { return m_power_sta; }

3
src/mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh
View file

@ -38,11 +38,10 @@
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
class OutputUnit_d : public Consumer
{
public:

7
src/mem/ruby/network/garnet/fixed-pipeline/Router_d.hh
View file

@ -35,13 +35,12 @@
#include <vector>
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/BasicRouter.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
#include "mem/ruby/network/BasicRouter.hh"
#include "params/GarnetRouter_d.hh"
class GarnetNetwork_d;
class NetworkLink_d;
class CreditLink_d;
class InputUnit_d;
@ -89,7 +88,7 @@ class Router_d : public BasicRouter
void printFaultVector(std::ostream& out);
void printAggregateFaultProbability(std::ostream& out);
void calculate_power();
void calculate_power() {}
void calculate_performance_numbers();
double get_dynamic_power() const { return m_power_dyn; }
double get_static_power() const { return m_power_sta; }

93
src/mem/ruby/network/orion/Allocator/Arbiter.cc
View file

@ -1,93 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Allocator/MatrixArbiter.hh"
#include "mem/ruby/network/orion/Allocator/RRArbiter.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
Arbiter::Arbiter(const ArbiterModel arb_model_,
const uint32_t req_width_,
const double len_in_wire_,
const TechParameter* tech_param_ptr_)
{
assert(req_width_ == req_width_);
assert(len_in_wire_ == len_in_wire_);
m_arb_model = arb_model_;
m_req_width = req_width_;
m_len_in_wire = len_in_wire_;
m_tech_param_ptr = tech_param_ptr_;
}
Arbiter::~Arbiter()
{}
double
Arbiter::get_static_power() const
{
double vdd = m_tech_param_ptr->get_vdd();
double SCALE_S = m_tech_param_ptr->get_SCALE_S();
return m_i_static*vdd*SCALE_S;
}
Arbiter*
Arbiter::create_arbiter(const string& arb_model_str_,
const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_)
{
if (arb_model_str_ == string("RR_ARBITER")) {
return new RRArbiter(ff_model_str_, req_width_,
len_in_wire_, tech_param_ptr_);
} else if (arb_model_str_ == string("MATRIX_ARBITER")) {
return new MatrixArbiter(ff_model_str_, req_width_,
len_in_wire_, tech_param_ptr_);
} else {
cerr << "WARNING: No Arbiter model" << endl;
return (Arbiter*)NULL;
}
}

87
src/mem/ruby/network/orion/Allocator/Arbiter.hh
View file

@ -1,87 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __ARBITER_H__
#define __ARBITER_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class FlipFlop;
class Arbiter
{
public:
enum ArbiterModel
{
NO_MODEL = 0,
RR_ARBITER,
MATRIX_ARBITER
};
public:
Arbiter(const ArbiterModel arb_model_,
const uint32_t req_width_,
const double len_in_wire_,
const TechParameter* tech_param_ptr_);
virtual ~Arbiter() = 0;
public:
virtual double calc_dynamic_energy(double num_req_, bool is_max_) const = 0;
double get_static_power() const;
protected:
ArbiterModel m_arb_model;
uint32_t m_req_width;
double m_len_in_wire;
const TechParameter* m_tech_param_ptr;
FlipFlop* m_ff_ptr;
double m_e_chg_req;
double m_e_chg_grant;
double m_i_static;
public:
static Arbiter* create_arbiter(const string& arb_model_str_,
const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_);
};
#endif

251
src/mem/ruby/network/orion/Allocator/MatrixArbiter.cc
View file

@ -1,251 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <cmath>
#include <iostream>
#include "mem/ruby/network/orion/Allocator/MatrixArbiter.hh"
#include "mem/ruby/network/orion/FlipFlop.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
MatrixArbiter::MatrixArbiter(const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_)
: Arbiter(RR_ARBITER, req_width_, len_in_wire_, tech_param_ptr_)
{
init(ff_model_str_);
}
MatrixArbiter::~MatrixArbiter()
{
delete m_ff_ptr;
}
double
MatrixArbiter::calc_dynamic_energy(double num_req_, bool is_max_) const
{
assert(num_req_ < m_req_width);
double num_grant;
if (num_req_ >= 1) num_grant = 1;
else if (num_req_) num_grant = 1.0 / ceil(1.0 / num_req_);
else num_grant = 0;
uint32_t total_pri = m_req_width * (m_req_width - 1) / 2;
double num_chg_pri = (m_req_width - 1) * (is_max_? 1 : 0.5);
double e_atomic;
double e_arb = 0;
//FIXME: we may overestimate request switch
e_atomic = m_e_chg_req * num_req_;
e_arb += e_atomic;
e_atomic = m_e_chg_grant * num_grant;
e_arb += e_atomic;
// priority register
e_atomic = m_ff_ptr->get_e_switch() * num_chg_pri * num_grant;
e_arb += e_atomic;
// assume 1 and 0 are uniformly distributed
if ((m_ff_ptr->get_e_keep_0() >= m_ff_ptr->get_e_keep_1()) || (!is_max_))
{
e_atomic = m_ff_ptr->get_e_keep_0();
e_atomic *= (total_pri - num_chg_pri * num_grant) * (is_max_? 1 : 0.5);
e_arb += e_atomic;
}
if ((m_ff_ptr->get_e_keep_0() < m_ff_ptr->get_e_keep_1()) || (!is_max_))
{
e_atomic = m_ff_ptr->get_e_keep_1();
e_atomic *= (total_pri - num_chg_pri * num_grant) * (is_max_? 1 : 0.5);
e_arb += e_atomic;
}
e_atomic = m_ff_ptr->get_e_clock()*total_pri;
e_arb += e_atomic;
// based on above assumptions
if (is_max_)
{
e_atomic = m_e_chg_int;
e_atomic *= (min(num_req_, m_req_width * 0.5) + 2) * (m_req_width - 1);
}
else
{
e_atomic = m_e_chg_int * (num_req_ + 1) * (m_req_width - 1) * 0.5;
}
e_arb += e_atomic;
return e_arb;
}
void MatrixArbiter::init(const string& ff_model_str_)
{
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_chg_req = calc_req_cap() / 2 * e_factor;
// two grant signals switch together, so no 1/2
m_e_chg_grant = calc_grant_cap() * e_factor;
m_e_chg_int = calc_int_cap() / 2 * e_factor;
double ff_load = calc_pri_cap();
m_ff_ptr = new FlipFlop(ff_model_str_, ff_load, m_tech_param_ptr);
m_i_static = calc_i_static();
return;
}
// the "huge" NOR gate in matrix arbiter model is an approximation
// switch cap of request signal
double MatrixArbiter::calc_req_cap()
{
double total_cap = 0;
// part 1: gate cap of NOR gates
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double gatecap = m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
total_cap += (m_req_width - 1) * gatecap;
// part 2: inverter
// FIXME: need actual size
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
total_cap += m_tech_param_ptr->calc_draincap(Wdecinvn,
TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(Wdecinvp, TechParameter::PCH, 1)
+ m_tech_param_ptr->calc_gatecap(Wdecinvn+Wdecinvp, 0);
// part 3: gate cap of the "huge" NOR gate
// FIXME: need actual size
total_cap += m_tech_param_ptr->calc_gatecap(WdecNORn + WdecNORp, 0);
// part 4: wire cap
double Cmetal = m_tech_param_ptr->get_Cmetal();
total_cap += m_len_in_wire * Cmetal;
return total_cap;
}
// switch cap of priority signal
double MatrixArbiter::calc_pri_cap()
{
double total_cap = 0;
// part 1: gate cap of NOR gate
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += 2 * m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
return total_cap;
}
// switch cap of grant signa
double MatrixArbiter::calc_grant_cap()
{
double total_cap = 0;
// part 1: drain cap of NOR gate
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double draincap1 = m_tech_param_ptr->calc_draincap(WdecNORn,
TechParameter::NCH, 1);
double draincap2 = m_tech_param_ptr->calc_draincap(WdecNORp,
TechParameter::PCH,
m_req_width);
total_cap += m_req_width * (draincap1 + draincap2);
return total_cap;
}
// switch cap of internal node
double MatrixArbiter::calc_int_cap()
{
double total_cap = 0;
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
// part 1: drain cap of NOR gate (this bloc)
// FIXME: need actual size
total_cap += 2 * m_tech_param_ptr->calc_draincap(WdecNORn,
TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, 2);
// part 2: gate cap of NOR gate (next block)
// FIXME: need actual size
total_cap += m_tech_param_ptr->calc_gatecap(WdecNORn + WdecNORp, 0);
return total_cap;
}
double MatrixArbiter::calc_i_static()
{
double i_static = 0;
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Wdff = m_tech_param_ptr->get_Wdff();
double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
double DFF_TAB_0 = m_tech_param_ptr->get_DFF_TAB(0);
// NOR
i_static += ((2 * m_req_width - 1) * m_req_width *
((WdecNORp * NOR2_TAB_0 + WdecNORn *
(NOR2_TAB_1 + NOR2_TAB_2 + NOR2_TAB_3)) / 4));
// inverter
i_static += m_req_width *
((Wdecinvn * NMOS_TAB_0 + Wdecinvp * PMOS_TAB_0) / 2);
// dff
i_static += (m_req_width * (m_req_width - 1) / 2) * Wdff * DFF_TAB_0;
return i_static;
}

70
src/mem/ruby/network/orion/Allocator/MatrixArbiter.hh
View file

@ -1,70 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __MATRIXARBITER_H__
#define __MATRIXARBITER_H__
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class MatrixArbiter : public Arbiter
{
public:
MatrixArbiter(
const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_
);
~MatrixArbiter();
public:
double calc_dynamic_energy(double num_req_, bool is_max_) const;
private:
void init(const string& ff_model_str_);
double calc_req_cap();
double calc_pri_cap();
double calc_grant_cap();
double calc_int_cap();
double calc_i_static();
private:
double m_e_chg_int;
};
#endif

238
src/mem/ruby/network/orion/Allocator/RRArbiter.cc
View file

@ -1,238 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cmath>
#include <iostream>
#include "mem/ruby/network/orion/Allocator/RRArbiter.hh"
#include "mem/ruby/network/orion/FlipFlop.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
RRArbiter::RRArbiter(
const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_
) : Arbiter(RR_ARBITER, req_width_, len_in_wire_, tech_param_ptr_)
{
init(ff_model_str_);
}
RRArbiter::~RRArbiter()
{
delete m_ff_ptr;
}
double RRArbiter::calc_dynamic_energy(double num_req_, bool is_max_) const
{
if (num_req_ > m_req_width)
{
cerr << "WARNING: (num_req_ > m_req_width). Set num_req_ = m_req_width" << endl;
num_req_ = m_req_width;
}
double num_grant;
if (num_req_ >= 1) num_grant = 1;
else if (num_req_) num_grant = 1.0 / ceil(1.0/num_req_);
else num_grant = 0;
double e_atomic;
double e_arb = 0;
e_atomic = m_e_chg_req*num_req_;
e_arb += e_atomic;
e_atomic = m_e_chg_grant*num_grant;
e_arb += e_atomic;
// assume carry signal propagates half length in average case */
// carry does not propagate in maximum case, i.e. all carrys go down */
e_atomic = m_e_chg_carry*m_req_width*(is_max_? 1:0.5)*num_grant;
e_arb += e_atomic;
e_atomic = m_e_chg_carry_in*(m_req_width*(is_max_? 1:0.5)-1)*num_grant;
e_arb += e_atomic;
// priority register
e_atomic = m_ff_ptr->get_e_switch()*2*num_grant;
e_arb += e_atomic;
e_atomic = m_ff_ptr->get_e_keep_0()*(m_req_width-2*num_grant);
e_arb += e_atomic;
e_atomic = m_ff_ptr->get_e_clock()*m_req_width;
e_arb += e_atomic;
return e_arb;
}
void RRArbiter::init(const string& ff_model_str_)
{
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_chg_req = calc_req_cap()/2*e_factor;
// two grant signals switch together, so no 1/2
m_e_chg_grant = calc_grant_cap()*e_factor;
m_e_chg_carry = calc_carry_cap()/2*e_factor;
m_e_chg_carry_in = calc_carry_in_cap()/2*e_factor;
double ff_load = calc_pri_cap();
m_ff_ptr = new FlipFlop(ff_model_str_, ff_load, m_tech_param_ptr);
m_i_static = calc_i_static();
return;
}
// switch cap of request signal (round robin arbiter)
double RRArbiter::calc_req_cap()
{
double total_cap = 0;
// part 1: gate cap of 2 NOR gates
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += 2*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
// part 2: inverter
// FIXME: need actual size
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
total_cap += m_tech_param_ptr->calc_draincap(Wdecinvn, TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(Wdecinvp, TechParameter::PCH, 1)
+ m_tech_param_ptr->calc_gatecap(Wdecinvn+Wdecinvp, 0);
// part 3: wire cap
double Cmetal = m_tech_param_ptr->get_Cmetal();
total_cap += m_len_in_wire*Cmetal;
return total_cap;
}
// switch cap of priority signal
double RRArbiter::calc_pri_cap()
{
double total_cap = 0;
// part 1: gate cap of NOR gate
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
return total_cap;
}
// switch cap of grant signa
double RRArbiter::calc_grant_cap()
{
double total_cap = 0;
// part 1: drain cap of NOR gate
// FIXME: need actual size
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += 2*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, 2);
return total_cap;
}
// switch cap of carry signal
double RRArbiter::calc_carry_cap()
{
double total_cap = 0;
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
// part 1: drain cap of NOR gate (this bloc)
// FIXME: need actual size
total_cap += 2*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, 2);
// part 2: gate cap of NOR gate (next block)
// FIXME: need actual size
total_cap += m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
return total_cap;
}
// switch cap of internal carry node
double RRArbiter::calc_carry_in_cap()
{
double total_cap = 0;
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
// part 1: gate cap of 2 NOR gate
// FIXME: need actual size
total_cap += 2*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
// part 2: drain cap of NOR gate (this bloc)
// FIXME: need actual size
total_cap += 2*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1)
+ m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, 2);
return total_cap;
}
double RRArbiter::calc_i_static()
{
double i_static = 0;
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Wdff = m_tech_param_ptr->get_Wdff();
double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
double DFF_TAB_0 = m_tech_param_ptr->get_DFF_TAB(0);
// NOR
i_static += (6*m_req_width*((WdecNORp*NOR2_TAB_0+WdecNORn*(NOR2_TAB_1+NOR2_TAB_2+NOR2_TAB_3))/4));
// inverter
i_static += 2*m_req_width*((Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0)/2);
// dff
i_static += m_req_width*Wdff*DFF_TAB_0;
return i_static;
}

72
src/mem/ruby/network/orion/Allocator/RRArbiter.hh
View file

@ -1,72 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __RRARBITER_H__
#define __RRARBITER_H__
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class RRArbiter : public Arbiter
{
public:
RRArbiter(
const string& ff_model_str_,
uint32_t req_width_,
double len_in_wire_,
const TechParameter* tech_param_ptr_
);
~RRArbiter();
public:
double calc_dynamic_energy(double num_req_, bool is_max_) const;
private:
void init(const string& ff_model_str_);
double calc_req_cap();
double calc_pri_cap();
double calc_grant_cap();
double calc_carry_cap();
double calc_carry_in_cap();
double calc_i_static();
private:
double m_e_chg_carry;
double m_e_chg_carry_in;
};
#endif

38
src/mem/ruby/network/orion/Allocator/SConscript
View file

@ -1,38 +0,0 @@
# Copyright (c) 2010 Massachusetts Institute of Technology
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Tushar Krishna
Import('*')
if env['PROTOCOL'] == 'None':
Return()
Source('Arbiter.cc')
Source('MatrixArbiter.cc')
Source('RRArbiter.cc')
Source('SWAllocator.cc')
Source('VCAllocator.cc')

175
src/mem/ruby/network/orion/Allocator/SWAllocator.cc
View file

@ -1,175 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
using namespace std;
SWAllocator::SWAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
double len_in_wire_,
const string& local_arb_model_str_,
const string& local_arb_ff_model_str_,
const string& global_arb_model_str_,
const string& global_arb_ff_model_str_,
const TechParameter* tech_param_ptr_
)
{
assert(num_in_port_ == num_in_port_);
assert(num_out_port_ == num_out_port_);
assert(num_vclass_ == num_vclass_);
assert(num_vchannel_ == num_vchannel_);
assert(len_in_wire_ == len_in_wire_);
m_num_in_port = num_in_port_;
m_num_out_port = num_out_port_;
m_num_vclass = num_vclass_;
m_num_vchannel = num_vchannel_;
if ((m_num_vclass*m_num_vchannel) > 1)
{
m_local_arb_ptr = Arbiter::create_arbiter(
local_arb_model_str_, local_arb_ff_model_str_,
m_num_vclass*m_num_vchannel, 0, tech_param_ptr_);
}
else
{
m_local_arb_ptr = NULL;
}
if (m_num_in_port > 2)
{
m_global_arb_ptr = Arbiter::create_arbiter(
global_arb_model_str_, global_arb_ff_model_str_,
m_num_in_port-1, len_in_wire_, tech_param_ptr_);
}
else
{
m_global_arb_ptr = NULL;
}
}
SWAllocator::~SWAllocator()
{}
double SWAllocator::get_dynamic_energy_local_sw_arb(double num_req_, bool is_max_) const
{
double e_local_arb = 0;
if (m_local_arb_ptr)
{
e_local_arb = m_local_arb_ptr->calc_dynamic_energy(num_req_, is_max_);
}
return e_local_arb;
}
double SWAllocator::get_dynamic_energy_global_sw_arb(double num_req_, bool is_max_) const
{
double e_global_arb = 0;
if (m_global_arb_ptr)
{
e_global_arb = m_global_arb_ptr->calc_dynamic_energy(num_req_, is_max_);
}
return e_global_arb;
}
double SWAllocator::get_static_power() const
{
double p_va = 0;
if (m_local_arb_ptr)
{
// FIXME: might not be m_num_in_port;
p_va += m_local_arb_ptr->get_static_power()*m_num_in_port;
}
if (m_global_arb_ptr)
{
p_va += m_global_arb_ptr->get_static_power()*m_num_out_port;
}
return p_va;
}
void SWAllocator::print_all() const
{
cout << "SWAllocator:" << endl;
if (m_local_arb_ptr)
{
for (uint32_t i = 0; i < m_num_vclass*m_num_vchannel; i++)
{
cout << "\t" << "Local arb (" << i << ") = " << get_dynamic_energy_local_sw_arb(i, false) << endl;
}
}
if (m_global_arb_ptr)
{
for (uint32_t i = 0; i < m_num_in_port-1; i++)
{
cout << "\t" << "Global arb (" << i << ") = " << get_dynamic_energy_global_sw_arb(i, false) << endl;
}
}
cout << "\t" << "Static power = " << get_static_power() << endl;
return;
}
SWAllocator* SWAllocator::create_swallocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const Crossbar* xbar_ptr_,
const OrionConfig* orion_cfg_ptr_
)
{
double len_in_wire = xbar_ptr_->get_len_req_wire();
const string& local_arb_model_str = orion_cfg_ptr_->get<string>("SA_IN_ARB_MODEL");
const string& local_arb_ff_model_str = orion_cfg_ptr_->get<string>("SA_IN_ARB_FF_MODEL");
const string& global_arb_model_str = orion_cfg_ptr_->get<string>("SA_OUT_ARB_MODEL");
const string& global_arb_ff_model_str = orion_cfg_ptr_->get<string>("SA_OUT_ARB_FF_MODEL");
const TechParameter* tech_param_ptr = orion_cfg_ptr_->get_tech_param_ptr();
return new SWAllocator(num_in_port_, num_out_port_, num_vclass_, num_vchannel_,
len_in_wire, local_arb_model_str, local_arb_ff_model_str,
global_arb_model_str, global_arb_ff_model_str,tech_param_ptr);
}

95
src/mem/ruby/network/orion/Allocator/SWAllocator.hh
View file

@ -1,95 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __SWALLOCATOR_H__
#define __SWALLOCATOR_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig;
class Arbiter;
class Crossbar;
class SWAllocator
{
protected:
SWAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
double len_in_wire_,
const string& local_arb_model_str_,
const string& local_arb_ff_model_str_,
const string& global_arb_model_str_,
const string& global_arb_ff_model_str_,
const TechParameter* tech_param_ptr_
);
public:
~SWAllocator();
public:
double get_dynamic_energy_local_sw_arb(double num_req_, bool is_max_) const;
double get_dynamic_energy_global_sw_arb(double num_req_, bool is_max_) const;
double get_static_power() const;
void print_all() const;
protected:
void init();
protected:
uint32_t m_num_in_port;
uint32_t m_num_out_port;
uint32_t m_num_vclass;
uint32_t m_num_vchannel;
Arbiter* m_local_arb_ptr;
Arbiter* m_global_arb_ptr;
public:
static SWAllocator* create_swallocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const Crossbar* xbar_ptr_,
const OrionConfig* orion_cfg_ptr_
);
};
#endif

302
src/mem/ruby/network/orion/Allocator/VCAllocator.cc
View file

@ -1,302 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <iostream>
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
using namespace std;
VCAllocator::VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& arb_model_str_,
const string& arb_ff_model_str_,
const TechParameter* tech_param_ptr_
)
{
assert(num_in_port_ == num_in_port_);
assert(num_out_port_ == num_out_port_);
assert(num_vclass_ == num_vclass_);
assert(num_vchannel_ == num_vchannel_);
m_va_model = ONE_STAGE_ARB;
m_num_in_port = num_in_port_;
m_num_out_port = num_out_port_;
m_num_vclass = num_vclass_;
m_num_vchannel = num_vchannel_;
m_local_arb_ptr = NULL;
m_global_arb_ptr = Arbiter::create_arbiter(
arb_model_str_, arb_ff_model_str_,
(m_num_in_port-1)*m_num_vchannel, 0, tech_param_ptr_);
m_vc_select_ptr = NULL;
}
VCAllocator::VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& local_arb_model_str_,
const string& local_arb_ff_model_str_,
const string& global_arb_model_str_,
const string& global_arb_ff_model_str_,
const TechParameter* tech_param_ptr_
)
{
assert(num_in_port_ == num_in_port_);
assert(num_out_port_ == num_out_port_);
assert(num_vclass_ == num_vclass_);
assert(num_vchannel_ == num_vchannel_);
m_va_model = TWO_STAGE_ARB;
m_num_in_port = num_in_port_;
m_num_out_port = num_out_port_;
m_num_vclass = num_vclass_;
m_num_vchannel = num_vchannel_;
// first stage
m_local_arb_ptr = Arbiter::create_arbiter(
local_arb_model_str_, local_arb_ff_model_str_,
m_num_vchannel, 0, tech_param_ptr_);
// second stage
m_global_arb_ptr = Arbiter::create_arbiter(
global_arb_model_str_, global_arb_ff_model_str_,
(m_num_in_port-1)*m_num_vchannel, 0, tech_param_ptr_);
m_vc_select_ptr = NULL;
}
VCAllocator::VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& vc_select_buf_model_str_,
const OrionConfig* orion_cfg_ptr_
)
{
assert(num_in_port_ == num_in_port_);
assert(num_out_port_ == num_out_port_);
assert(num_vclass_ == num_vclass_);
assert(num_vchannel_ == num_vchannel_);
m_va_model = VC_SELECT;
m_num_in_port = num_in_port_;
m_num_out_port = num_out_port_;
m_num_vclass = num_vclass_;
m_num_vchannel = num_vchannel_;
m_local_arb_ptr = NULL;
m_global_arb_ptr = NULL;
uint32_t vc_select_buf_num_set = m_num_vchannel;
uint32_t vc_select_buf_line_width = (uint32_t)ceil(log2(m_num_vchannel));
m_vc_select_ptr = new Buffer(vc_select_buf_model_str_, true, false,
vc_select_buf_num_set, vc_select_buf_line_width, 1, 1, orion_cfg_ptr_);
}
VCAllocator::~VCAllocator()
{
delete m_local_arb_ptr;
delete m_global_arb_ptr;
delete m_vc_select_ptr;
}
double VCAllocator::get_dynamic_energy_local_vc_arb(double num_req_, bool is_max_) const
{
double e_local_arb = 0;
switch(m_va_model)
{
case TWO_STAGE_ARB:
e_local_arb = m_local_arb_ptr->calc_dynamic_energy(num_req_, is_max_);
break;
case ONE_STAGE_ARB:
case VC_SELECT:
default:
e_local_arb = 0;
}
return e_local_arb;
}
double VCAllocator::get_dynamic_energy_global_vc_arb(double num_req_, bool is_max_) const
{
double e_global_arb = 0;
switch(m_va_model)
{
case ONE_STAGE_ARB:
case TWO_STAGE_ARB:
e_global_arb = m_global_arb_ptr->calc_dynamic_energy(num_req_, is_max_);
break;
case VC_SELECT:
default:
e_global_arb = 0;
}
return e_global_arb;
}
double VCAllocator::get_dynamic_energy_vc_select(bool is_read_, bool is_max_) const
{
double e_vc_select = 0;
switch(m_va_model)
{
case VC_SELECT:
e_vc_select = m_vc_select_ptr->get_dynamic_energy(is_read_, is_max_);
break;
case ONE_STAGE_ARB:
case TWO_STAGE_ARB:
default:
e_vc_select = 0;
}
return e_vc_select;
}
double VCAllocator::get_static_power() const
{
double p_va = 0;
switch(m_va_model)
{
case ONE_STAGE_ARB:
p_va = m_global_arb_ptr->get_static_power()*m_num_out_port*m_num_vclass*m_num_vchannel;
break;
case TWO_STAGE_ARB:
p_va += m_local_arb_ptr->get_static_power()*m_num_in_port*m_num_vclass*m_num_vchannel;
p_va += m_global_arb_ptr->get_static_power()*m_num_out_port*m_num_vclass*m_num_vchannel;
break;
case VC_SELECT:
p_va = m_vc_select_ptr->get_static_power()*m_num_out_port*m_num_vclass;
break;
default:
cerr << "ERROR: Invalid VA model" << endl;
exit(1);
}
return p_va;
}
void VCAllocator::print_all() const
{
switch(m_va_model)
{
case ONE_STAGE_ARB:
cout << "VCAllocator: ONE_STAGE_ARB" << endl;
for (uint32_t i = 0; i < (m_num_in_port-1)*m_num_vchannel; i++)
{
cout << "\t" << "Global arb (" << i << ") = " << get_dynamic_energy_global_vc_arb(i, false) << endl;
}
break;
case TWO_STAGE_ARB:
cout << "VCAllocator: TWO_STAGE_ARB" << endl;
for (uint32_t i = 0; i < m_num_vchannel; i++)
{
cout << "\t" << "Local arb (" << i << ") = " << get_dynamic_energy_local_vc_arb(i, false) << endl;
}
for (uint32_t i = 0; i < (m_num_in_port-1)*m_num_vchannel; i++)
{
cout << "\t" << "Global arb (" << i << ") = " << get_dynamic_energy_global_vc_arb(i, false) << endl;
}
break;
case VC_SELECT:
cout << "VCAllocator: VC_SELECT" << endl;
cout << "\t" << "Read = " << get_dynamic_energy_vc_select(true, false) << endl;
cout << "\t" << "Write = " << get_dynamic_energy_vc_select(false, false) << endl;
break;
default:
;
}
cout << "\t" << "Static power = " << get_static_power() << endl;
return;
}
VCAllocator* VCAllocator::create_vcallocator(
const string& vcalloc_model_str_,
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const OrionConfig* orion_cfg_ptr_
)
{
if (num_vchannel_ > 1)
{
if (vcalloc_model_str_ == string("ONE_STAGE_ARB"))
{
const string& arb_model_str = orion_cfg_ptr_->get<string>("VA_OUT_ARB_MODEL");
const string& arb_ff_model_str = orion_cfg_ptr_->get<string>("VA_OUT_ARB_FF_MODEL");
const TechParameter* tech_param_ptr = orion_cfg_ptr_->get_tech_param_ptr();
return new VCAllocator(num_in_port_, num_out_port_, num_vclass_, num_vchannel_,
arb_model_str, arb_ff_model_str, tech_param_ptr);
}
else if (vcalloc_model_str_ == string("TWO_STAGE_ARB"))
{
const string& local_arb_model_str = orion_cfg_ptr_->get<string>("VA_IN_ARB_MODEL");
const string& local_arb_ff_model_str = orion_cfg_ptr_->get<string>("VA_IN_ARB_FF_MODEL");
const string& global_arb_model_str = orion_cfg_ptr_->get<string>("VA_OUT_ARB_MODEL");
const string& global_arb_ff_model_str = orion_cfg_ptr_->get<string>("VA_OUT_ARB_FF_MODEL");
const TechParameter* tech_param_ptr = orion_cfg_ptr_->get_tech_param_ptr();
return new VCAllocator(num_in_port_, num_out_port_, num_vclass_, num_vchannel_,
local_arb_model_str, local_arb_ff_model_str,
global_arb_model_str, global_arb_ff_model_str,tech_param_ptr);
}
else if (vcalloc_model_str_ == string("VC_SELECT"))
{
const string& vc_select_buf_model_str = orion_cfg_ptr_->get<string>("VA_BUF_MODEL");
return new VCAllocator(num_in_port_, num_out_port_, num_vclass_, num_vchannel_,
vc_select_buf_model_str, orion_cfg_ptr_);
}
else
{
cerr << "WARNING: No VC allocator model" << endl;
return (VCAllocator*)NULL;
}
}
else
{
// reduce to a register
return new VCAllocator(num_in_port_, num_out_port_, num_vclass_, 1,
"REGISTER", orion_cfg_ptr_);
}
}

123
src/mem/ruby/network/orion/Allocator/VCAllocator.hh
View file

@ -1,123 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __VCALLOCATOR_H__
#define __VCALLOCATOR_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig;
class Arbiter;
class Buffer;
class VCAllocator
{
public:
enum VAModel
{
NO_MODEL = 0,
ONE_STAGE_ARB,
TWO_STAGE_ARB,
VC_SELECT
};
public:
~VCAllocator();
protected:
// for ONE_STAGE_ARB
VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& arb_model_str_,
const string& arb_ff_model_str_,
const TechParameter* tech_param_ptr_
);
// for TWO_STAGE_ARB
VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& local_arb_model_str_,
const string& local_arb_ff_model_str_,
const string& global_arb_model_str_,
const string& global_arb_ff_model_str_,
const TechParameter* tech_param_ptr_
);
// for VC_SELECT
VCAllocator(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const string& vc_select_buf_model_str_,
const OrionConfig* orion_cfg_ptr_
);
public:
double get_dynamic_energy_local_vc_arb(double num_req_, bool is_max_) const;
double get_dynamic_energy_global_vc_arb(double num_req_, bool is_max_) const;
double get_dynamic_energy_vc_select(bool is_read_, bool is_max_) const;
double get_static_power() const;
void print_all() const;
protected:
VAModel m_va_model;
uint32_t m_num_in_port;
uint32_t m_num_out_port;
uint32_t m_num_vclass;
uint32_t m_num_vchannel;
Arbiter* m_local_arb_ptr;
Arbiter* m_global_arb_ptr;
Buffer* m_vc_select_ptr;
public:
static VCAllocator* create_vcallocator(
const string& vcalloc_model_str_,
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
uint32_t num_vchannel_,
const OrionConfig* orion_cfg_ptr_
);
};
#endif

72
src/mem/ruby/network/orion/Buffer/AmpUnit.cc
View file

@ -1,72 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "mem/ruby/network/orion/Buffer/AmpUnit.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
AmpUnit::AmpUnit(
const string& amp_model_str_,
const TechParameter* tech_param_ptr_
)
{
if (amp_model_str_.compare("GENERIC_AMP") == 0)
{
m_amp_model = GENERIC_AMP;
}
else
{
m_amp_model = NO_MODEL;
}
if (m_amp_model != NO_MODEL)
{
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
AmpUnit::~AmpUnit()
{}
void AmpUnit::init()
{
double vdd = m_tech_param_ptr->get_vdd();
double period = m_tech_param_ptr->get_period();
double amp_Idsat = m_tech_param_ptr->get_amp_idsat();
m_e_access = (vdd / 8.0 * period * amp_Idsat);
return;
}

73
src/mem/ruby/network/orion/Buffer/AmpUnit.hh
View file

@ -1,73 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __AMPUNIT_H__
#define __AMPUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class AmpUnit
{
public:
enum AmpModel
{
NO_MODEL = 0,
GENERIC_AMP
};
public:
AmpUnit(
const string& amp_model_str_,
const TechParameter* tech_param_ptr_
);
~AmpUnit();
public:
double get_e_access() const { return m_e_access; }
private:
void init();
private:
AmpModel m_amp_model;
const TechParameter* m_tech_param_ptr;
double m_e_access;
};
#endif

200
src/mem/ruby/network/orion/Buffer/BitlineUnit.cc
View file

@ -1,200 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/BitlineUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
BitlineUnit::BitlineUnit(
const string bl_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
)
{
if (bl_model_str_ == "RW_BITLINE")
{
m_bl_model = RW_BITLINE;
}
else if (bl_model_str_ == "WO_BITLINE")
{
m_bl_model = WO_BITLINE;
}
else
{
m_bl_model = NO_MODEL;
}
if (m_bl_model != NO_MODEL)
{
m_sram_ptr = sram_ptr_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
BitlineUnit::~BitlineUnit()
{}
void BitlineUnit::init()
{
uint32_t num_port = m_sram_ptr->get_num_port();
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
double bl_cmetal;
if ((num_port > 1) || (num_data_end == 2))
{
bl_cmetal = m_tech_param_ptr->get_CC3M2metal();
}
else
{
bl_cmetal = m_tech_param_ptr->get_CM2metal();
}
uint32_t num_row = m_sram_ptr->get_num_row();
double RegCellHeight = m_tech_param_ptr->get_RegCellHeight();
double WordlineSpacing = m_tech_param_ptr->get_WordlineSpacing();
m_bl_len = num_row*(RegCellHeight + num_port*WordlineSpacing);
m_bl_wire_cap = m_bl_len * bl_cmetal;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
double sense_e_factor = m_tech_param_ptr->get_SenseEnergyFactor();
switch(m_bl_model)
{
case RW_BITLINE:
if (num_data_end == 2)
{
m_e_col_sel = calc_col_select_cap() * e_factor;
m_e_col_read = calc_col_read_cap() * sense_e_factor;
}
else
{
m_e_col_sel = 0;
m_e_col_read = calc_col_read_cap() * e_factor;
}
m_e_col_write = calc_col_write_cap() * e_factor;
m_i_static = calc_i_static();
break;
case WO_BITLINE:
m_e_col_sel = m_e_col_read = 0;
m_e_col_write = calc_col_write_cap() * e_factor;
//FIXME - no static power?
break;
default:
fatal("Error in BITLINE model.\n");
}
return;
}
double BitlineUnit::calc_col_select_cap()
{
double Wbitmuxn = m_tech_param_ptr->get_Wbitmuxn();
return m_tech_param_ptr->calc_gatecap(Wbitmuxn, 1);
}
double BitlineUnit::calc_col_read_cap()
{
double total_cap = 0;
// part 1: drain cap of precharge tx's
//total_cap = m_num_bl_pre * Util::calc_draincap(m_pre_size, Util::PCH, 1);
// part 2: drain cap of pass tx's
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
uint32_t num_row = m_sram_ptr->get_num_row();
total_cap = num_row * m_tech_param_ptr->calc_draincap(Wmemcellr, TechParameter::NCH, 1);
// part 3: metal cap
total_cap += m_bl_wire_cap;
m_pre_unit_load = total_cap;
// part 4: bitline inverter
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
if (num_data_end == 1)
{
// FIXME: magic numbers
double MSCALE = m_tech_param_ptr->get_MSCALE();
total_cap += m_tech_param_ptr->calc_gatecap(MSCALE * (29.9 + 7.8), 0) + m_tech_param_ptr->calc_gatecap(MSCALE * (47.0 + 12.0), 0);
}
// part 5: gate cap of sense amplifier or output driver
bool is_outdrv = m_sram_ptr->get_is_outdrv();
if (num_data_end == 2)
{ // sense amplifier
double WsenseQ1to4 = m_tech_param_ptr->get_WsenseQ1to4();
total_cap += 2 * m_tech_param_ptr->calc_gatecap(WsenseQ1to4, 10);
}
else if (is_outdrv)
{
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap += m_tech_param_ptr->calc_gatecap(Woutdrvnandn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnandp, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorp, 1);
}
return total_cap;
}
double BitlineUnit::calc_col_write_cap()
{
double total_cap, psize, nsize;
// part 1: line cap, including drain cap of pass tx's and metal cap
uint32_t num_row = m_sram_ptr->get_num_row();
double Wmemcellw = m_tech_param_ptr->get_Wmemcellw();
total_cap = num_row * m_tech_param_ptr->calc_draincap(Wmemcellw, TechParameter::NCH, 1) + m_bl_wire_cap;
// part 2: write driver
double period = m_tech_param_ptr->get_period();
psize = m_tech_param_ptr->calc_driver_psize(total_cap, period / 8.0);
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
nsize = psize * Wdecinvn / Wdecinvp;
total_cap += m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1) + m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1) + m_tech_param_ptr->calc_gatecap(psize + nsize, 1);
return total_cap;
}
double BitlineUnit::calc_i_static()
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
return (2*(Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0));
}

93
src/mem/ruby/network/orion/Buffer/BitlineUnit.hh
View file

@ -1,93 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __BITLINEUNIT_H__
#define __BITLINEUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class SRAM;
class TechParameter;
class BitlineUnit
{
public:
enum BitlineModel
{
NO_MODEL = 0,
RW_BITLINE,
WO_BITLINE
};
public:
BitlineUnit(
const string bl_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
);
~BitlineUnit();
public:
double get_pre_unit_load() const { return m_pre_unit_load; }
double get_e_col_read() const { return m_e_col_read; }
double get_e_col_wrtie() const { return m_e_col_write; }
double get_i_static() const { return m_i_static; }
private:
void init();
double calc_col_select_cap();
double calc_col_read_cap();
double calc_col_write_cap();
double calc_i_static();
private:
BitlineModel m_bl_model;
const SRAM* m_sram_ptr;
const TechParameter* m_tech_param_ptr;
double m_bl_len;
double m_bl_wire_cap;
double m_pre_unit_load;
double m_e_col_sel;
double m_e_col_read;
double m_e_col_write;
double m_i_static;
};
#endif

187
src/mem/ruby/network/orion/Buffer/Buffer.cc
View file

@ -1,187 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
#include "mem/ruby/network/orion/Buffer/Register.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
Buffer::Buffer(
const string& buffer_model_str_,
bool is_fifo_,
bool is_outdrv_,
uint32_t num_entry_,
uint32_t line_width_,
uint32_t num_read_port_,
uint32_t num_write_port_,
const OrionConfig* orion_cfg_ptr_
)
{
if (buffer_model_str_ == string("SRAM"))
{
m_buffer_model = BUF_SRAM;
}
else if(buffer_model_str_ == string("REGISTER"))
{
m_buffer_model = BUF_REG;
}
else
{
m_buffer_model = NO_MODEL;
}
if (m_buffer_model != NO_MODEL)
{
assert(num_entry_ == num_entry_);
assert(line_width_ == line_width_);
assert(num_read_port_ == num_read_port_);
assert(num_write_port_ == num_write_port_);
m_num_entry = num_entry_;
m_line_width = line_width_;
m_is_fifo = is_fifo_;
m_is_outdrv = is_outdrv_;
m_num_read_port = num_read_port_;
m_num_write_port = num_write_port_;
m_orion_cfg_ptr = orion_cfg_ptr_;
m_tech_param_ptr = m_orion_cfg_ptr->get_tech_param_ptr();
init();
}
}
Buffer::~Buffer()
{
delete m_sram_ptr;
}
double Buffer::get_dynamic_energy(
bool is_read_,
bool is_max_
) const
{
if (m_buffer_model == BUF_SRAM)
{
if (is_read_)
{
return m_sram_ptr->calc_e_read(is_max_);
}
else
{
return m_sram_ptr->calc_e_write(is_max_);
}
}
else if (m_buffer_model == BUF_REG)
{
if (is_read_)
{
return m_reg_ptr->calc_e_read();
}
else
{
return m_reg_ptr->calc_e_write();
}
}
else
{
return 0;
}
}
double Buffer::get_static_power() const
{
double vdd = m_tech_param_ptr->get_vdd();
double SCALE_S = m_tech_param_ptr->get_SCALE_S();
if (m_buffer_model == BUF_SRAM)
{
return m_sram_ptr->calc_i_static()*vdd*SCALE_S;
}
else if (m_buffer_model == BUF_REG)
{
return m_reg_ptr->calc_i_static()*vdd*SCALE_S;
}
else
{
return 0;
}
}
void Buffer::print_all() const
{
cout << "Buffer" << endl;
cout << "\t" << "Read = " << get_dynamic_energy(true, false) << endl;
cout << "\t" << "Write = " << get_dynamic_energy(false, false) << endl;
cout << "\t" << "Static power = " << get_static_power() << endl;
return;
}
void Buffer::init()
{
if(m_buffer_model == BUF_SRAM)
{
uint32_t num_data_end = m_orion_cfg_ptr->get<uint32_t>("SRAM_NUM_DATA_END");
const string& rowdec_model_str = m_orion_cfg_ptr->get<string>("SRAM_ROWDEC_MODEL");
const string& wl_model_str = m_orion_cfg_ptr->get<string>("SRAM_WORDLINE_MODEL");
const string& bl_pre_model_str = m_orion_cfg_ptr->get<string>("SRAM_BITLINE_PRE_MODEL");
const string& mem_model_str = "NORMAL_MEM";
const string& bl_model_str = m_orion_cfg_ptr->get<string>("SRAM_BITLINE_MODEL");
const string& amp_model_str = m_orion_cfg_ptr->get<string>("SRAM_AMP_MODEL");
const string& outdrv_model_str = m_orion_cfg_ptr->get<string>("SRAM_OUTDRV_MODEL");
m_sram_ptr = new SRAM(
m_num_entry, m_line_width, m_is_fifo, m_is_outdrv,
m_num_read_port, m_num_write_port, num_data_end,
rowdec_model_str, wl_model_str, bl_pre_model_str, mem_model_str,
bl_model_str, amp_model_str, outdrv_model_str, m_tech_param_ptr);
}
else if (m_buffer_model == BUF_REG)
{
m_sram_ptr = NULL;
m_reg_ptr = new Register(m_num_entry, m_line_width, m_tech_param_ptr);
}
else
{
m_sram_ptr = NULL;
m_reg_ptr = NULL;
}
return;
}

96
src/mem/ruby/network/orion/Buffer/Buffer.hh
View file

@ -1,96 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __BUFFER_H__
#define __BUFFER_H__
#include "mem/ruby/network/orion/Type.hh"
class OrionConfig;
class TechParameter;
class SRAM;
class Register;
class Buffer
{
public:
enum BufferModel
{
NO_MODEL = 0,
BUF_SRAM,
BUF_REG
};
public:
Buffer(
const string& buffer_model_str_,
bool is_fifo_,
bool is_outdrv_,
uint32_t num_entry_,
uint32_t line_width_,
uint32_t num_read_port_,
uint32_t num_write_port_,
const OrionConfig* orion_cfg_ptr_
);
~Buffer();
public:
double get_dynamic_energy(bool is_read_, bool is_max_) const;
double get_static_power() const;
void print_all() const;
private:
void init();
private:
BufferModel m_buffer_model;
uint32_t m_num_entry;
uint32_t m_line_width;
bool m_is_fifo;
bool m_is_outdrv;
uint32_t m_num_read_port;
uint32_t m_num_write_port;
const OrionConfig* m_orion_cfg_ptr;
const TechParameter* m_tech_param_ptr;
SRAM* m_sram_ptr;
Register* m_reg_ptr;
};
#endif

171
src/mem/ruby/network/orion/Buffer/DecoderUnit.cc
View file

@ -1,171 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cmath>
#include "mem/ruby/network/orion/Buffer/DecoderUnit.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
DecoderUnit::DecoderUnit(
const string& dec_model_str_,
uint32_t dec_width_,
const TechParameter* tech_param_ptr_
)
{
if (dec_model_str_.compare("GENERIC_DEC") == 0)
{
m_dec_model = GENERIC_DEC;
}
else
{
m_dec_model = NO_MODEL;
}
if (m_dec_model != NO_MODEL)
{
m_dec_width = dec_width_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
DecoderUnit::~DecoderUnit()
{
}
void DecoderUnit::init()
{
if (m_dec_width >= 4)
{ // 2-level decoder
m_num_in_1st = (m_dec_width == 4)? 2:3;
m_num_out_0th = 1 << (m_num_in_1st - 1);
m_num_in_2nd = (uint32_t)ceil((double)m_dec_width/(double)m_num_in_1st);
m_num_out_1st = 1 << (m_dec_width - m_num_in_1st);
}
else if (m_dec_width >= 2)
{ // 1-level decoder
m_num_in_1st = m_dec_width;
m_num_out_0th = 1 << (m_num_in_1st - 1);
m_num_in_2nd = m_num_out_1st = 0;
}
else
{
m_num_in_1st = m_num_out_0th = m_num_in_2nd = m_num_out_1st = 0;
}
// compute energy constants
double e_factor = m_tech_param_ptr->get_vdd() * m_tech_param_ptr->get_vdd();
if (m_dec_width >= 4)
{
m_e_chg_l1 = calc_chgl1_cap() * e_factor;
m_e_chg_output = calc_select_cap() * e_factor;
}
else if (m_dec_width >= 2)
{
m_e_chg_l1 = calc_chgl1_cap() * e_factor;
m_e_chg_output = 0;
}
else
{
m_e_chg_l1 = m_e_chg_output = 0;
}
m_e_chg_addr = calc_chgaddr_cap() * e_factor;
return;
}
double DecoderUnit::calc_chgl1_cap()
{
double total_cap;
// part 1: drain cap of level-1 decoder
double Wdec3to8p = m_tech_param_ptr->get_Wdec3to8p();
double Wdec3to8n = m_tech_param_ptr->get_Wdec3to8n();
total_cap = m_num_in_1st * m_tech_param_ptr->calc_draincap(Wdec3to8p, TechParameter::PCH, 1) + m_tech_param_ptr->calc_draincap(Wdec3to8n, TechParameter::NCH, m_num_in_1st);
/* part 2: gate cap of level-2 decoder */
/* WHS: 40 and 20 should go to PARM */
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += m_num_out_0th*m_tech_param_ptr->calc_gatecap((WdecNORn+WdecNORp), m_num_in_2nd*40 + 20);
return total_cap;
}
double DecoderUnit::calc_select_cap()
{
double total_cap;
// part 1: drain cap of last level decoders
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
total_cap = m_num_in_2nd * m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, m_num_in_2nd);
// part 2: output inverter
// WHS: 20 should go to PARM
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
total_cap += m_tech_param_ptr->calc_draincap(Wdecinvn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(Wdecinvp, TechParameter::PCH, 1) + m_tech_param_ptr->calc_gatecap(Wdecinvn + Wdecinvp, 20);
return total_cap;
}
double DecoderUnit::calc_chgaddr_cap()
{
double total_cap;
// stage 1: input driver
double Wdecdrivep = m_tech_param_ptr->get_Wdecdrivep();
double Wdecdriven = m_tech_param_ptr->get_Wdecdriven();
total_cap = m_tech_param_ptr->calc_draincap(Wdecdrivep, TechParameter::PCH, 1) + m_tech_param_ptr->calc_draincap(Wdecdriven, TechParameter::NCH, 1) + m_tech_param_ptr->calc_gatecap(Wdecdriven, 1);
/* inverter to produce complement addr, this needs 1/2 */
/* WHS: assume Wdecinv(np) for this inverter */
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
total_cap += (m_tech_param_ptr->calc_draincap(Wdecinvp, TechParameter::PCH, 1) + m_tech_param_ptr->calc_draincap(Wdecinvn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_gatecap(Wdecinvp, 1) + m_tech_param_ptr->calc_gatecap(Wdecinvn, 1)) / 2;
/* stage 2: gate cap of level-1 decoder */
/* WHS: 10 should go to PARM */
double Wdec3to8p = m_tech_param_ptr->get_Wdec3to8p();
double Wdec3to8n = m_tech_param_ptr->get_Wdec3to8n();
total_cap += m_num_out_0th*m_tech_param_ptr->calc_gatecap( Wdec3to8n + Wdec3to8p, 10 );
return total_cap;
}

88
src/mem/ruby/network/orion/Buffer/DecoderUnit.hh
View file

@ -1,88 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __DECODERUNIT_H__
#define __DECODERUNIT_H__
#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Type.hh"
class DecoderUnit
{
public:
enum DecModel
{
NO_MODEL = 0,
GENERIC_DEC
};
public:
DecoderUnit(
const string& dec_model_str_,
uint32_t dec_width_,
const TechParameter* tech_param_ptr_
);
~DecoderUnit();
public:
uint32_t get_dec_width() const { return m_dec_width; }
uint32_t get_num_in_2nd() const { return m_num_in_2nd; }
double get_e_chg_addr() const { return m_e_chg_addr; }
double get_e_chg_output() const { return m_e_chg_output; }
double get_e_chg_l1() const { return m_e_chg_l1; }
private:
void init();
double calc_chgl1_cap();
double calc_select_cap();
double calc_chgaddr_cap();
private:
DecModel m_dec_model;
uint32_t m_dec_width;
const TechParameter* m_tech_param_ptr;
uint32_t m_num_in_1st;
uint32_t m_num_in_2nd;
uint32_t m_num_out_0th;
uint32_t m_num_out_1st;
double m_e_chg_l1;
double m_e_chg_output;
double m_e_chg_addr;
};
#endif

132
src/mem/ruby/network/orion/Buffer/MemUnit.cc
View file

@ -1,132 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <iostream>
#include "mem/ruby/network/orion/Buffer/MemUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
MemUnit::MemUnit(
const string& mem_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
)
{
if (mem_model_str_.compare("NORMAL_MEM") == 0)
{
m_mem_model = NORMAL_MEM;
}
else
{
m_mem_model = NO_MODEL;
}
if (m_mem_model != NO_MODEL)
{
m_sram_ptr = sram_ptr_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
MemUnit::~MemUnit()
{}
void MemUnit::init()
{
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_switch = calc_mem_cap() * e_factor;
m_i_static = calc_i_static();
}
double MemUnit::calc_mem_cap()
{
double Wmemcella = m_tech_param_ptr->get_Wmemcella();
double Wmemcellbscale = m_tech_param_ptr->get_Wmemcellbscale();
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double Wmemcellw = m_tech_param_ptr->get_Wmemcellw();
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
uint32_t num_read_port = m_sram_ptr->get_num_read_port();
uint32_t num_write_port = m_sram_ptr->get_num_write_port();
const TechParameter* tp = m_tech_param_ptr;
double total_cap = 0;
// part 1: drain capacitance of pass transistors
total_cap += tp->calc_draincap(Wmemcellr, TechParameter::NCH, 1)*num_read_port*num_data_end/2.0;
total_cap += tp->calc_draincap(Wmemcellw, TechParameter::NCH, 1)*num_write_port;
// has coefficient (1/2 * 2)
// part 2: drain capacitance of memory cell
total_cap += tp->calc_draincap(Wmemcella, TechParameter::NCH, 1) + tp->calc_draincap(Wmemcella*Wmemcellbscale, TechParameter::PCH, 1
);
// has coefficient (1/2 * 2)
// part 3: gate capacitance of memory cell
total_cap += tp->calc_gatecap(Wmemcella, 1) + tp->calc_gatecap(Wmemcella*Wmemcellbscale, 1);
return total_cap;
}
double MemUnit::calc_i_static()
{
double Wmemcella = m_tech_param_ptr->get_Wmemcella();
double Wmemcellbscale = m_tech_param_ptr->get_Wmemcellbscale();
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double Wmemcellw = m_tech_param_ptr->get_Wmemcellw();
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
uint32_t num_read_port = m_sram_ptr->get_num_read_port();
uint32_t num_write_port = m_sram_ptr->get_num_write_port();
const TechParameter* tp = m_tech_param_ptr;
double ret = 0;
// memory cell
//FIXME - why
ret += (Wmemcella*tp->get_NMOS_TAB(0) + Wmemcella*Wmemcellbscale*tp->get_PMOS_TAB(0))*2;
// read port pass tx
ret += (Wmemcellr*tp->get_NMOS_TAB(0)*num_data_end*num_read_port);
// write port pass tx
ret += (Wmemcellw*tp->get_NMOS_TAB(0)*2*num_write_port);
return ret;
}

80
src/mem/ruby/network/orion/Buffer/MemUnit.hh
View file

@ -1,80 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __MEMUNIT_H__
#define __MEMUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class SRAM;
class TechParameter;
class MemUnit
{
public:
enum MemModel
{
NO_MODEL = 0,
NORMAL_MEM
};
public:
MemUnit(
const string& mem_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
);
~MemUnit();
public:
double get_e_switch() const { return m_e_switch; }
double get_i_static() const { return m_i_static; }
private:
void init();
double calc_mem_cap();
double calc_i_static();
private:
MemModel m_mem_model;
const SRAM* m_sram_ptr;
const TechParameter* m_tech_param_ptr;
double m_e_switch;
double m_i_static;
};
#endif

176
src/mem/ruby/network/orion/Buffer/OutdrvUnit.cc
View file

@ -1,176 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/OutdrvUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
OutdrvUnit::OutdrvUnit(
const string& outdrv_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
)
{
if (outdrv_model_str_ == string("CACHE_OUTDRV"))
{
m_outdrv_model = CACHE_OUTDRV;
}
else if (outdrv_model_str_ == string("REG_OUTDRV"))
{
m_outdrv_model = REG_OUTDRV;
}
else
{
m_outdrv_model = NO_MODEL;
}
if (m_outdrv_model != NO_MODEL)
{
m_sram_ptr = sram_ptr_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
else
{
m_e_select = 0;
m_e_out_1 = 0;
m_e_out_0 = 0;
m_e_chg_data = 0;
}
}
OutdrvUnit::~OutdrvUnit()
{}
void OutdrvUnit::init()
{
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_select = calc_select_cap() * e_factor;
m_e_out_1 = calc_outdata_cap(1) * e_factor;
m_e_out_0 = calc_outdata_cap(0) * e_factor;
switch(m_outdrv_model)
{
case CACHE_OUTDRV:
m_e_chg_data = calc_chgdata_cap() * e_factor;
break;
case REG_OUTDRV:
m_e_chg_data = 0;
break;
default:
fatal("Incorrect OUTDRIVE model.\n");
}
m_i_static = calc_i_static();
return;
}
double OutdrvUnit::calc_select_cap()
{
double total_cap;
// stage 1: inverter
double Woutdrvseln = m_tech_param_ptr->get_Woutdrvseln();
double Woutdrvselp = m_tech_param_ptr->get_Woutdrvselp();
total_cap = m_tech_param_ptr->calc_gatecap(Woutdrvseln, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvselp, 1) + m_tech_param_ptr->calc_draincap(Woutdrvseln, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(Woutdrvselp, TechParameter::PCH, 1);
// stage 2: gate cap of nand gate and nor gate
// only consider 1 gate cap because another and drain cap switch depends on data value
uint32_t line_width = m_sram_ptr->get_line_width();
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap += line_width * (m_tech_param_ptr->calc_gatecap(Woutdrvnandn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnandp, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorp, 1));
return total_cap;
}
double OutdrvUnit::calc_chgdata_cap()
{
double total_cap;
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap = (m_tech_param_ptr->calc_gatecap(Woutdrvnandn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnandp, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorn, 1) + m_tech_param_ptr->calc_gatecap(Woutdrvnorp, 1)) / 2.0;
return total_cap;
}
double OutdrvUnit::calc_outdata_cap(bool value_)
{
double total_cap = 0;
// stage 1: drain cap of nand gate or nor gate
if (value_)
{
//drain cap of nand gate
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
total_cap = m_tech_param_ptr->calc_draincap(Woutdrvnandn, TechParameter::NCH, 2) + 2 * m_tech_param_ptr->calc_draincap(Woutdrvnandp, TechParameter::PCH, 1);
}
else
{
//drain cap of nor gate
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap = 2 * m_tech_param_ptr->calc_draincap(Woutdrvnorn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(Woutdrvnorp, TechParameter::PCH, 2);
}
// stage 2: gate cap of output inverter
if (value_)
{
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
total_cap += m_tech_param_ptr->calc_gatecap(Woutdriverp, 1);
}
else
{
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
total_cap += m_tech_param_ptr->calc_gatecap(Woutdrivern, 1);
}
//drian cap of output inverter should be included into bus cap
//TODO
return total_cap;
}
double OutdrvUnit::calc_i_static()
{
//FIXME - add static power
return 0;
}

89
src/mem/ruby/network/orion/Buffer/OutdrvUnit.hh
View file

@ -1,89 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __OUTDRVUNIT_H__
#define __OUTDRVUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class SRAM;
class TechParameter;
class OutdrvUnit
{
public:
enum OutdrvModel
{
NO_MODEL = 0,
CACHE_OUTDRV,
REG_OUTDRV
};
public:
OutdrvUnit(
const string& outdrv_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
);
~OutdrvUnit();
public:
double get_e_select() const { return m_e_select; }
double get_e_chg_data() const { return m_e_chg_data; }
double get_e_out_0() const { return m_e_out_0; }
double get_e_out_1() const { return m_e_out_1; }
private:
void init();
double calc_select_cap();
double calc_chgdata_cap();
double calc_outdata_cap(bool value_);
double calc_i_static();
private:
OutdrvModel m_outdrv_model;
const SRAM* m_sram_ptr;
const TechParameter* m_tech_param_ptr;
double m_e_select;
double m_e_out_1;
double m_e_out_0;
double m_e_chg_data;
double m_i_static;
};
#endif

137
src/mem/ruby/network/orion/Buffer/PrechargeUnit.cc
View file

@ -1,137 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/PrechargeUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
PrechargeUnit::PrechargeUnit(
const string& pre_model_str_,
double pre_load_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
)
{
if (pre_model_str_ == "SINGLE_BITLINE")
{
m_pre_model = SINGLE_BITLINE;
}
else if (pre_model_str_ == "EQU_BITLINE")
{
m_pre_model = EQU_BITLINE;
}
else if (pre_model_str_ == "SINGLE_OTHER")
{
m_pre_model = SINGLE_OTHER;
}
else
{
m_pre_model = NO_MODEL;
}
if (m_pre_model != NO_MODEL)
{
m_pre_load = pre_load_;
m_sram_ptr = sram_ptr_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
PrechargeUnit::~PrechargeUnit()
{
}
void PrechargeUnit::init()
{
double period = m_tech_param_ptr->get_period();
m_pre_size = m_tech_param_ptr->calc_driver_psize(m_pre_load, period/8.0);
//FIXME - shouldn't be added
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
m_pre_size += m_pre_size*Wdecinvn/Wdecinvp;
uint32_t num_gate = calc_num_pre_gate();
// WHS: 10 should go to PARM
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_charge_gate = calc_pre_cap(m_pre_size, 10) * num_gate * e_factor;
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
if (num_data_end == 2)
{
e_factor = m_tech_param_ptr->get_SenseEnergyFactor();
}
else
{
e_factor = m_tech_param_ptr->get_EnergyFactor();
}
uint32_t num_drain = calc_num_pre_drain();
m_e_charge_drain = m_tech_param_ptr->calc_draincap(m_pre_size, TechParameter::PCH, 1)*num_drain*e_factor;
// static power
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
m_i_static = num_gate*m_pre_size*PMOS_TAB_0;
}
uint32_t PrechargeUnit::calc_num_pre_gate()
{
switch(m_pre_model)
{
case SINGLE_BITLINE: return 2;
case EQU_BITLINE: return 3;
case SINGLE_OTHER: return 1;
default: fatal("Incorrect Precharge Unit model.\n");
}
}
uint32_t PrechargeUnit::calc_num_pre_drain()
{
switch(m_pre_model)
{
case SINGLE_BITLINE: return 1;
case EQU_BITLINE: return 2;
case SINGLE_OTHER: return 1;
default: fatal("Incorrect Precharge Unit model.\n");
}
}
double PrechargeUnit::calc_pre_cap(double width_, double length_)
{
return m_tech_param_ptr->calc_gatecap(width_, length_);
}

90
src/mem/ruby/network/orion/Buffer/PrechargeUnit.hh
View file

@ -1,90 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __PRECHARGEUNIT_H__
#define __PRECHARGEUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class SRAM;
class TechParameter;
class PrechargeUnit
{
public:
enum PrechargeModel
{
NO_MODEL = 0,
SINGLE_BITLINE,
EQU_BITLINE,
SINGLE_OTHER
};
public:
PrechargeUnit(
const string& pre_model_str_,
double pre_load_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
);
~PrechargeUnit();
public:
double get_e_charge_gate() const { return m_e_charge_gate; }
double get_e_charge_drain() const { return m_e_charge_drain; }
double get_i_static() const { return m_i_static; }
private:
void init();
uint32_t calc_num_pre_gate();
uint32_t calc_num_pre_drain();
double calc_pre_cap(double width_, double length_);
private:
PrechargeModel m_pre_model;
double m_pre_load;
const SRAM* m_sram_ptr;
const TechParameter* m_tech_param_ptr;
double m_pre_size;
double m_e_charge_gate;
double m_e_charge_drain;
double m_i_static;
};
#endif

113
src/mem/ruby/network/orion/Buffer/Register.cc
View file

@ -1,113 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Buffer/Register.hh"
#include "mem/ruby/network/orion/FlipFlop.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
Register::Register(
uint32_t num_entry_,
uint32_t line_width_,
const TechParameter *tech_param_ptr_
)
{
assert(num_entry_ == num_entry_);
assert(line_width_ == line_width_);
m_num_entry = num_entry_;
m_line_width = line_width_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
Register::~Register()
{
delete m_ff_ptr;
}
double Register::calc_e_read() const
{
// average read energy for one buffer entry
double e_read = 0;
// for each read operation, the energy consists of one read operation and n write
// operateion. n means there is n flits in the buffer before read operation.
// assume n is info->n_entry * 0.25.
//
if (m_num_entry > 1)
{
e_read = (m_avg_read + m_num_entry*0.25*m_avg_write);
}
else
{
e_read = m_avg_read;
}
return e_read;
}
double Register::calc_e_write() const
{
// average write energy for one buffer entry
double e_write = 0;
e_write = m_avg_write;
return e_write;
}
double Register::calc_i_static() const
{
double i_static = m_ff_ptr->get_i_static()*m_line_width*m_num_entry;
return i_static;
}
void Register::init()
{
m_ff_ptr = new FlipFlop("NEG_DFF", 0, m_tech_param_ptr);
uint32_t num_clock = m_line_width;
m_avg_read = m_ff_ptr->get_e_clock()*((double)num_clock)/2.0;
double num_switch = m_line_width/2.0;
m_avg_write = m_ff_ptr->get_e_switch()*num_switch+m_ff_ptr->get_e_clock()*num_clock;
return;
}

73
src/mem/ruby/network/orion/Buffer/Register.hh
View file

@ -1,73 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __REGISTER_H__
#define __REGISTER_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class FlipFlop;
class Register
{
public:
Register(
uint32_t num_entry_,
uint32_t line_width_,
const TechParameter* tech_param_ptr_
);
~Register();
public:
double calc_e_read() const;
double calc_e_write() const;
double calc_i_static() const;
private:
void init();
private:
uint32_t m_num_entry;
uint32_t m_line_width;
const TechParameter* m_tech_param_ptr;
FlipFlop* m_ff_ptr;
double m_avg_read;
double m_avg_write;
};
#endif

43
src/mem/ruby/network/orion/Buffer/SConscript
View file

@ -1,43 +0,0 @@
# Copyright (c) 2010 Massachusetts Institute of Technology
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Tushar Krishna
Import('*')
if env['PROTOCOL'] == 'None':
Return()
Source('AmpUnit.cc')
Source('BitlineUnit.cc')
Source('Buffer.cc')
Source('DecoderUnit.cc')
Source('MemUnit.cc')
Source('OutdrvUnit.cc')
Source('PrechargeUnit.cc')
Source('Register.cc')
Source('SRAM.cc')
Source('WordlineUnit.cc')

271
src/mem/ruby/network/orion/Buffer/SRAM.cc
View file

@ -1,271 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <cmath>
#include <iostream>
#include "mem/ruby/network/orion/Buffer/AmpUnit.hh"
#include "mem/ruby/network/orion/Buffer/BitlineUnit.hh"
#include "mem/ruby/network/orion/Buffer/DecoderUnit.hh"
#include "mem/ruby/network/orion/Buffer/MemUnit.hh"
#include "mem/ruby/network/orion/Buffer/OutdrvUnit.hh"
#include "mem/ruby/network/orion/Buffer/PrechargeUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/Buffer/WordlineUnit.hh"
using namespace std;
SRAM::SRAM(
uint32_t num_entry_,
uint32_t line_width_,
bool is_fifo_,
bool is_outdrv_,
uint32_t num_read_port_,
uint32_t num_write_port_,
uint32_t num_data_end_,
const string& rowdec_model_str_,
const string& wl_model_str_,
const string& bl_pre_model_str_,
const string& mem_model_str_,
const string& bl_model_str_,
const string& amp_model_str_,
const string& outdrv_model_str_,
const TechParameter* tech_param_ptr_
)
{
assert(num_entry_ == num_entry_);
assert(line_width_ == line_width_);
assert(num_read_port_ == num_read_port_);
assert(num_write_port_ == num_write_port_);
assert(num_data_end_ == num_data_end_);
m_num_entry = num_entry_;
m_line_width = line_width_;
m_is_fifo = is_fifo_;
m_is_outdrv = is_outdrv_;
m_num_read_port = num_read_port_;
m_num_write_port = num_write_port_;
m_num_data_end = num_data_end_;
m_rowdec_model_str = rowdec_model_str_;
m_wl_model_str = wl_model_str_;
m_bl_pre_model_str = bl_pre_model_str_;
m_mem_model_str = mem_model_str_;
m_bl_model_str = bl_model_str_;
m_amp_model_str = amp_model_str_;
m_outdrv_model_str = outdrv_model_str_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
SRAM::~SRAM()
{
delete m_outdrv_unit_ptr;
delete m_amp_unit_ptr;
delete m_bl_unit_ptr;
delete m_mem_unit_ptr;
delete m_bl_pre_unit_ptr;
delete m_wl_unit_ptr;
delete m_rowdec_unit_ptr;
}
double SRAM::calc_e_read(
bool is_max_
) const
{
double e_atomic;
double e_read = 0;
// decoder
if (m_rowdec_unit_ptr != NULL)
{
e_atomic = m_rowdec_unit_ptr->get_e_chg_addr()*m_rowdec_unit_ptr->get_dec_width()*(is_max_? 1:0.5);
e_atomic += m_rowdec_unit_ptr->get_e_chg_output();
// assume all 1st-level decoders change output
e_atomic += m_rowdec_unit_ptr->get_e_chg_l1()*m_rowdec_unit_ptr->get_num_in_2nd();
e_read += e_atomic;
}
//wordline
e_atomic = m_wl_unit_ptr->get_e_read();
e_read += e_atomic;
//bitline pre
e_atomic = m_bl_pre_unit_ptr->get_e_charge_gate()*m_line_width;
if (m_num_data_end == 2)
{
e_atomic += m_bl_pre_unit_ptr->get_e_charge_drain()*m_line_width;
}
else
{
e_atomic += m_bl_pre_unit_ptr->get_e_charge_drain()*m_line_width*(is_max_? 1:0.5);
}
e_read += e_atomic;
//bitline
if (m_num_data_end == 2)
{
e_atomic = m_bl_unit_ptr->get_e_col_read()*m_line_width;
}
else
{
e_atomic = m_bl_unit_ptr->get_e_col_read()*m_line_width*(is_max_? 1:0.5);
}
e_read += e_atomic;
if (m_num_data_end == 2)
{
e_atomic = m_amp_unit_ptr->get_e_access()*m_line_width;
e_read += e_atomic;
}
if (m_outdrv_unit_ptr != NULL)
{
e_atomic = m_outdrv_unit_ptr->get_e_select();
e_atomic += m_outdrv_unit_ptr->get_e_chg_data()*m_line_width*(is_max_? 1:0.5);
//assume 1 and 0 are uniformly distributed
if ((m_outdrv_unit_ptr->get_e_out_1() >= m_outdrv_unit_ptr->get_e_out_0()) || (!is_max_))
{
e_atomic += m_outdrv_unit_ptr->get_e_out_1()*m_line_width*(is_max_? 1:0.5);
}
if ((m_outdrv_unit_ptr->get_e_out_1() < m_outdrv_unit_ptr->get_e_out_0()) || (!is_max_))
{
e_atomic += m_outdrv_unit_ptr->get_e_out_0()*m_line_width*(is_max_? 1:0.5);
}
e_read += e_atomic;
}
return e_read;
}
double SRAM::calc_e_write(
bool is_max_
) const
{
double e_atomic;
double e_write = 0;
// decoder
if (m_rowdec_unit_ptr != NULL)
{
e_atomic = m_rowdec_unit_ptr->get_e_chg_addr()*m_rowdec_unit_ptr->get_dec_width()*(is_max_? 1:0.5);
e_atomic += m_rowdec_unit_ptr->get_e_chg_output();
// assume all 1st-level decoders change output
e_atomic += m_rowdec_unit_ptr->get_e_chg_l1()*m_rowdec_unit_ptr->get_num_in_2nd();
e_write += e_atomic;
}
//wordline
e_atomic = m_wl_unit_ptr->get_e_write();
e_write += e_atomic;
//bitline
e_atomic = m_bl_unit_ptr->get_e_col_wrtie()*m_line_width*(is_max_? 1:0.5);
e_write += e_atomic;
//mem cell
e_atomic = m_mem_unit_ptr->get_e_switch()*m_line_width*(is_max_? 1:0.5);
e_write += e_atomic;
return e_write;
}
double SRAM::calc_i_static() const
{
double i_static = 0;
i_static += m_bl_unit_ptr->get_i_static()*m_line_width*m_num_write_port;
i_static += m_mem_unit_ptr->get_i_static()*m_num_entry*m_line_width;
i_static += m_bl_pre_unit_ptr->get_i_static()*m_line_width*m_num_read_port;
i_static += m_wl_unit_ptr->get_i_static()*m_num_entry*(m_num_read_port+m_num_write_port);
return i_static;
}
void SRAM::init()
{
// output driver unit
if (m_is_outdrv)
{
m_outdrv_unit_ptr = new OutdrvUnit(m_outdrv_model_str, this, m_tech_param_ptr);
}
else
{
m_outdrv_unit_ptr = NULL;
}
// sense amplifier unit
if (m_num_data_end == 2)
{
m_amp_unit_ptr = new AmpUnit(m_amp_model_str, m_tech_param_ptr);
}
else
{
m_amp_unit_ptr = NULL;
}
// bitline unit
m_bl_unit_ptr = new BitlineUnit(m_bl_model_str, this, m_tech_param_ptr);
// mem unit
m_mem_unit_ptr = new MemUnit(m_mem_model_str, this, m_tech_param_ptr);
// precharge unit
double bl_pre_unit_load = m_bl_unit_ptr->get_pre_unit_load();
m_bl_pre_unit_ptr = new PrechargeUnit(m_bl_pre_model_str, bl_pre_unit_load, this, m_tech_param_ptr);
// wordline unit
m_wl_unit_ptr = new WordlineUnit(m_wl_model_str, this, m_tech_param_ptr);
// decode unit
if (!m_is_fifo)
{
m_rowdec_width = (uint32_t)log2((double)m_num_entry);
m_rowdec_unit_ptr = new DecoderUnit(m_rowdec_model_str, m_rowdec_width, m_tech_param_ptr);
}
else
{
m_rowdec_unit_ptr = NULL;
}
return;
}

120
src/mem/ruby/network/orion/Buffer/SRAM.hh
View file

@ -1,120 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __SRAM_H__
#define __SRAM_H__
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Type.hh"
class OutdrvUnit;
class AmpUnit;
class BitlineUnit;
class MemUnit;
class PrechargeUnit;
class WordlineUnit;
class DecoderUnit;
class SRAM
{
public:
SRAM(
uint32_t num_entry_,
uint32_t line_width_,
bool is_fifo_,
bool is_outdrv_,
uint32_t num_read_port_,
uint32_t num_write_port_,
uint32_t num_data_end_,
const string& rowdec_model_str_,
const string& wl_model_str_,
const string& bl_pre_model_str_,
const string& mem_model_str_,
const string& bl_model_str_,
const string& amp_model_str_,
const string& outdrv_model_str_,
const TechParameter* tech_param_ptr_
);
~SRAM();
public:
uint32_t get_line_width() const { return m_line_width; }
uint32_t get_num_data_end() const { return m_num_data_end; }
uint32_t get_num_read_port() const { return m_num_read_port; }
uint32_t get_num_write_port() const { return m_num_write_port; }
uint32_t get_num_port() const { return (m_num_read_port+m_num_write_port); }
bool get_is_outdrv() const { return m_is_outdrv; }
uint32_t get_num_row() const { return m_num_entry; }
uint32_t get_num_col() const { return m_line_width; }
double calc_e_read(bool is_max_) const;
double calc_e_write(bool is_max_) const;
double calc_i_static() const;
private:
void init();
private:
uint32_t m_num_entry;
uint32_t m_line_width;
bool m_is_fifo;
bool m_is_outdrv;
string m_rowdec_model_str;
string m_wl_model_str;
string m_bl_pre_model_str;
string m_mem_model_str;
string m_bl_model_str;
string m_amp_model_str;
string m_outdrv_model_str;
const TechParameter* m_tech_param_ptr;
OutdrvUnit* m_outdrv_unit_ptr;
AmpUnit* m_amp_unit_ptr;
BitlineUnit* m_bl_unit_ptr;
MemUnit* m_mem_unit_ptr;
PrechargeUnit* m_bl_pre_unit_ptr;
WordlineUnit* m_wl_unit_ptr;
DecoderUnit* m_rowdec_unit_ptr;
uint32_t m_num_read_port;
uint32_t m_num_write_port;
uint32_t m_num_data_end;
uint32_t m_rowdec_width;
};
#endif

151
src/mem/ruby/network/orion/Buffer/WordlineUnit.cc
View file

@ -1,151 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/Buffer/WordlineUnit.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
WordlineUnit::WordlineUnit(
const string& wl_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
)
{
if (wl_model_str_ == string("RW_WORDLINE"))
{
m_wl_model = RW_WORDLINE;
}
else if (wl_model_str_ == string("WO_WORDLINE"))
{
m_wl_model = WO_WORDLINE;
}
else
{
m_wl_model = NO_MODEL;
}
if (m_wl_model != NO_MODEL)
{
m_sram_ptr = sram_ptr_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
WordlineUnit::~WordlineUnit()
{}
void WordlineUnit::init()
{
uint32_t num_port = m_sram_ptr->get_num_port();
uint32_t num_read_port = m_sram_ptr->get_num_read_port();
uint32_t num_col = m_sram_ptr->get_num_col();
uint32_t num_data_end = m_sram_ptr->get_num_data_end();
double RegCellWidth = m_tech_param_ptr->get_RegCellWidth();
double BitlineSpacing = m_tech_param_ptr->get_BitlineSpacing();
if (num_data_end == 2)
{
m_wl_len = num_col*(RegCellWidth + 2*num_port*BitlineSpacing);
}
else
{
m_wl_len = num_col*(RegCellWidth + (2*num_port-num_read_port)*BitlineSpacing);
}
double wl_cmetal;
if (num_port > 1)
{
wl_cmetal = m_tech_param_ptr->get_CC3M3metal();
}
else
{
wl_cmetal = m_tech_param_ptr->get_CM3metal();
}
m_wl_wire_cap = m_wl_len*wl_cmetal;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double Wmemcellw = m_tech_param_ptr->get_Wmemcellw();
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
switch(m_wl_model)
{
case RW_WORDLINE:
m_e_read = calc_wordline_cap(num_col*num_data_end, Wmemcellr) * e_factor;
m_e_write = calc_wordline_cap(num_col*2, Wmemcellw) * e_factor;
m_i_static = (Woutdrivern*NMOS_TAB_0 + Woutdriverp*PMOS_TAB_0);
break;
case WO_WORDLINE:
m_e_read = 0;
m_e_write = calc_wordline_cap(num_col*2, Wmemcellw)*e_factor;
m_i_static = 0;
break;
default:
fatal("Incorrect Wordline model.\n");
}
return;
}
double WordlineUnit::calc_wordline_cap(
uint32_t num_mos_,
double mos_width_
) const
{
double total_cap;
// part 1: line cap, including gate cap of pass tx's and metal cap
double BitWidth = m_tech_param_ptr->get_BitWidth();
total_cap = m_tech_param_ptr->calc_gatecappass(mos_width_, BitWidth/2.0-mos_width_)*num_mos_ + m_wl_wire_cap;
// part 2: input driver
double period = m_tech_param_ptr->get_period();
double psize, nsize;
psize = m_tech_param_ptr->calc_driver_psize(total_cap, period/16.0);
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
nsize = psize*Wdecinvn/Wdecinvp;
// WHS: 20 should go to PARM
total_cap += m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1) + m_tech_param_ptr->calc_gatecap(psize+nsize, 20);
return total_cap;
}

87
src/mem/ruby/network/orion/Buffer/WordlineUnit.hh
View file

@ -1,87 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __WORDLINEUNIT_H__
#define __WORDLINEUNIT_H__
#include "mem/ruby/network/orion/Type.hh"
class SRAM;
class TechParameter;
class WordlineUnit
{
public:
enum WordlineModel
{
NO_MODEL = 0,
RW_WORDLINE,
WO_WORDLINE
};
public:
WordlineUnit(
const string& wl_model_str_,
const SRAM* sram_ptr_,
const TechParameter* tech_param_ptr_
);
~WordlineUnit();
public:
double get_e_read() const { return m_e_read; }
double get_e_write() const { return m_e_write; }
double get_i_static() const { return m_i_static; }
private:
void init();
double calc_wordline_cap(uint32_t num_mos_, double mos_width_) const;
double calc_i_static();
private:
WordlineModel m_wl_model;
const SRAM* m_sram_ptr;
const TechParameter* m_tech_param_ptr;
double m_wl_len;
double m_wl_wire_cap;
double m_e_read;
double m_e_write;
double m_i_static;
};
#endif

176
src/mem/ruby/network/orion/Clock.cc
View file

@ -1,176 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include "mem/ruby/network/orion/Clock.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Wire.hh"
Clock::Clock(
bool is_in_buf_,
bool is_in_shared_switch_,
bool is_out_buf_,
bool is_out_shared_switch_,
const OrionConfig* orion_cfg_ptr_
)
{
m_is_in_buf = is_in_buf_;
m_is_in_shared_switch = is_in_shared_switch_;
m_is_out_buf = is_out_buf_;
m_is_out_shared_switch = is_out_shared_switch_;
m_orion_cfg_ptr = orion_cfg_ptr_;
init();
}
Clock::~Clock()
{}
double Clock::get_dynamic_energy() const
{
return (m_e_pipe_reg + m_e_htree);
}
double Clock::get_static_power() const
{
double vdd = m_tech_param_ptr->get_vdd();
return (m_i_static*vdd);
}
void Clock::init()
{
m_tech_param_ptr = m_orion_cfg_ptr->get_tech_param_ptr();
double e_factor = m_tech_param_ptr->get_EnergyFactor();
// Pipeline registers capacitive load on clock network
uint32_t num_in_port = m_orion_cfg_ptr->get_num_in_port();
uint32_t num_out_port = m_orion_cfg_ptr->get_num_out_port();
uint32_t num_vclass = m_orion_cfg_ptr->get_num_vclass();
uint32_t num_vchannel = m_orion_cfg_ptr->get_num_vchannel();
uint32_t flit_width = m_orion_cfg_ptr->get_flit_width();
uint32_t num_pipe_reg = 0;
// pipeline registers after the link traversal stage
num_pipe_reg += num_in_port*flit_width;
// pipeline registers for input buffer
if (m_is_in_buf)
{
if (m_is_in_shared_switch)
{
num_pipe_reg += num_in_port*flit_width;
}
else
{
num_pipe_reg += num_in_port*num_vclass*num_vchannel*flit_width;
}
}
// pipeline registers for crossbar
if (m_is_out_shared_switch)
{
num_pipe_reg += num_out_port*flit_width;
}
else
{
num_pipe_reg += num_out_port*num_vclass*num_vchannel*flit_width;
}
// pipeline registers for output buffer
if (m_is_out_buf) // assume output buffers share links
{
num_pipe_reg += num_out_port*flit_width;
}
double cap_clock = m_tech_param_ptr->get_ClockCap();
m_e_pipe_reg = num_pipe_reg*cap_clock*e_factor;
//========================H_tree wiring load ========================*/
// The 1e-6 factor is to convert the "router_diagonal" back to meters.
// To be consistent we use micro-meters unit for our inputs, but
// the functions, internally, use meters. */
double i_static_nmos = 0;
double i_static_pmos = 0;
bool is_htree = m_orion_cfg_ptr->get<bool>("IS_HTREE_CLOCK");
if(is_htree)
{
const string& width_spacing_model_str = m_orion_cfg_ptr->get<string>("WIRE_WIDTH_SPACING");
const string& buf_scheme_str = m_orion_cfg_ptr->get<string>("WIRE_BUFFERING_MODEL");
bool is_shielding = m_orion_cfg_ptr->get<bool>("WIRE_IS_SHIELDING");
Wire wire(width_spacing_model_str, buf_scheme_str, is_shielding, m_tech_param_ptr);
double router_diagonal = m_orion_cfg_ptr->get<double>("ROUTER_DIAGONAL");
double Clockwire = m_tech_param_ptr->get_ClockCap();
double htree_clockcap;
int k;
double h;
double BufferNMOSOffCurrent = m_tech_param_ptr->get_BufferNMOSOffCurrent();
double BufferPMOSOffCurrent = m_tech_param_ptr->get_BufferPMOSOffCurrent();
if (m_tech_param_ptr->is_trans_type_hvt() || m_tech_param_ptr->is_trans_type_nvt())
{
htree_clockcap = (4+4+2+2)*(router_diagonal*1e-6)*Clockwire;
wire.calc_opt_buffering(&k, &h, ((4+4+2+2)*router_diagonal*1e-6));
i_static_nmos = BufferNMOSOffCurrent*h*k*15;
i_static_pmos = BufferPMOSOffCurrent*h*k*15;
}
else
{
htree_clockcap = (8+4+4+4+4)*(router_diagonal*1e-6)*Clockwire;
wire.calc_opt_buffering(&k, &h, ((4+4+2+2)*router_diagonal*1e-6));
i_static_nmos = BufferNMOSOffCurrent*h*k*29;
i_static_pmos = BufferPMOSOffCurrent*h*k*15;
}
m_e_htree = (htree_clockcap+cap_clock)*e_factor;
}
else
{
m_e_htree = 0;
}
double SCALE_S = m_tech_param_ptr->get_SCALE_S();
double DFF_TAB_0 = m_tech_param_ptr->get_DFF_TAB(0);
double Wdff = m_tech_param_ptr->get_Wdff();
m_i_static = (((i_static_nmos+i_static_pmos)/2)/SCALE_S + (num_pipe_reg*DFF_TAB_0*Wdff));
}

77
src/mem/ruby/network/orion/Clock.hh
View file

@ -1,77 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __CLOCK_H__
#define __CLOCK_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig;
class Clock
{
public:
Clock(
bool is_in_buf_,
bool is_in_shared_switch_,
bool is_out_buf_,
bool is_out_shared_switch_,
const OrionConfig* orion_cfg_ptr_
);
~Clock();
public:
double get_dynamic_energy() const;
double get_static_power() const;
private:
void init();
double calc_cap_pipe_reg();
private:
bool m_is_in_buf;
bool m_is_in_shared_switch;
bool m_is_out_buf;
bool m_is_out_shared_switch;
const OrionConfig* m_orion_cfg_ptr;
const TechParameter* m_tech_param_ptr;
double m_e_pipe_reg;
double m_e_htree;
double m_i_static;
};
#endif

170
src/mem/ruby/network/orion/ConfigFile.cc
View file

@ -1,170 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
*/
#include "mem/ruby/network/orion/ConfigFile.hh"
using std::string;
ConfigFile::ConfigFile( string filename, string delimiter,
string comment, string sentry )
: myDelimiter(delimiter), myComment(comment), mySentry(sentry)
{
// Construct a ConfigFile, getting keys and values from given file
std::ifstream in( filename.c_str() );
if( !in ) throw file_not_found( filename );
in >> (*this);
}
ConfigFile::ConfigFile()
: myDelimiter( string(1,'=') ), myComment( string(1,'#') )
{
// Construct a ConfigFile without a file; empty
}
void ConfigFile::remove( const string& key )
{
// Remove key and its value
myContents.erase( myContents.find( key ) );
return;
}
bool ConfigFile::keyExists( const string& key ) const
{
// Indicate whether key is found
mapci p = myContents.find( key );
return ( p != myContents.end() );
}
/* static */
void ConfigFile::trim( string& s )
{
// Remove leading and trailing whitespace
static const char whitespace[] = " \n\t\v\r\f";
s.erase( 0, s.find_first_not_of(whitespace) );
s.erase( s.find_last_not_of(whitespace) + 1U );
}
std::ostream& operator<<( std::ostream& os, const ConfigFile& cf )
{
// Save a ConfigFile to os
for( ConfigFile::mapci p = cf.myContents.begin();
p != cf.myContents.end();
++p )
{
os << p->first << " " << cf.myDelimiter << " ";
os << p->second << std::endl;
}
return os;
}
std::istream& operator>>( std::istream& is, ConfigFile& cf )
{
// Load a ConfigFile from is
// Read in keys and values, keeping internal whitespace
typedef string::size_type pos;
const string& delim = cf.myDelimiter; // separator
const string& comm = cf.myComment; // comment
const string& sentry = cf.mySentry; // end of file sentry
const pos skip = delim.length(); // length of separator
string nextline = ""; // might need to read ahead to see where value ends
while( is || nextline.length() > 0 )
{
// Read an entire line at a time
string line;
if( nextline.length() > 0 )
{
line = nextline; // we read ahead; use it now
nextline = "";
}
else
{
std::getline( is, line );
}
// Ignore comments
line = line.substr( 0, line.find(comm) );
// Check for end of file sentry
if( sentry != "" && line.find(sentry) != string::npos ) return is;
// Parse the line if it contains a delimiter
pos delimPos = line.find( delim );
if( delimPos < string::npos )
{
// Extract the key
string key = line.substr( 0, delimPos );
line.replace( 0, delimPos+skip, "" );
// See if value continues on the next line
// Stop at blank line, next line with a key, end of stream,
// or end of file sentry
bool terminate = false;
while( !terminate && is )
{
std::getline( is, nextline );
terminate = true;
string nlcopy = nextline;
ConfigFile::trim(nlcopy);
if( nlcopy == "" ) continue;
nextline = nextline.substr( 0, nextline.find(comm) );
if( nextline.find(delim) != string::npos )
continue;
if( sentry != "" && nextline.find(sentry) != string::npos )
continue;
nlcopy = nextline;
ConfigFile::trim(nlcopy);
if( nlcopy != "" ) line += "\n";
line += nextline;
terminate = false;
}
// Store key and value
ConfigFile::trim(key);
ConfigFile::trim(line);
cf.myContents[key] = line; // overwrites if key is repeated
}
}
return is;
}

252
src/mem/ruby/network/orion/ConfigFile.hh
View file

@ -1,252 +0,0 @@
// Class for reading named values from configuration files
// Richard J. Wagner v2.1 24 May 2004 wagnerr@umich.edu
// Copyright (c) 2004 Richard J. Wagner
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to
// deal in the Software without restriction, including without limitation the
// rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
// sell copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
// IN THE SOFTWARE.
// Typical usage
// -------------
//
// Given a configuration file "settings.inp":
// atoms = 25
// length = 8.0 # nanometers
// name = Reece Surcher
//
// Named values are read in various ways, with or without default values:
// ConfigFile config( "settings.inp" );
// int atoms = config.read<int>( "atoms" );
// double length = config.read( "length", 10.0 );
// string author, title;
// config.readInto( author, "name" );
// config.readInto( title, "title", string("Untitled") );
//
// See file example.cpp for more examples.
#ifndef CONFIGFILE_H
#define CONFIGFILE_H
#include <fstream>
#include <iostream>
#include <map>
#include <sstream>
#include <string>
using std::string;
class ConfigFile {
// Data
protected:
string myDelimiter; // separator between key and value
string myComment; // separator between value and comments
string mySentry; // optional string to signal end of file
std::map<string,string> myContents; // extracted keys and values
typedef std::map<string,string>::iterator mapi;
typedef std::map<string,string>::const_iterator mapci;
// Methods
public:
ConfigFile( string filename,
string delimiter = "=",
string comment = "#",
string sentry = "EndConfigFile" );
ConfigFile();
// Search for key and read value or optional default value
template<class T> T read( const string& key ) const; // call as read<T>
template<class T> T read( const string& key, const T& value ) const;
template<class T> bool readInto( T& var, const string& key ) const;
template<class T>
bool readInto( T& var, const string& key, const T& value ) const;
// Modify keys and values
template<class T> void add( string key, const T& value );
void remove( const string& key );
// Check whether key exists in configuration
bool keyExists( const string& key ) const;
// Check or change configuration syntax
string getDelimiter() const { return myDelimiter; }
string getComment() const { return myComment; }
string getSentry() const { return mySentry; }
string setDelimiter( const string& s )
{ string old = myDelimiter; myDelimiter = s; return old; }
string setComment( const string& s )
{ string old = myComment; myComment = s; return old; }
// Write or read configuration
friend std::ostream& operator<<( std::ostream& os, const ConfigFile& cf );
friend std::istream& operator>>( std::istream& is, ConfigFile& cf );
protected:
template<class T> static string T_as_string( const T& t );
template<class T> static T string_as_T( const string& s );
static void trim( string& s );
// Exception types
public:
struct file_not_found {
string filename;
file_not_found( const string& filename_ = string() )
: filename(filename_) {} };
struct key_not_found { // thrown only by T read(key) variant of read()
string key;
key_not_found( const string& key_ = string() )
: key(key_) {} };
};
/* static */
template<class T>
string ConfigFile::T_as_string( const T& t )
{
// Convert from a T to a string
// Type T must support << operator
std::ostringstream ost;
ost << t;
return ost.str();
}
/* static */
template<class T>
T ConfigFile::string_as_T( const string& s )
{
// Convert from a string to a T
// Type T must support >> operator
T t;
std::istringstream ist(s);
ist >> t;
return t;
}
/* static */
template<>
inline string ConfigFile::string_as_T<string>( const string& s )
{
// Convert from a string to a string
// In other words, do nothing
return s;
}
/* static */
template<>
inline bool ConfigFile::string_as_T<bool>( const string& s )
{
// Convert from a string to a bool
// Interpret "false", "F", "no", "n", "0" as false
// Interpret "true", "T", "yes", "y", "1", "-1", or anything else as true
bool b = true;
string sup = s;
for( string::iterator p = sup.begin(); p != sup.end(); ++p )
*p = toupper(*p); // make string all caps
if( sup==string("FALSE") || sup==string("F") ||
sup==string("NO") || sup==string("N") ||
sup==string("0") || sup==string("NONE") )
b = false;
return b;
}
template<class T>
T ConfigFile::read( const string& key ) const
{
// Read the value corresponding to key
mapci p = myContents.find(key);
if( p == myContents.end() ) throw key_not_found(key);
return string_as_T<T>( p->second );
}
template<class T>
T ConfigFile::read( const string& key, const T& value ) const
{
// Return the value corresponding to key or given default value
// if key is not found
mapci p = myContents.find(key);
if( p == myContents.end() ) return value;
return string_as_T<T>( p->second );
}
template<class T>
bool ConfigFile::readInto( T& var, const string& key ) const
{
// Get the value corresponding to key and store in var
// Return true if key is found
// Otherwise leave var untouched
mapci p = myContents.find(key);
bool found = ( p != myContents.end() );
if( found ) var = string_as_T<T>( p->second );
return found;
}
template<class T>
bool ConfigFile::readInto( T& var, const string& key, const T& value ) const
{
// Get the value corresponding to key and store in var
// Return true if key is found
// Otherwise set var to given default
mapci p = myContents.find(key);
bool found = ( p != myContents.end() );
if( found )
var = string_as_T<T>( p->second );
else
var = value;
return found;
}
template<class T>
void ConfigFile::add( string key, const T& value )
{
// Add a key with given value
string v = T_as_string( value );
trim(key);
trim(v);
myContents[key] = v;
return;
}
#endif // CONFIGFILE_H
// Release notes:
// v1.0 21 May 1999
// + First release
// + Template read() access only through non-member readConfigFile()
// + ConfigurationFileBool is only built-in helper class
//
// v2.0 3 May 2002
// + Shortened name from ConfigurationFile to ConfigFile
// + Implemented template member functions
// + Changed default comment separator from % to #
// + Enabled reading of multiple-line values
//
// v2.1 24 May 2004
// + Made template specializations inline to avoid compiler-dependent linkage
// + Allowed comments within multiple-line values
// + Enabled blank line termination for multiple-line values
// + Added optional sentry to detect end of configuration file
// + Rewrote messy trimWhitespace() function as elegant trim()

393
src/mem/ruby/network/orion/Crossbar/Crossbar.cc
View file

@ -1,393 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
#include "mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh"
#include "mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
Crossbar::Crossbar(
CrossbarModel xbar_model_,
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t num_in_seg_,
uint32_t num_out_seg_,
uint32_t degree_,
const TechParameter* tech_param_ptr_
)
{
m_xbar_model = xbar_model_;
if (m_xbar_model != NO_MODEL)
{
assert((num_in_ == num_in_) && (num_in_ != 0));
assert((num_out_ == num_out_) && (num_out_ != 0));
assert((data_width_ == data_width_) && (data_width_ != 0));
assert(num_in_seg_ == num_in_seg_);
assert(num_out_seg_ == num_out_seg_);
set_conn_type(conn_type_str_);
set_trans_type(trans_type_str_);
m_num_in = num_in_;
m_num_out = num_out_;
m_num_in_seg = num_in_seg_;
m_num_out_seg = num_out_seg_;
m_data_width = data_width_;
m_degree = degree_;
m_tech_param_ptr = tech_param_ptr_;
}
else
{
cerr << "ERROR at " << __FILE__ << " " << __LINE__ << endl;
}
}
Crossbar::~Crossbar()
{}
double Crossbar::get_static_power() const
{
double vdd = m_tech_param_ptr->get_vdd();
double SCALE_S = m_tech_param_ptr->get_SCALE_S();
return (m_i_static*vdd*SCALE_S);
}
void Crossbar::print_all() const
{
cout << "Crossbar" << endl;
cout << "\t" << "Traversal = " << get_dynamic_energy(false) << endl;
cout << "\t" << "Static power = " << get_static_power() << endl;
return;
}
void Crossbar::set_conn_type(const string& conn_type_str_)
{
if (conn_type_str_ == string("TRANS_GATE"))
{
m_conn_type = TRANS_GATE;
}
else if (conn_type_str_ == string("TRISTATE_GATE"))
{
m_conn_type = TRISTATE_GATE;
}
else
{
cerr << "Invalid connect type: '" << conn_type_str_ << "'. Use TRANS_GATE as default." << endl;
m_conn_type = TRANS_GATE;
}
return;
}
void Crossbar::set_trans_type(const string& trans_type_str_)
{
if (trans_type_str_ == string("NP_GATE"))
{
m_trans_type = NP_GATE;
}
else if (trans_type_str_ == string("N_GATE"))
{
m_trans_type = N_GATE;
}
else
{
cerr << "Invalid trans type: '" << trans_type_str_ << "'. Use N_GATE as default." << endl;
m_trans_type = N_GATE;
}
}
double Crossbar::calc_in_cap()
{
double total_cap = 0;
// part 1: wire cap
total_cap += m_cap_in_wire;
double trans_cap = 0;
// part 2: drain cap of transmission gate or gate cap of tri-state gate
if (m_conn_type == TRANS_GATE)
{
//FIXME: resizing strategy
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double nsize = Wmemcellr;
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double psize = nsize*Wdecinvp/Wdecinvn;
trans_cap = m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1);
if (m_trans_type == NP_GATE)
{
trans_cap += m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1);
}
}
else if (m_conn_type == TRISTATE_GATE)
{
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
trans_cap = m_tech_param_ptr->calc_gatecap(Woutdrvnandn+Woutdrvnandp, 0)
+ m_tech_param_ptr->calc_gatecap(Woutdrvnorn+Woutdrvnorp, 0);
}
total_cap += trans_cap*m_num_out;
// segmented crossbar
if (m_num_in_seg > 1)
{
total_cap *= (m_num_in_seg+1)/(m_num_in_seg*2);
// input capacitance of tri-state buffer
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap += (m_num_in_seg+2)*(m_num_in_seg-1)/(m_num_in_seg*2)*(m_tech_param_ptr->calc_gatecap(Woutdrvnandn+Woutdrvnandp, 0)+m_tech_param_ptr->calc_gatecap(Woutdrvnorn+Woutdrvnorp, 0));
// output capacitance of tri-state buffer
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
total_cap += (m_num_in_seg-1)/2*(m_tech_param_ptr->calc_draincap(Woutdrivern, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Woutdriverp, TechParameter::PCH, 1));
}
// part 3: input driver
//FIXME: how to specify timing
double period = m_tech_param_ptr->get_period();
double psize = m_tech_param_ptr->calc_driver_psize(total_cap, period/3.0);
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double nsize = psize*Wdecinvn/Wdecinvp;
total_cap += m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1)+m_tech_param_ptr->calc_gatecap(nsize+psize, 0);
return total_cap/2.0;
}
double Crossbar::calc_out_cap(uint32_t num_in_)
{
double total_cap = 0;
// part 1: wire cap
total_cap += m_cap_out_wire;
double trans_cap = 0;
// part 2: drain cap of transmission gate or tri-state gate
if (m_conn_type == TRANS_GATE)
{
// FIXME: resizing strategy
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double nsize = Wmemcellr;
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double psize = nsize*Wdecinvp/Wdecinvn;
trans_cap = m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1);
if (m_trans_type == NP_GATE)
{
trans_cap += m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1);
}
}
else if (m_conn_type == TRISTATE_GATE)
{
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
trans_cap = m_tech_param_ptr->calc_draincap(Woutdrivern, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Woutdriverp, TechParameter::PCH, 1);
}
total_cap += trans_cap*num_in_;
// segmented crossbar
if (m_num_out_seg > 1)
{
total_cap *= (m_num_out_seg+1)/(m_num_out_seg*2);
// input capacitance of tri-state buffer
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
total_cap += (m_num_out_seg+2)*(m_num_out_seg-1)/(m_num_out_seg*2)*(m_tech_param_ptr->calc_gatecap(Woutdrvnandn+Woutdrvnandp, 0)+m_tech_param_ptr->calc_gatecap(Woutdrvnorn+Woutdrvnorp, 0));
// output capacitance of tri-state buffer
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
total_cap += (m_num_out_seg-1)/2*(m_tech_param_ptr->calc_draincap(Woutdrivern, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Woutdriverp, TechParameter::PCH, 1));
}
// part 3: output driver
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
total_cap += m_tech_param_ptr->calc_draincap(Woutdrivern, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Woutdriverp, TechParameter::PCH, 1)+m_tech_param_ptr->calc_gatecap(Woutdrivern+Woutdriverp, 0);
return total_cap/2.0;
}
double Crossbar::calc_int_cap()
{
double total_cap = 0;
if (m_conn_type == TRANS_GATE)
{
// part 1: drain cap of transmission gate
//FIXME: Wmemcellr and resize
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double nsize = Wmemcellr;
double trans_cap = m_tech_param_ptr->calc_draincap(nsize, TechParameter::NCH, 1);
if (m_trans_type == NP_GATE)
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double psize = nsize*Wdecinvp/Wdecinvn;
trans_cap += m_tech_param_ptr->calc_draincap(psize, TechParameter::PCH, 1);
}
total_cap += trans_cap*(m_degree+1);
}
else if (m_conn_type == TRISTATE_GATE)
{
// part 1: drain cap of tri-state gate
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
double trans_cap = (m_tech_param_ptr->calc_draincap(Woutdrivern, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Woutdriverp, TechParameter::PCH, 1))*m_degree;
// part 2: gate cap of tri-state gate
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
trans_cap += m_tech_param_ptr->calc_gatecap(Woutdrvnandn+Woutdrvnandp, 0)+m_tech_param_ptr->calc_gatecap(Woutdrvnorn+Woutdrvnorp, 0);
total_cap += trans_cap;
}
return total_cap/2.0;
}
double Crossbar::calc_ctr_cap(double cap_wire_, bool prev_ctr_, bool next_ctr_)
{
double total_cap = 0;
// part 1: wire cap
total_cap += cap_wire_;
double trans_cap = 0;
// part 2: gate cap of transmission gate or tri-state gate
if (m_conn_type == TRANS_GATE)
{
//FIXME Wmemcellr and resize
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double nsize = Wmemcellr;
trans_cap = m_tech_param_ptr->calc_gatecap(nsize, 0);
if (m_trans_type == NP_GATE)
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double psize = nsize*Wdecinvp/Wdecinvn;
trans_cap += m_tech_param_ptr->calc_gatecap(psize, 0);
}
}
else if (m_conn_type == TRISTATE_GATE)
{
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
trans_cap = m_tech_param_ptr->calc_gatecap(Woutdrvnandn+Woutdrvnandp, 0)
+ m_tech_param_ptr->calc_gatecap(Woutdrvnorn+Woutdrvnorp, 0);
}
total_cap += trans_cap*m_data_width;
// part 3: inverter
if (!((m_conn_type == TRANS_GATE) && (m_trans_type == N_GATE) && (!prev_ctr_)))
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
total_cap += m_tech_param_ptr->calc_draincap(Wdecinvn, TechParameter::NCH, 1)+m_tech_param_ptr->calc_draincap(Wdecinvp, TechParameter::PCH, 1)
+ m_tech_param_ptr->calc_gatecap(Wdecinvn+Wdecinvp, 0);
}
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
// part 4: drain cap of previous level control signal
if (prev_ctr_)
{
// FIXME: need actual size, use decoder data for now
total_cap += m_degree*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1)
+m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, m_degree);
}
// part 5: gate cap of next level control signal
if (next_ctr_)
{
// FIXME: need actual size, use decoder data for now
total_cap += m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, m_degree*40+20);
}
return total_cap;
}
Crossbar* Crossbar::create_crossbar(
const string& xbar_model_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
const OrionConfig* orion_cfg_ptr_
)
{
if (xbar_model_str_ == string("MATRIX_CROSSBAR"))
{
const string& conn_type_str = orion_cfg_ptr_->get<string>("CROSSBAR_CONNECT_TYPE");
const string& trans_type_str = orion_cfg_ptr_->get<string>("CROSSBAR_TRANS_GATE_TYPE");
uint32_t num_in_seg = orion_cfg_ptr_->get<uint32_t>("CROSSBAR_NUM_IN_SEG");
uint32_t num_out_seg = orion_cfg_ptr_->get<uint32_t>("CROSSBAR_NUM_OUT_SEG");
double len_in_wire = orion_cfg_ptr_->get<double>("CROSSBAR_LEN_IN_WIRE");
double len_out_wire = orion_cfg_ptr_->get<double>("CROSSBAR_LEN_OUT_WIRE");
const TechParameter* tech_param_ptr = orion_cfg_ptr_->get_tech_param_ptr();
return new MatrixCrossbar(conn_type_str, trans_type_str,
num_in_, num_out_, data_width_, num_in_seg, num_out_seg,
len_in_wire, len_out_wire, tech_param_ptr);
}
else if (xbar_model_str_ == string("MULTREE_CROSSBAR"))
{
const string& conn_type_str = orion_cfg_ptr_->get<string>("CROSSBAR_CONNECT_TYPE");
const string& trans_type_str = orion_cfg_ptr_->get<string>("CROSSBAR_TRANS_GATE_TYPE");
uint32_t degree = orion_cfg_ptr_->get<uint32_t>("CROSSBAR_MUX_DEGREE");
const TechParameter* tech_param_ptr = orion_cfg_ptr_->get_tech_param_ptr();
return new MultreeCrossbar(conn_type_str, trans_type_str,
num_in_, num_out_, data_width_, degree, tech_param_ptr);
}
else
{
cerr << "WARNING: No Crossbar model" << endl;
return (Crossbar*)NULL;
}
}

130
src/mem/ruby/network/orion/Crossbar/Crossbar.hh
View file

@ -1,130 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __CROSSBAR_H__
#define __CROSSBAR_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig;
class Crossbar
{
public:
enum CrossbarModel
{
NO_MODEL = 0,
MATRIX_CROSSBAR,
MULTREE_CROSSBAR
};
enum ConnectType
{
TRANS_GATE,
TRISTATE_GATE
};
enum TransType
{
N_GATE,
NP_GATE
};
public:
Crossbar(
CrossbarModel xbar_model_,
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t num_in_seg_,
uint32_t num_out_seg_,
uint32_t degree_,
const TechParameter* tech_param_ptr_
);
virtual ~Crossbar() = 0;
public:
double get_len_req_wire() const { return m_len_req_wire; }
virtual double get_dynamic_energy(bool is_max_) const = 0;
double get_static_power() const;
void print_all() const;
protected:
void set_conn_type(const string& conn_type_str_);
void set_trans_type(const string& trans_type_str_);
double calc_in_cap();
double calc_out_cap(uint32_t num_in_);
double calc_int_cap();
double calc_ctr_cap(double cap_wire_, bool prev_ctr_, bool next_ctr_);
virtual double calc_i_static() = 0;
protected:
CrossbarModel m_xbar_model;
ConnectType m_conn_type;
TransType m_trans_type;
uint32_t m_num_in;
uint32_t m_num_out;
uint32_t m_data_width;
uint32_t m_num_in_seg;
uint32_t m_num_out_seg;
uint32_t m_degree;
const TechParameter* m_tech_param_ptr;
double m_cap_in_wire;
double m_cap_out_wire;
double m_cap_ctr_wire;
double m_len_req_wire;
double m_e_chg_in;
double m_e_chg_out;
double m_e_chg_ctr;
double m_e_chg_int;
double m_i_static;
public:
static Crossbar* create_crossbar(
const string& xbar_model_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
const OrionConfig* orion_cfg_ptr_
);
};
#endif

152
src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.cc
View file

@ -1,152 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
MatrixCrossbar::MatrixCrossbar(
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t num_in_seg_,
uint32_t num_out_seg_,
double len_in_wire_,
double len_out_wire_,
const TechParameter* tech_param_ptr_
) : Crossbar(
MATRIX_CROSSBAR, conn_type_str_, trans_type_str_,
num_in_, num_out_, data_width_, num_in_seg_, num_out_seg_,
0, tech_param_ptr_)
{
assert(len_in_wire_ == len_in_wire_);
assert(len_out_wire_ == len_out_wire_);
m_len_in_wire = len_in_wire_;
m_len_out_wire = len_out_wire_;
init();
}
MatrixCrossbar::~MatrixCrossbar()
{}
double MatrixCrossbar::get_dynamic_energy(bool is_max_) const
{
double e_atomic;
double e_access = 0;
e_atomic = m_e_chg_in*m_data_width*(is_max_? 1:0.5);
e_access += e_atomic;
e_atomic = m_e_chg_out*m_data_width*(is_max_? 1:0.5);
e_access += e_atomic;
e_atomic = m_e_chg_ctr;
e_access += e_atomic;
return e_access;
}
void MatrixCrossbar::init()
{
// FIXME: need accurate spacing
double CrsbarCellWidth = m_tech_param_ptr->get_CrsbarCellWidth();
double CrsbarCellHeight = m_tech_param_ptr->get_CrsbarCellHeight();
double len_in = m_num_out*m_data_width*CrsbarCellWidth;
double len_out = m_num_in*m_data_width*CrsbarCellHeight;
if(len_in > m_len_in_wire) m_len_in_wire = len_in;
if(len_out > m_len_out_wire) m_len_out_wire = len_out;
double CC3metal = m_tech_param_ptr->get_CC3metal();
m_cap_in_wire = CC3metal*m_len_in_wire;
m_cap_out_wire = CC3metal*m_len_out_wire;
double Cmetal = m_tech_param_ptr->get_Cmetal();
m_cap_ctr_wire = Cmetal*m_len_in_wire/2.0;
m_len_req_wire = m_len_in_wire;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_chg_in = calc_in_cap()*e_factor;
m_e_chg_out = calc_out_cap(m_num_out)*e_factor;
//FIXME: wire length estimation, really reset?
//control signal should reset after transmission is done, so no 1/2
m_e_chg_ctr = calc_ctr_cap(m_cap_ctr_wire, 0, 0)*e_factor;
m_e_chg_int = 0;
m_i_static = calc_i_static();
return;
}
double MatrixCrossbar::calc_i_static()
{
double Woutdrvnandn = m_tech_param_ptr->get_Woutdrvnandn();
double Woutdrvnandp = m_tech_param_ptr->get_Woutdrvnandp();
double Woutdrvnorn = m_tech_param_ptr->get_Woutdrvnorn();
double Woutdrvnorp = m_tech_param_ptr->get_Woutdrvnorp();
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
double NAND2_TAB_0 = m_tech_param_ptr->get_NAND2_TAB(0);
double NAND2_TAB_1 = m_tech_param_ptr->get_NAND2_TAB(1);
double NAND2_TAB_2 = m_tech_param_ptr->get_NAND2_TAB(2);
double NAND2_TAB_3 = m_tech_param_ptr->get_NAND2_TAB(3);
double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
double i_static = 0;
// tri-state buffers
i_static += ((Woutdrvnandp*(NAND2_TAB_0+NAND2_TAB_1+NAND2_TAB_2)+Woutdrvnandn*NAND2_TAB_3)/4
+ (Woutdrvnorp*NOR2_TAB_0+Woutdrvnorn*(NOR2_TAB_1+NOR2_TAB_2+NOR2_TAB_3))/4
+ Woutdrivern*NMOS_TAB_0+Woutdriverp*PMOS_TAB_0)*m_num_in*m_num_out*m_data_width;
// input driver
i_static += (Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0)*m_num_in*m_data_width;
// output driver
i_static += (Woutdrivern*NMOS_TAB_0+Woutdriverp*PMOS_TAB_0)*m_num_out*m_data_width;
// control siganl inverter
i_static += (Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0)*m_num_in*m_num_out;
return i_static;
}

73
src/mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh
View file

@ -1,73 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __MATRIXCROSSBAR_H__
#define __MATRIXCROSSBAR_H__
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class MatrixCrossbar : public Crossbar
{
public:
MatrixCrossbar(
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t num_in_seg_,
uint32_t num_out_seg_,
double len_in_wire_,
double len_out_wire_,
const TechParameter* tech_param_ptr_
);
~MatrixCrossbar();
public:
double get_dynamic_energy(bool is_max_) const;
private:
void init();
double calc_i_static();
private:
double m_len_in_wire;
double m_len_out_wire;
};
#endif

162
src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.cc
View file

@ -1,162 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cmath>
#include <iostream>
#include "mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
MultreeCrossbar::MultreeCrossbar(
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t degree_,
const TechParameter *tech_param_ptr_
) : Crossbar(
MULTREE_CROSSBAR, conn_type_str_, trans_type_str_,
num_in_, num_out_, data_width_, 0, 0, degree_, tech_param_ptr_)
{
m_len_req_wire = 0;
init();
}
MultreeCrossbar::~MultreeCrossbar()
{}
double MultreeCrossbar::get_dynamic_energy(bool is_max_) const
{
double e_atomic;
double e_access = 0;
e_atomic = m_e_chg_in*m_data_width*(is_max_? 1:0.5);
e_access += e_atomic;
e_atomic = m_e_chg_out*m_data_width*(is_max_? 1:0.5);
e_access += e_atomic;
e_atomic = m_e_chg_ctr;
e_access += e_atomic;
if (m_depth > 1)
{
e_atomic = m_e_chg_int*m_data_width*(m_depth-1)*(is_max_? 1:0.5);
e_access += e_atomic;
}
return e_access;
}
void MultreeCrossbar::init()
{
double CrsbarCellWidth = m_tech_param_ptr->get_CrsbarCellWidth();
double CCmetal = m_tech_param_ptr->get_CCmetal();
double Lamda = m_tech_param_ptr->get_Lamda();
double CC3metal = m_tech_param_ptr->get_CC3metal();
double len_in_wire;
// input wire horizontal segment length
len_in_wire = m_num_in*m_data_width*CrsbarCellWidth*(m_num_out/2);
m_cap_in_wire = len_in_wire*CCmetal;
// input wire vertical segment length
len_in_wire = m_num_in*m_data_width*(5*Lamda)*(m_num_out/2);
m_cap_in_wire += len_in_wire*CC3metal;
m_cap_out_wire = 0;
double Cmetal = m_tech_param_ptr->get_Cmetal();
double len_ctr_wire = m_num_in*m_data_width*CrsbarCellWidth*(m_num_out/2)/2;
m_cap_ctr_wire = Cmetal*len_ctr_wire;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
m_e_chg_in = calc_in_cap()*e_factor;
m_e_chg_out = calc_out_cap(m_degree)*e_factor;
m_e_chg_int = calc_int_cap()*e_factor;
m_depth = (uint32_t)ceil(log((double)m_num_in)/log((double)m_degree));
// control signal should reset after transmission is done
if (m_depth == 1)
{
// only one level of control sigal
m_e_chg_ctr = calc_ctr_cap(m_cap_ctr_wire, 0, 0)*e_factor;
}
else
{
// first level and last level control signals
m_e_chg_ctr = calc_ctr_cap(m_cap_ctr_wire, 0, 1)*e_factor + calc_ctr_cap(0, 1, 0)*e_factor;
// intermediate control signals
if (m_depth > 2)
{
m_e_chg_ctr += (m_depth-2)*calc_ctr_cap(0, 1, 1)*e_factor;
}
}
m_i_static = calc_i_static();
}
double MultreeCrossbar::calc_i_static()
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
double Wdecinvp = m_tech_param_ptr->get_Wdecinvp();
double Woutdrivern = m_tech_param_ptr->get_Woutdrivern();
double Woutdriverp = m_tech_param_ptr->get_Woutdriverp();
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
double NMOS_TAB_0 = m_tech_param_ptr->get_NMOS_TAB(0);
double PMOS_TAB_0 = m_tech_param_ptr->get_PMOS_TAB(0);
double i_static = 0;
// input driver
i_static += (Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0)*m_num_in*m_data_width;
// output driver
i_static += (Woutdrivern*NMOS_TAB_0+Woutdriverp*PMOS_TAB_0)*m_num_out*m_data_width;
// mux
i_static += (WdecNORp*NOR2_TAB_0+WdecNORn*(NOR2_TAB_1+NOR2_TAB_2+NOR2_TAB_3))/4*(2*m_num_in-1)*m_num_out*m_data_width;
// control signal inverter
i_static += (Wdecinvn*NMOS_TAB_0+Wdecinvp*PMOS_TAB_0)*m_num_in*m_num_out;
return i_static;
}

69
src/mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh
View file

@ -1,69 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __MULTREECROSSBAR_H__
#define __MULTREECROSSBAR_H__
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class MultreeCrossbar : public Crossbar
{
public:
MultreeCrossbar(
const string& conn_type_str_,
const string& trans_type_str_,
uint32_t num_in_,
uint32_t num_out_,
uint32_t data_width_,
uint32_t degree_,
const TechParameter* tech_param_ptr_
);
~MultreeCrossbar();
public:
double get_dynamic_energy(bool is_max_) const;
private:
void init();
double calc_i_static();
private:
uint32_t m_depth;
};
#endif

36
src/mem/ruby/network/orion/Crossbar/SConscript
View file

@ -1,36 +0,0 @@
# Copyright (c) 2010 Massachusetts Institute of Technology
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Tushar Krishna
Import('*')
if env['PROTOCOL'] == 'None':
Return()
Source('Crossbar.cc')
Source('MatrixCrossbar.cc')
Source('MultreeCrossbar.cc')

138
src/mem/ruby/network/orion/FlipFlop.cc
View file

@ -1,138 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/FlipFlop.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
FlipFlop::FlipFlop(
const string& ff_model_str_,
double load_,
const TechParameter* tech_param_ptr_
)
{
if (ff_model_str_ == string("NEG_DFF"))
{
m_ff_model = NEG_DFF;
}
else
{
m_ff_model = NO_MODEL;
}
if (m_ff_model != NO_MODEL)
{
assert(load_ == load_);
m_load = load_;
m_tech_param_ptr = tech_param_ptr_;
init();
}
}
FlipFlop::~FlipFlop()
{}
void FlipFlop::init()
{
double c1, c2, c3, c4, c5, c6;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
switch(m_ff_model)
{
case NEG_DFF:
c1 = c5 = c6 = calc_node_cap(2, 1);
c2 = calc_node_cap(2, 3);
c3 = calc_node_cap(3, 2);
c4 = calc_node_cap(2, 3);
m_e_switch = (c1+c2+c3+c4+c5+c6+m_load)*e_factor/2.0;
// no 1/2 for e_keep and e_clock because clock signal switches twice in one cycle
m_e_keep_1 = c3*e_factor;
m_e_keep_0 = c2*e_factor;
m_e_clock = calc_clock_cap()*e_factor;
m_i_static = calc_i_static();
break;
default:
cerr << "error" << endl;
}
return;
}
//this model is based on the gate-level design given by Randy H. Katz "Contemporary Logic Design"
//Figure 6.24, node numbers (1-6) are assigned to all gate outputs, left to right, top to bottom
//
//We should have pure cap functions and leave the decision of whether or not to have coefficient
//1/2 in init function.
double FlipFlop::calc_node_cap(uint32_t num_fanin_, uint32_t num_fanout_)
{
double total_cap = 0;
//FIXME: all need actual size
//part 1: drain cap of NOR gate
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
total_cap += num_fanin_*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, num_fanin_);
//part 2: gate cap of NOR gate
total_cap += num_fanout_*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
return total_cap;
}
double FlipFlop::calc_clock_cap()
{
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
return (2*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0));
}
double FlipFlop::calc_i_static()
{
double WdecNORn = m_tech_param_ptr->get_WdecNORn();
double WdecNORp = m_tech_param_ptr->get_WdecNORp();
double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
return (WdecNORp*NOR2_TAB_0 + WdecNORn*(NOR2_TAB_1+NOR2_TAB_2+NOR2_TAB_3))/4*6;
}

87
src/mem/ruby/network/orion/FlipFlop.hh
View file

@ -1,87 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __FLIPFLOP_H__
#define __FLIPFLOP_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class FlipFlop
{
public:
enum FFModel
{
NO_MODEL = 0,
NEG_DFF
};
public:
FlipFlop(
const string& ff_model_str_,
double load_,
const TechParameter* tech_param_ptr_
);
~FlipFlop();
public:
double get_e_switch() const { return m_e_switch; }
double get_e_keep_1() const { return m_e_keep_1; }
double get_e_keep_0() const { return m_e_keep_0; }
double get_e_clock() const { return m_e_clock; }
double get_i_static() const { return m_i_static; }
private:
void init();
double calc_node_cap(uint32_t num_fanin_, uint32_t num_fanout_);
double calc_clock_cap();
double calc_i_static();
private:
FFModel m_ff_model;
const TechParameter* m_tech_param_ptr;
double m_load;
double m_e_switch;
double m_e_keep_1;
double m_e_keep_0;
double m_e_clock;
double m_i_static;
};
#endif

251
src/mem/ruby/network/orion/NetworkPower.cc
View file

@ -1,251 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
* Tushar Krishna
*/
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/OrionLink.hh"
#include "mem/ruby/network/orion/OrionRouter.hh"
void
Router_d::calculate_power()
{
//Network Activities from garnet
calculate_performance_numbers();
double sim_cycles = curCycle() - g_ruby_start;
// Number of virtual networks/message classes declared in Ruby
// maybe greater than active virtual networks.
// Estimate active virtual networks for correct power estimates
int num_active_vclass = 0;
std::vector<bool > active_vclass_ary;
active_vclass_ary.resize(m_virtual_networks);
std::vector<double > vc_local_arbit_count_active;
std::vector<double > vc_global_arbit_count_active;
std::vector<double > buf_read_count_active;
std::vector<double > buf_write_count_active;
for (int i =0; i < m_virtual_networks; i++) {
active_vclass_ary[i] = (get_net_ptr())->validVirtualNetwork(i);
if (active_vclass_ary[i]) {
num_active_vclass++;
vc_local_arbit_count_active.push_back(vc_local_arbit_count[i]);
vc_global_arbit_count_active.push_back(vc_global_arbit_count[i]);
buf_read_count_active.push_back(buf_read_count[i]);
buf_write_count_active.push_back(buf_write_count[i]);
}
else {
// Inactive vclass
assert(vc_global_arbit_count[i] == 0);
assert(vc_local_arbit_count[i] == 0);
}
}
// Orion Initialization
OrionConfig* orion_cfg_ptr;
OrionRouter* orion_rtr_ptr;
static double freq_Hz;
const string cfg_fn = "src/mem/ruby/network/orion/router.cfg";
orion_cfg_ptr = new OrionConfig(cfg_fn);
freq_Hz = orion_cfg_ptr->get<double>("FREQUENCY");
uint32_t num_in_port = m_input_unit.size();
uint32_t num_out_port = m_output_unit.size();
uint32_t num_vclass = num_active_vclass;
std::vector<uint32_t > vclass_type_ary;
for (int i = 0; i < m_virtual_networks; i++) {
if (active_vclass_ary[i]) {
int temp_vc = i*m_vc_per_vnet;
vclass_type_ary.push_back((uint32_t)
m_network_ptr->get_vnet_type(temp_vc));
}
}
assert(vclass_type_ary.size() == num_active_vclass);
uint32_t num_vc_per_vclass = m_vc_per_vnet;
uint32_t in_buf_per_data_vc = m_network_ptr->getBuffersPerDataVC();
uint32_t in_buf_per_ctrl_vc = m_network_ptr->getBuffersPerCtrlVC();
//flit width in bits
uint32_t flit_width_bits = m_network_ptr->getNiFlitSize() * 8;
orion_rtr_ptr = new OrionRouter(
num_in_port,
num_out_port,
num_vclass,
vclass_type_ary,
num_vc_per_vclass,
in_buf_per_data_vc,
in_buf_per_ctrl_vc,
flit_width_bits,
orion_cfg_ptr
);
//Power Calculation
double Pbuf_wr_dyn = 0.0;
double Pbuf_rd_dyn = 0.0;
double Pvc_arb_local_dyn = 0.0;
double Pvc_arb_global_dyn = 0.0;
double Psw_arb_local_dyn = 0.0;
double Psw_arb_global_dyn = 0.0;
double Pxbar_dyn = 0.0;
double Pbuf_sta = 0.0;
double Pvc_arb_sta = 0.0;
double Psw_arb_sta = 0.0;
double Pxbar_sta = 0.0;
//Dynamic Power
// Note: For each active arbiter in vc_arb or sw_arb of size T:1,
// assuming half the requests (T/2) are high on average.
// TODO: estimate expected value of requests from simulation.
for (int i = 0; i < num_vclass; i++) {
// Buffer Write
Pbuf_wr_dyn +=
orion_rtr_ptr->calc_dynamic_energy_buf(i, WRITE_MODE, false)*
(buf_write_count_active[i]/sim_cycles)*freq_Hz;
// Buffer Read
Pbuf_rd_dyn +=
orion_rtr_ptr->calc_dynamic_energy_buf(i, READ_MODE, false)*
(buf_read_count_active[i]/sim_cycles)*freq_Hz;
// VC arbitration local
// Each input VC arbitrates for one output VC (in its vclass)
// at its output port.
// Arbiter size: num_vc_per_vclass:1
Pvc_arb_local_dyn +=
orion_rtr_ptr->calc_dynamic_energy_local_vc_arb(i,
num_vc_per_vclass/2, false)*
(vc_local_arbit_count_active[i]/sim_cycles)*
freq_Hz;
// VC arbitration global
// Each output VC chooses one input VC out of all possible requesting
// VCs (within vclass) at all input ports
// Arbiter size: num_in_port*num_vc_per_vclass:1
// Round-robin at each input VC for outvcs in the local stage will
// try to keep outvc conflicts to the minimum.
// Assuming conflicts due to request for same outvc from
// num_in_port/2 requests.
// TODO: use garnet to estimate this
Pvc_arb_global_dyn +=
orion_rtr_ptr->calc_dynamic_energy_global_vc_arb(i,
num_in_port/2, false)*
(vc_global_arbit_count_active[i]/sim_cycles)*
freq_Hz;
}
// Switch Allocation Local
// Each input port chooses one input VC as requestor
// Arbiter size: num_vclass*num_vc_per_vclass:1
Psw_arb_local_dyn =
orion_rtr_ptr->calc_dynamic_energy_local_sw_arb(
num_vclass*num_vc_per_vclass/2, false)*
(sw_local_arbit_count/sim_cycles)*
freq_Hz;
// Switch Allocation Global
// Each output port chooses one input port as winner
// Arbiter size: num_in_port:1
Psw_arb_global_dyn =
orion_rtr_ptr->calc_dynamic_energy_global_sw_arb(
num_in_port/2, false)*
(sw_global_arbit_count/sim_cycles)*
freq_Hz;
// Crossbar
Pxbar_dyn =
orion_rtr_ptr->calc_dynamic_energy_xbar(false)*
(crossbar_count/sim_cycles)*freq_Hz;
// Total
m_power_dyn = Pbuf_wr_dyn + Pbuf_rd_dyn +
Pvc_arb_local_dyn + Pvc_arb_global_dyn +
Psw_arb_local_dyn + Psw_arb_global_dyn +
Pxbar_dyn;
// Clock Power
m_clk_power = orion_rtr_ptr->calc_dynamic_energy_clock()*freq_Hz;
// Static Power
Pbuf_sta = orion_rtr_ptr->get_static_power_buf();
Pvc_arb_sta = orion_rtr_ptr->get_static_power_va();
Psw_arb_sta = orion_rtr_ptr->get_static_power_sa();
Pxbar_sta = orion_rtr_ptr->get_static_power_xbar();
m_power_sta = Pbuf_sta + Pvc_arb_sta + Psw_arb_sta + Pxbar_sta;
}
void
NetworkLink_d::calculate_power(double sim_cycles)
{
OrionConfig* orion_cfg_ptr;
OrionLink* orion_link_ptr;
static double freq_Hz;
double link_length;
// Initialization
const string cfg_fn = "src/mem/ruby/network/orion/router.cfg";
orion_cfg_ptr = new OrionConfig(cfg_fn);
freq_Hz = orion_cfg_ptr->get<double>("FREQUENCY");
link_length = orion_cfg_ptr->get<double>("LINK_LENGTH");
int channel_width_bits = channel_width*8;
orion_link_ptr = new OrionLink(
link_length,
channel_width_bits,
orion_cfg_ptr);
// Dynamic Power
// Assume half the bits flipped on every link activity
double link_dynamic_energy =
orion_link_ptr->calc_dynamic_energy(channel_width_bits/2);
m_power_dyn = link_dynamic_energy * (m_link_utilized / sim_cycles) *
freq_Hz;
// Static Power
// Calculates number of repeaters needed in link, and their static power
// For short links, like 1mm, no repeaters are needed so static power is 0
m_power_sta = orion_link_ptr->get_static_power();
delete orion_link_ptr;
delete orion_cfg_ptr;
}

47
src/mem/ruby/network/orion/NetworkPower.hh
View file

@ -1,47 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
* Tushar Krishna
*/
#ifndef POWER_TRACE_H
#define POWER_TRACE_H
#include <cassert>
#include <cstdio>
#include <cstdlib>
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
//int RW :
#define READ_MODE 0
#define WRITE_MODE 1
#endif

201
src/mem/ruby/network/orion/OrionConfig.cc
View file

@ -1,201 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
*/
#include <iostream>
#include <string>
#include "mem/ruby/network/orion/ConfigFile.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
string OrionConfig::ms_param_name[] = {
"TECH_NODE",
"TRANSISTOR_TYPE",
"VDD",
"FREQUENCY",
"NUM_INPUT_PORT",
"NUM_OUTPUT_PORT",
"FLIT_WIDTH",
"NUM_VIRTUAL_CLASS",
"NUM_VIRTUAL_CHANNEL",
"IS_IN_SHARED_BUFFER",
"IS_OUT_SHARED_BUFFER",
"IS_IN_SHARED_SWITCH",
"IS_OUT_SHARED_SWITCH",
"IS_INPUT_BUFFER",
"IN_BUF_MODEL",
"IN_BUF_NUM_SET",
"IN_BUF_NUM_READ_PORT",
"IS_OUTPUT_BUFFER",
"OUT_BUF_MODEL",
"OUT_BUF_NUM_SET",
"OUT_BUF_NUM_WRITE_PORT",
"SRAM_NUM_DATA_END",
"SRAM_ROWDEC_MODEL",
"SRAM_ROWDEC_PRE_MODEL",
"SRAM_WORDLINE_MODEL",
"SRAM_BITLINE_PRE_MODEL",
"SRAM_BITLINE_MODEL",
"SRAM_AMP_MODEL",
"SRAM_OUTDRV_MODEL",
"CROSSBAR_MODEL",
"CROSSBAR_CONNECT_TYPE",
"CROSSBAR_TRANS_GATE_TYPE",
"CROSSBAR_MUX_DEGREE",
"CROSSBAR_NUM_IN_SEG",
"CROSSBAR_NUM_OUT_SEG",
"CROSSBAR_LEN_IN_WIRE",
"CROSSBAR_LEN_OUT_WIRE",
"VA_MODEL",
"VA_IN_ARB_MODEL",
"VA_IN_ARB_FF_MODEL",
"VA_OUT_ARB_MODEL",
"VA_OUT_ARB_FF_MODEL",
"VA_BUF_MODEL",
"SA_IN_ARB_MODEL",
"SA_IN_ARB_FF_MODEL",
"SA_OUT_ARB_MODEL",
"SA_OUT_ARB_FF_MODEL",
"LINK_LENGTH",
"WIRE_LAYER_TYPE",
"WIRE_WIDTH_SPACING",
"WIRE_BUFFERING_MODEL",
"WIRE_IS_SHIELDING",
"IS_HTREE_CLOCK",
"ROUTER_DIAGONAL"
};
OrionConfig::OrionConfig(const string& cfg_fn_)
{
uint32_t num_param = sizeof(ms_param_name)/sizeof(string);
for(uint32_t i = 0; i < num_param; i++)
{
m_params_map[ms_param_name[i]] = "NOT_SET";
}
read_file(cfg_fn_);
m_tech_param_ptr = new TechParameter(this);
}
OrionConfig::OrionConfig(const OrionConfig& orion_cfg_)
{
m_params_map = orion_cfg_.m_params_map;
m_num_in_port = orion_cfg_.m_num_in_port;
m_num_out_port = orion_cfg_.m_num_out_port;
m_num_vclass = orion_cfg_.m_num_vclass;
m_num_vchannel = orion_cfg_.m_num_vchannel;
m_in_buf_num_set = orion_cfg_.m_in_buf_num_set;
m_flit_width = orion_cfg_.m_flit_width;
m_tech_param_ptr = new TechParameter(this);
}
OrionConfig::~OrionConfig()
{
delete m_tech_param_ptr;
}
void OrionConfig::set_num_in_port(uint32_t num_in_port_)
{
m_params_map[string("NUM_INPUT_PORT")] = T_as_string<uint32_t>(num_in_port_);
m_num_in_port = num_in_port_;
return;
}
void OrionConfig::set_num_out_port(uint32_t num_out_port_)
{
m_params_map[string("NUM_OUTPUT_PORT")] = T_as_string<uint32_t>(num_out_port_);
m_num_out_port = num_out_port_;
return;
}
void OrionConfig::set_num_vclass(uint32_t num_vclass_)
{
m_params_map[string("NUM_VIRTUAL_CLASS")] = T_as_string<uint32_t>(num_vclass_);
m_num_vclass = num_vclass_;
return;
}
void OrionConfig::set_num_vchannel(uint32_t num_vchannel_)
{
m_params_map[string("NUM_VIRTUAL_CHANNEL")] = T_as_string<uint32_t>(num_vchannel_);
m_num_vchannel = num_vchannel_;
return;
}
void OrionConfig::set_in_buf_num_set(uint32_t in_buf_num_set_)
{
m_params_map[string("IN_BUF_NUM_SET")] = T_as_string<uint32_t>(in_buf_num_set_);
m_in_buf_num_set = in_buf_num_set_;
return;
}
void OrionConfig::set_flit_width(uint32_t flit_width_)
{
m_params_map[string("FLIT_WIDTH")] = T_as_string<uint32_t>(flit_width_);
m_flit_width = flit_width_;
return;
}
void OrionConfig::read_file(
const string& filename_
)
{
ConfigFile cfg_file(filename_);
uint32_t num_param = sizeof(ms_param_name)/sizeof(string);
for(uint32_t i = 0; i < num_param; i++)
{
cfg_file.readInto(m_params_map[ms_param_name[i]], ms_param_name[i]);
}
m_num_in_port = get<uint32_t>("NUM_INPUT_PORT");
m_num_out_port = get<uint32_t>("NUM_OUTPUT_PORT");
m_num_vclass = get<uint32_t>("NUM_VIRTUAL_CLASS");
m_num_vchannel = get<uint32_t>("NUM_VIRTUAL_CHANNEL");
m_in_buf_num_set = get<uint32_t>("IN_BUF_NUM_SET");
m_flit_width = get<uint32_t>("FLIT_WIDTH");
return;
}
void OrionConfig::print_config(ostream& out_)
{
uint32_t num_param = sizeof(ms_param_name)/sizeof(string);
for(uint32_t i = 0; i < num_param; i++)
{
out_ << ms_param_name[i] << " = " << m_params_map[ms_param_name[i]] << endl;
}
return;
}

157
src/mem/ruby/network/orion/OrionConfig.hh
View file

@ -1,157 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
*/
#ifndef __ORIONCONFIG_H__
#define __ORIONCONFIG_H__
#include <iostream>
#include <map>
#include <sstream>
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig
{
public:
OrionConfig(const string& cfg_fn_);
OrionConfig(const OrionConfig& orion_cfg_);
~OrionConfig();
public:
void set_num_in_port(uint32_t num_in_port_);
void set_num_out_port(uint32_t num_out_port_);
void set_num_vclass(uint32_t num_vclass_);
void set_num_vchannel(uint32_t num_vchannel_);
void set_in_buf_num_set(uint32_t in_buf_num_set_);
void set_flit_width(uint32_t flit_width_);
void read_file(const std::string& filename_);
void print_config(std::ostream& out_);
public:
template<class T>
T get(const std::string& key_) const;
const TechParameter* get_tech_param_ptr() const { return m_tech_param_ptr; }
uint32_t get_num_in_port() const { return m_num_in_port; }
uint32_t get_num_out_port() const { return m_num_out_port; }
uint32_t get_num_vclass() const { return m_num_vclass; }
uint32_t get_num_vchannel() const { return m_num_vchannel; }
uint32_t get_in_buf_num_set() const { return m_in_buf_num_set; }
uint32_t get_flit_width() const { return m_flit_width; }
private:
std::map<std::string, std::string> m_params_map;
TechParameter* m_tech_param_ptr;
uint32_t m_num_in_port;
uint32_t m_num_out_port;
uint32_t m_num_vclass;
uint32_t m_num_vchannel;
uint32_t m_in_buf_num_set;
uint32_t m_flit_width;
protected:
struct key_not_found
{
std::string m_key;
key_not_found(const std::string& key_ = string()) : m_key(key_)
{}
};
template<class T>
static T string_as_T(const std::string& str_);
template<class T>
static std::string T_as_string(const T& t_);
private:
static std::string ms_param_name[];
};
template<class T>
T OrionConfig::get(const string& key_) const
{
std::map<std::string, std::string>::const_iterator it;
it = m_params_map.find(key_);
if (it == m_params_map.end())
{
std::cerr << key_ << " NOT FOUND!" << std::endl;
throw key_not_found(key_);
}
return string_as_T<T>(it->second);
}
template<class T>
T OrionConfig::string_as_T(const string& str_)
{
T ret;
std::istringstream ist(str_);
ist >> ret;
return ret;
}
template<>
inline string OrionConfig::string_as_T<string>(const string& str_)
{
return str_;
}
template<>
inline bool OrionConfig::string_as_T<bool>(const string& str_)
{
bool ret;
if (str_ == string("TRUE"))
{
ret = true;
}
else if (str_ == string("FALSE"))
{
ret = false;
}
else
{
std::cerr << "Invalid bool value: '" << str_ <<
"'. Treated as FALSE." << std::endl;
ret = false;
}
return ret;
}
template<class T>
string OrionConfig::T_as_string(const T& t)
{
std::ostringstream ost;
ost << t;
return ost.str();
}
#endif

98
src/mem/ruby/network/orion/OrionLink.cc
View file

@ -1,98 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include <iostream>
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/OrionLink.hh"
#include "mem/ruby/network/orion/Wire.hh"
using namespace std;
OrionLink::OrionLink(
double len_,
uint32_t line_width_,
const OrionConfig* orion_cfg_ptr_
)
{
assert(len_ == len_);
assert(line_width_ == line_width_);
m_len = len_;
m_line_width = line_width_;
m_orion_cfg_ptr = orion_cfg_ptr_;
init();
}
OrionLink::~OrionLink()
{}
double OrionLink::calc_dynamic_energy(uint32_t num_bit_flip_) const
{
assert(num_bit_flip_ <= m_line_width);
return (num_bit_flip_*(m_dynamic_energy_per_bit/2));
}
double OrionLink::get_static_power() const
{
return (m_line_width*m_static_power_per_bit);
}
void OrionLink::init()
{
const TechParameter* tech_param_ptr = m_orion_cfg_ptr->get_tech_param_ptr();
const string& width_spacing_model_str = m_orion_cfg_ptr->get<string>("WIRE_WIDTH_SPACING");
const string& buf_scheme_str = m_orion_cfg_ptr->get<string>("WIRE_BUFFERING_MODEL");
bool is_shielding = m_orion_cfg_ptr->get<bool>("WIRE_IS_SHIELDING");
Wire wire(width_spacing_model_str, buf_scheme_str, is_shielding, tech_param_ptr);
m_dynamic_energy_per_bit = wire.calc_dynamic_energy(m_len);
m_static_power_per_bit = wire.calc_static_power(m_len);
return;
}
void OrionLink::print() const
{
cout << "Link - Dynamic Energy" << endl;
cout << "\t" << "One Bit = " << calc_dynamic_energy(1) << endl;
cout << endl;
cout << "Link - Static Power" << endl;
cout << "\t" << "One Bit = " << get_static_power() << endl;
cout << endl;
return;
}

72
src/mem/ruby/network/orion/OrionLink.hh
View file

@ -1,72 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __ORIONLINK_H__
#define __ORIONLINK_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class OrionConfig;
class OrionLink
{
public:
OrionLink(
double len_,
uint32_t line_width_,
const OrionConfig* orion_cfg_ptr_
);
~OrionLink();
public:
double calc_dynamic_energy(uint32_t num_bit_flip_) const;
double get_static_power() const;
void print() const;
private:
void init();
private:
double m_len;
uint32_t m_line_width;
const OrionConfig* m_orion_cfg_ptr;
double m_dynamic_energy_per_bit;
double m_static_power_per_bit;
};
#endif

497
src/mem/ruby/network/orion/OrionRouter.cc
View file

@ -1,497 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cassert>
#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
#include "mem/ruby/network/orion/Clock.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "OrionRouter.hh"
using namespace std;
OrionRouter::OrionRouter(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
std::vector<uint32_t > vclass_type_ary_,
uint32_t num_vc_per_vclass_,
uint32_t in_buf_per_data_vc_,
uint32_t in_buf_per_ctrl_vc_,
uint32_t flit_width_,
OrionConfig* orion_cfg_ptr_
)
{
assert((num_in_port_ == num_in_port_) && (num_in_port_ != 0));
assert((num_out_port_ == num_out_port_) && (num_out_port_ != 0));
assert((num_vclass_ == num_vclass_) && (num_vclass_ != 0));
assert((num_vc_per_vclass_ == num_vc_per_vclass_) && (num_vc_per_vclass_ != 0));
assert(in_buf_per_data_vc_ != 0);
assert(in_buf_per_ctrl_vc_ != 0);
assert((flit_width_ == flit_width_) && (flit_width_ != 0));
orion_cfg_ptr_->set_num_in_port(num_in_port_);
orion_cfg_ptr_->set_num_out_port(num_out_port_);
orion_cfg_ptr_->set_num_vclass(num_vclass_);
orion_cfg_ptr_->set_flit_width(flit_width_);
m_orion_cfg_ptr = orion_cfg_ptr_;
m_num_in_port = m_orion_cfg_ptr->get<uint32_t>("NUM_INPUT_PORT");
m_num_out_port = m_orion_cfg_ptr->get<uint32_t>("NUM_OUTPUT_PORT");
m_flit_width = m_orion_cfg_ptr->get<uint32_t>("FLIT_WIDTH");
m_num_vclass = m_orion_cfg_ptr->get<uint32_t>("NUM_VIRTUAL_CLASS");
m_num_vc_per_vclass_ary = new uint32_t [m_num_vclass];
m_in_buf_num_set_ary = new uint32_t [m_num_vclass];
for (int i = 0; i < m_num_vclass; i++)
{
// can also suppport different vcs per vclass
m_num_vc_per_vclass_ary[i] = num_vc_per_vclass_;
if (vclass_type_ary_[i] == 0) // ctrl
m_in_buf_num_set_ary[i] = in_buf_per_ctrl_vc_;
else if (vclass_type_ary_[i] == 1) // data
m_in_buf_num_set_ary[i] = in_buf_per_data_vc_;
else
assert(0);
}
init();
}
OrionRouter::~OrionRouter()
{
delete[] m_num_vc_per_vclass_ary;
delete[] m_in_buf_num_set_ary;
if (m_in_buf_ary_ptr)
{
for (uint32_t i = 0; i < m_num_vclass; i++)
{
delete m_in_buf_ary_ptr[i];
}
delete[] m_in_buf_ary_ptr;
}
if (m_va_ary_ptr)
{
for (uint32_t i = 0; i < m_num_vclass; i++)
{
delete m_va_ary_ptr[i];
}
delete[] m_va_ary_ptr;
}
delete m_xbar_ptr;
delete m_sa_ptr;
delete m_clk_ptr;
}
double OrionRouter::calc_dynamic_energy_buf(uint32_t vclass_id_, bool is_read_, bool is_max_) const
{
assert(vclass_id_ < m_num_vclass);
if (m_in_buf_ary_ptr)
{
if (m_in_buf_ary_ptr[vclass_id_])
{
return m_in_buf_ary_ptr[vclass_id_]->get_dynamic_energy(is_read_, is_max_);
}
else
{
return 0;
}
}
else
{
return 0;
}
}
double OrionRouter::calc_dynamic_energy_xbar(bool is_max_) const
{
if (m_xbar_ptr)
{
return m_xbar_ptr->get_dynamic_energy(is_max_);
}
else
{
return 0;
}
}
double OrionRouter::calc_dynamic_energy_local_vc_arb(uint32_t vclass_id_, double num_req_, bool is_max_) const
{
assert(vclass_id_ < m_num_vclass);
if (m_va_ary_ptr)
{
if (m_va_ary_ptr[vclass_id_])
{
return m_va_ary_ptr[vclass_id_]->get_dynamic_energy_local_vc_arb(num_req_, is_max_);
}
else
{
return 0;
}
}
else
{
return 0;
}
}
double OrionRouter::calc_dynamic_energy_global_vc_arb(uint32_t vclass_id_, double num_req_, bool is_max_) const
{
assert(vclass_id_ < m_num_vclass);
if (m_va_ary_ptr)
{
if (m_va_ary_ptr[vclass_id_])
{
return m_va_ary_ptr[vclass_id_]->get_dynamic_energy_global_vc_arb(num_req_, is_max_);
}
else
{
return 0;
}
}
else
{
return 0;
}
}
//double OrionRouter::calc_dynamic_energy_vc_select(bool is_read_, bool is_max_) const
//{
// if (m_vc_select_ptr)
// {
// return m_vc_select_ptr->get_dynamic_energy_vc_select(is_read_, is_max_);
// }
// else
// {
// return 0;
// }
//}
double OrionRouter::calc_dynamic_energy_local_sw_arb(double num_req_, bool is_max_) const
{
if (m_sa_ptr)
{
return m_sa_ptr->get_dynamic_energy_local_sw_arb(num_req_, is_max_);
}
else
{
return 0;
}
}
double OrionRouter::calc_dynamic_energy_global_sw_arb(double num_req_, bool is_max_) const
{
if (m_sa_ptr)
{
return m_sa_ptr->get_dynamic_energy_global_sw_arb(num_req_, is_max_);
}
else
{
return 0;
}
}
double OrionRouter::calc_dynamic_energy_clock() const
{
if (m_clk_ptr)
{
return m_clk_ptr->get_dynamic_energy();
}
else
{
return 0;
}
}
double OrionRouter::get_static_power_buf() const
{
if (m_in_buf_ary_ptr)
{
double total_static_power = 0;
for (uint32_t i = 0; i < m_num_vclass; i++)
{
uint32_t num_in_buf;
if (m_is_in_shared_buf)
{
num_in_buf = m_num_in_port;
}
else
{
num_in_buf = m_num_vc_per_vclass_ary[i]*m_num_in_port;
}
total_static_power += m_in_buf_ary_ptr[i]->get_static_power()*(double)num_in_buf;
}
return total_static_power;
}
else
{
return 0;
}
}
double OrionRouter::get_static_power_xbar() const
{
if (m_xbar_ptr)
{
return m_xbar_ptr->get_static_power();
}
else
{
return 0;
}
}
double OrionRouter::get_static_power_va() const
{
if (m_va_ary_ptr)
{
double total_static_power = 0;
for (uint32_t i = 0; i < m_num_vclass; i++)
{
total_static_power += m_va_ary_ptr[i]->get_static_power();
}
return total_static_power;
}
else
{
return 0;
}
}
//double OrionRouter::get_static_power_vc_select() const
//{
// if (m_vc_select_ptr)
// {
// return m_vc_select_ptr->get_static_power();
// }
// else
// {
// return 0;
// }
//}
double OrionRouter::get_static_power_sa() const
{
if (m_sa_ptr)
{
return m_sa_ptr->get_static_power();
}
else
{
return 0;
}
}
double OrionRouter::get_static_power_clock() const
{
if (m_clk_ptr)
{
return m_clk_ptr->get_static_power();
}
else
{
return 0;
}
}
void OrionRouter::init()
{
m_total_num_vc = 0;
for (uint32_t i = 0; i < m_num_vclass; i++)
{
m_total_num_vc += m_num_vc_per_vclass_ary[i];
}
if (m_total_num_vc > 1)
{
m_is_in_shared_buf = m_orion_cfg_ptr->get<bool>("IS_IN_SHARED_BUFFER");
m_is_out_shared_buf = m_orion_cfg_ptr->get<bool>("IS_OUT_SHARED_BUFFER");
m_is_in_shared_switch = m_orion_cfg_ptr->get<bool>("IS_IN_SHARED_SWITCH");
m_is_out_shared_switch = m_orion_cfg_ptr->get<bool>("IS_OUT_SHARED_SWITCH");
}
else
{
m_is_in_shared_buf = false;
m_is_out_shared_buf = false;
m_is_in_shared_switch = false;
m_is_out_shared_switch = false;
}
//input buffer
bool is_in_buf = m_orion_cfg_ptr->get<bool>("IS_INPUT_BUFFER");
if (is_in_buf)
{
bool is_fifo = true;
bool is_outdrv = (!m_is_in_shared_buf) && (m_is_in_shared_switch);
const string& in_buf_model_str = m_orion_cfg_ptr->get<string>("IN_BUF_MODEL");
m_in_buf_ary_ptr = new Buffer* [m_num_vclass];
for (uint32_t i = 0; i < m_num_vclass; i++)
{
uint32_t in_buf_num_read_port = m_orion_cfg_ptr->get<uint32_t>("IN_BUF_NUM_READ_PORT");
uint32_t in_buf_num_set = m_in_buf_num_set_ary[i];
m_in_buf_ary_ptr[i] = new Buffer(in_buf_model_str, is_fifo, is_outdrv,
in_buf_num_set, m_flit_width, in_buf_num_read_port, 1, m_orion_cfg_ptr);
}
}
else
{
m_in_buf_ary_ptr = NULL;
}
bool is_out_buf = m_orion_cfg_ptr->get<bool>("IS_OUTPUT_BUFFER");
//crossbar
uint32_t num_switch_in;
if (is_in_buf)
{
if (m_is_in_shared_buf)
{
uint32_t in_buf_num_read_port = m_orion_cfg_ptr->get<uint32_t>("IN_BUF_NUM_READ_PORT");
num_switch_in = in_buf_num_read_port*m_num_in_port;
}
else if (m_is_in_shared_switch)
{
num_switch_in = 1*m_num_in_port;
}
else
{
num_switch_in = m_total_num_vc*m_num_in_port;
}
}
else
{
num_switch_in = 1*m_num_in_port;
}
uint32_t num_switch_out;
if (is_out_buf)
{
if (m_is_out_shared_buf)
{
uint32_t out_buf_num_write_port = m_orion_cfg_ptr->get<uint32_t>("OUT_BUF_NUM_WRITE_PORT");
num_switch_out = out_buf_num_write_port*m_num_out_port;
}
else if (m_is_out_shared_switch)
{
num_switch_out = 1*m_num_out_port;
}
else
{
num_switch_out = m_total_num_vc*m_num_out_port;
}
}
else
{
num_switch_out = 1*m_num_out_port;
}
const string& xbar_model_str = m_orion_cfg_ptr->get<string>("CROSSBAR_MODEL");
m_xbar_ptr = Crossbar::create_crossbar(xbar_model_str,
num_switch_in, num_switch_out, m_flit_width, m_orion_cfg_ptr);
//vc allocator
const string& va_model_str = m_orion_cfg_ptr->get<string>("VA_MODEL");
m_va_ary_ptr = new VCAllocator* [m_num_vclass];
//m_vc_select_ary_ptr = new VCAllocator* [m_num_vclass];
for (uint32_t i = 0; i < m_num_vclass; i++)
{
m_va_ary_ptr[i] = VCAllocator::create_vcallocator(va_model_str,
m_num_in_port, m_num_out_port, 1, m_num_vc_per_vclass_ary[i],
m_orion_cfg_ptr);
//m_vc_select_ary_ptr[i] = VCAllocator::create_vcallocator("VC_SELECT",
// m_num_in_port, m_num_out_port, 1, m_num_vc_per_vclass_ary[i], m_orion_cfg_ptr);
}
//sw allocator
m_sa_ptr = SWAllocator::create_swallocator(
m_num_in_port, m_num_out_port, 1, m_total_num_vc,
m_xbar_ptr, m_orion_cfg_ptr);
//cloc
m_clk_ptr = new Clock(is_in_buf, m_is_in_shared_switch, is_out_buf, m_is_out_shared_switch, m_orion_cfg_ptr);
return;
}
void OrionRouter::print() const
{
if (m_in_buf_ary_ptr)
{
for (uint32_t i = 0; i < m_num_vclass; i++)
{
cout << "VClass " << i << endl;
if (m_in_buf_ary_ptr[i]) m_in_buf_ary_ptr[i]->print_all();
}
}
m_xbar_ptr->print_all();
for (uint32_t i = 0; i < m_num_vclass; i++)
{
cout << "VClass " << i << endl;
m_va_ary_ptr[i]->print_all();
//m_vc_select_ary_ptr[i]->print_all();
}
m_sa_ptr->print_all();
//cout << "Router - Dynamic Energy" << endl;
//cout << "\t" << "Buffer Read = " << calc_dynamic_energy_buf(true) << endl;
//cout << "\t" << "Buffer Write = " << calc_dynamic_energy_buf(false) << endl;
//cout << "\t" << "Crossbar = " << calc_dynamic_energy_xbar() << endl;
//cout << "\t" << "Local VC Allocator(1) = " << calc_dynamic_energy_local_vc_arb(1) << endl;
//cout << "\t" << "Global VC Allocator(1) = " << calc_dynamic_energy_global_vc_arb(1) << endl;
//cout << "\t" << "VC Select Read = " << calc_dynamic_energy_vc_select(true) << endl;
//cout << "\t" << "VC Select Write = " << calc_dynamic_energy_vc_select(false) << endl;
//cout << "\t" << "Local SW Allocator(2) = " << calc_dynamic_energy_local_sw_arb(1) << endl;
//cout << "\t" << "Global SW Allocator(2) = " << calc_dynamic_energy_global_sw_arb(1) << endl;
//cout << "\t" << "Clock = " << calc_dynamic_energy_clock() << endl;
//cout << endl;
//cout << "Router - Static Power" << endl;
//cout << "\t" << "Buffer = " << get_static_power_buf() << endl;
//cout << "\t" << "Crossbar = " << get_static_power_xbar() << endl;
//cout << "\t" << "VC Allocator = " << get_static_power_va() << endl;
//cout << "\t" << "SW Allocator = " << get_static_power_sa() << endl;
//cout << "\t" << "Clock = " << get_static_power_clock() << endl;
//cout << endl;
return;
}

119
src/mem/ruby/network/orion/OrionRouter.hh
View file

@ -1,119 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __ORIONROUTER_H__
#define __ORIONROUTER_H__
#include <vector>
#include "mem/ruby/network/orion/Type.hh"
class OrionConfig;
class Buffer;
class Crossbar;
class VCAllocator;
class SWAllocator;
class Clock;
class OrionRouter
{
public:
OrionRouter(
const OrionConfig* orion_cfg_ptr_
);
//values in cfg file will be modified
OrionRouter(
uint32_t num_in_port_,
uint32_t num_out_port_,
uint32_t num_vclass_,
std::vector<uint32_t > vclass_type_,
uint32_t num_vc_per_vclass_,
uint32_t in_buf_per_data_vc_,
uint32_t in_buf_per_ctrl_vc_,
uint32_t flit_width_,
OrionConfig* orion_cfg_ptr_
);
~OrionRouter();
public:
//double calc_dynamic_energy(double e_fin_, bool is_max_ = false) const;
//double calc_dynamic_energy_in_buf(bool is_read_, bool is_max_ = false) const;
//double calc_dynamic_energy_out_buf(bool is_read_, bool is_max_ = false) const;
double calc_dynamic_energy_buf(uint32_t vclass_id_, bool is_read_, bool is_max_ = false) const;
double calc_dynamic_energy_xbar(bool is_max_ = false) const;
double calc_dynamic_energy_local_vc_arb(uint32_t vclass_id_, double num_req_, bool is_max_ = false) const;
double calc_dynamic_energy_global_vc_arb(uint32_t vclass_id_, double num_req_, bool is_max_ = false) const;
//double calc_dynamic_energy_vc_select(uint32_t vclass_id_, bool is_read_, bool is_max_ = false) const;
double calc_dynamic_energy_local_sw_arb(double num_req_, bool is_max_ = false) const;
double calc_dynamic_energy_global_sw_arb(double num_req_, bool is_max_ = false) const;
double calc_dynamic_energy_clock() const;
double get_static_power_buf() const;
double get_static_power_xbar() const;
double get_static_power_va() const;
double get_static_power_sa() const;
double get_static_power_clock() const;
void print() const;
void init();
private:
const OrionConfig* m_orion_cfg_ptr;
uint32_t m_num_in_port;
uint32_t m_num_out_port;
uint32_t m_flit_width;
uint32_t m_num_vclass;
uint32_t num_vc_per_vclass;
uint32_t m_total_num_vc;
uint32_t* m_num_vc_per_vclass_ary;
uint32_t* m_in_buf_num_set_ary;
bool m_is_in_shared_buf;
bool m_is_out_shared_buf;
bool m_is_in_shared_switch;
bool m_is_out_shared_switch;
Buffer** m_in_buf_ary_ptr;
Crossbar* m_xbar_ptr;
VCAllocator** m_va_ary_ptr;
//VCAllocator** m_vc_select_ary_ptr;
SWAllocator* m_sa_ptr;
Clock* m_clk_ptr;
};
#endif

41
src/mem/ruby/network/orion/SConscript
View file

@ -1,41 +0,0 @@
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Tushar Krishna
Import('*')
if env['PROTOCOL'] == 'None':
Return()
Source('NetworkPower.cc')
Source('Clock.cc')
Source('ConfigFile.cc')
Source('FlipFlop.cc')
Source('OrionConfig.cc')
Source('OrionLink.cc')
Source('OrionRouter.cc')
Source('TechParameter.cc')
Source('Wire.cc')

1476
src/mem/ruby/network/orion/TechParameter.cc
View file

File diff suppressed because it is too large Load diff

412
src/mem/ruby/network/orion/TechParameter.hh
View file

@ -1,412 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __TECHPARAMETER_H__
#define __TECHPARAMETER_H__
#include <string>
#include "mem/ruby/network/orion/Type.hh"
class OrionConfig;
class TechParameter
{
public:
enum TransistorType
{
LVT = 0,
NVT,
HVT,
NUM_TRANSISTOR_TYPE
};
enum WireLayerType
{
LOCAL = 0,
INTERMEDIATE,
GLOBAL,
NUM_WIRE_LAYER_TYPE
};
enum ChannelType
{
NCH,
PCH
};
public:
TechParameter(const OrionConfig* orion_cfg_ptr_);
~TechParameter();
public:
double calc_gatecap(double width_, double wirelength_) const;
double calc_gatecappass(double width_, double wirelength_) const;
double calc_draincap(double width_, ChannelType ch_, uint32_t num_stack_) const;
double calc_restowidth(double res_, ChannelType ch_) const;
double calc_driver_psize(double cap_, double rise_time_) const;
public:
bool is_trans_type_hvt() const { return (m_transistor_type == HVT); }
bool is_trans_type_nvt() const { return (m_transistor_type == NVT); }
bool is_trans_type_lvt() const { return (m_transistor_type == LVT); }
double get_tech_node() const { return m_tech_node; }
double get_vdd() const { return m_vdd; }
double get_freq() const { return m_freq; }
double get_period() const { return m_period; }
double get_amp_idsat() const { return m_amp_idsat; }
double get_SCALE_S() const { return m_SCALE_S; }
double get_MSCALE() const { return m_MSCALE; }
double get_Lamda() const { return m_Lamda; }
double get_Cmetal() const { return m_Cmetal; }
double get_CM2metal() const { return m_CM2metal; }
double get_CM3metal() const { return m_CM3metal; }
double get_CCmetal() const { return m_CCmetal; }
double get_CCM2metal() const { return m_CCM2metal; }
double get_CCM3metal() const { return m_CCM3metal; }
double get_CC2metal() const { return m_CC2metal; }
double get_CC2M2metal() const { return m_CC2M2metal; }
double get_CC2M3metal() const { return m_CC2M3metal; }
double get_CC3metal() const { return m_CC3metal; }
double get_CC3M2metal() const { return m_CC3M2metal; }
double get_CC3M3metal() const { return m_CC3M3metal; }
double get_EnergyFactor() const { return m_EnergyFactor; }
double get_SenseEnergyFactor() const { return m_SenseEnergyFactor; }
double get_Woutdrvseln() const { return m_Woutdrvseln; }
double get_Woutdrvselp() const { return m_Woutdrvselp; }
double get_Woutdrvnandn() const { return m_Woutdrvnandn; }
double get_Woutdrvnandp() const { return m_Woutdrvnandp; }
double get_Woutdrvnorn() const { return m_Woutdrvnorn; }
double get_Woutdrvnorp() const { return m_Woutdrvnorp; }
double get_Woutdrivern() const { return m_Woutdrivern; }
double get_Woutdriverp() const { return m_Woutdriverp; }
double get_WsenseQ1to4() const { return m_WsenseQ1to4; }
double get_Wbitmuxn() const { return m_Wbitmuxn; }
double get_Wmemcellr() const { return m_Wmemcellr; }
double get_Wmemcellw() const { return m_Wmemcellw; }
double get_Wmemcella() const { return m_Wmemcella; }
double get_Wmemcellbscale() const { return m_Wmemcellbscale; }
double get_RegCellHeight() const { return m_RegCellHeight; }
double get_RegCellWidth() const { return m_RegCellWidth; }
double get_WordlineSpacing() const { return m_WordlineSpacing; }
double get_BitlineSpacing() const { return m_BitlineSpacing; }
double get_BitWidth() const { return m_BitWidth; }
double get_Wdecinvn() const { return m_Wdecinvn; }
double get_Wdecinvp() const { return m_Wdecinvp; }
double get_Wdec3to8n() const { return m_Wdec3to8n; }
double get_Wdec3to8p() const { return m_Wdec3to8p; }
double get_WdecNORn() const { return m_WdecNORn; }
double get_WdecNORp() const { return m_WdecNORp; }
double get_Wdecdriven() const { return m_Wdecdriven; }
double get_Wdecdrivep() const { return m_Wdecdrivep; }
double get_CrsbarCellWidth() const { return m_CrsbarCellWidth; }
double get_CrsbarCellHeight() const { return m_CrsbarCellHeight; }
double get_Wdff() const { return m_Wdff; }
double get_WireMinWidth() const { return m_WireMinWidth; }
double get_WireMinSpacing() const { return m_WireMinSpacing; }
double get_WireBarrierThickness() const { return m_WireBarrierThickness; }
double get_WireMetalThickness() const { return m_WireMetalThickness; }
double get_WireDielectricThickness() const { return m_WireDielectricThickness; }
double get_WireDielectricConstant() const { return m_WireDielectricConstant; }
double get_BufferDriveResistance() const { return m_BufferDriveResistance; }
double get_BufferInputCapacitance() const { return m_BufferInputCapacitance; }
double get_BufferNMOSOffCurrent() const { return m_BufferNMOSOffCurrent; }
double get_BufferPMOSOffCurrent() const { return m_BufferPMOSOffCurrent; }
double get_ClockCap() const { return m_ClockCap; }
double get_Clockwire() const { return m_Clockwire; }
double get_Reswire() const { return m_Reswire; }
double get_NMOS_TAB(uint32_t idx) const { return m_NMOS_TAB[idx]; }
double get_PMOS_TAB(uint32_t idx) const { return m_PMOS_TAB[idx]; }
double get_NAND2_TAB(uint32_t idx) const { return m_NAND2_TAB[idx]; }
double get_NOR2_TAB(uint32_t idx) const { return m_NOR2_TAB[idx]; }
double get_DFF_TAB(uint32_t idx) const { return m_DFF_TAB[idx]; }
private:
void init();
void init_tech_110_800();
void init_tech_32_90();
void init_tech_90();
private:
const OrionConfig* m_orion_cfg_ptr;
unsigned int m_tech_node;
TransistorType m_transistor_type;
double m_vdd;
double m_freq;
double m_period;
WireLayerType m_wire_layer_type;
double m_af;
uint32_t m_max_n;
uint32_t m_max_subarrays;
uint32_t m_max_spd;
double m_vth_outdr_nor;
double m_vth_comp_inv;
uint32_t m_bit_out;
uint32_t m_ruu_issue_width;
double m_amp_idsat;
double m_vs_inv;
double m_gen_power_factor;
double m_vth_nand_60x90;
double m_fudge_factor;
double m_vth_outdrive;
double m_vth_muxdrv1;
double m_vth_muxdrv2;
double m_normalize_scale;
double m_vth_muxdrv3;
uint32_t m_address_bits;
uint32_t m_ruu_size;
double m_vth_nor_12x4x1;
double m_vth_nor_12x4x2;
double m_vth_outdr_inv;
double m_vth_nor_12x4x3;
double m_vth_eval_inv;
double m_vth_nor_12x4x4;
uint32_t m_res_ialu;
double m_vth_outdr_nand;
double m_vth_inv_100x60;
double m_Cpdiffarea;
double m_Cpdiffside;
double m_Cpoverlap;
double m_Cndiffarea;
double m_Cndiffside;
double m_Cnoverlap;
double m_Cgatepass;
double m_Cgate;
double m_Cpdiffovlp;
double m_Cndiffovlp;
double m_Cpoxideovlp;
double m_Cnoxideovlp;
double m_Vbitpre;
double m_Vbitsense;
double m_EnergyFactor;
double m_SenseEnergyFactor;
double m_SenseEnergyFactor3;
double m_SenseEnergyFactor2;
double m_SCALE_T;
double m_SCALE_M;
double m_SCALE_S;
double m_SCALE_W;
double m_SCALE_H;
double m_SCALE_BW;
double m_SCALE_Crs;
double m_LSCALE;
double m_MSCALE;
double m_BitWidth;
double m_BitHeight;
double m_BitlineSpacing;
double m_WordlineSpacing;
double m_RegCellWidth;
double m_RegCellHeight;
double m_Cout;
double m_Cwordmetal;
double m_Cbitmetal;
double m_Cmetal;
double m_CM2metal;
double m_CM3metal;
double m_CCmetal;
double m_CCM2metal;
double m_CCM3metal;
double m_CC2metal;
double m_CC2M2metal;
double m_CC2M3metal;
double m_CC3metal;
double m_CC3M2metal;
double m_CC3M3metal;
double m_Clockwire;
double m_Reswire;
double m_invCap;
double m_Resout;
double m_Leff;
double m_Lamda;
double m_Cpolywire;
double m_Rnchannelstatic;
double m_Rpchannelstatic;
double m_Rnchannelon;
double m_Rpchannelon;
double m_Rbitmetal;
double m_Rwordmetal;
double m_Vt;
double m_Wdecdrivep;
double m_Wdecdriven;
double m_Wdec3to8n;
double m_Wdec3to8p;
double m_WdecNORn;
double m_WdecNORp;
double m_Wdecinvn;
double m_Wdecinvp;
double m_Wdff;
double m_Wworddrivemax;
double m_Wmemcella;
double m_Wmemcellr;
double m_Wmemcellw;
double m_Wmemcellbscale;
double m_Wbitpreequ;
double m_Wbitmuxn;
double m_WsenseQ1to4;
double m_Wcompinvp1;
double m_Wcompinvn1;
double m_Wcompinvp2;
double m_Wcompinvn2;
double m_Wcompinvp3;
double m_Wcompinvn3;
double m_Wevalinvp;
double m_Wevalinvn;
double m_Wcompn;
double m_Wcompp;
double m_Wcomppreequ;
double m_Wmuxdrv12n;
double m_Wmuxdrv12p;
double m_WmuxdrvNANDn;
double m_WmuxdrvNANDp;
double m_WmuxdrvNORn;
double m_WmuxdrvNORp;
double m_Wmuxdrv3n;
double m_Wmuxdrv3p;
double m_Woutdrvseln;
double m_Woutdrvselp;
double m_Woutdrvnandn;
double m_Woutdrvnandp;
double m_Woutdrvnorn;
double m_Woutdrvnorp;
double m_Woutdrivern;
double m_Woutdriverp;
double m_Wbusdrvn;
double m_Wbusdrvp;
double m_Wcompcellpd2;
double m_Wcompdrivern;
double m_Wcompdriverp;
double m_Wcomparen2;
double m_Wcomparen1;
double m_Wmatchpchg;
double m_Wmatchinvn;
double m_Wmatchinvp;
double m_Wmatchnandn;
double m_Wmatchnandp;
double m_Wmatchnorn;
double m_Wmatchnorp;
double m_WSelORn;
double m_WSelORprequ;
double m_WSelPn;
double m_WSelPp;
double m_WSelEnn;
double m_WSelEnp;
double m_Wsenseextdrv1p;
double m_Wsenseextdrv1n;
double m_Wsenseextdrv2p;
double m_Wsenseextdrv2n;
double m_CamCellHeight;/*derived from Cacti 5.3 */
double m_CamCellWidth;/*derived from Cacti 5.3 */
double m_MatchlineSpacing;
double m_TaglineSpacing;
double m_CrsbarCellHeight;
double m_CrsbarCellWidth;
double m_krise;
double m_tsensedata;
double m_tsensetag;
double m_tfalldata;
double m_tfalltag;
double m_WireMinWidth;
double m_WireMinSpacing;
double m_WireMetalThickness;
double m_WireBarrierThickness;
double m_WireDielectricThickness;
double m_WireDielectricConstant;
double m_BufferDriveResistance;
double m_BufferIntrinsicDelay;
double m_BufferInputCapacitance;
double m_BufferPMOSOffCurrent;
double m_BufferNMOSOffCurrent;
double m_ClockCap;
double m_AreaNOR;
double m_AreaINV;
double m_AreaAND;
double m_AreaDFF;
double m_AreaMUX2;
double m_AreaMUX3;
double m_AreaMUX4;
double m_NMOS_TAB[1];
double m_PMOS_TAB[1];
double m_NAND2_TAB[4];
double m_NOR2_TAB[4];
double m_DFF_TAB[1];
};
#endif

45
src/mem/ruby/network/orion/Type.hh
View file

@ -1,45 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __TYPE_H__
#define __TYPE_H__
typedef unsigned int uint32_t;
#include <string>
using std::string;
#endif

391
src/mem/ruby/network/orion/Wire.cc
View file

@ -1,391 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#include <cmath>
#include <cstdlib>
#include <iostream>
#include "base/misc.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Wire.hh"
using namespace std;
Wire::Wire(
const string& wire_spacing_model_str_,
const string& buf_scheme_str_,
bool is_shielding_,
const TechParameter* tech_param_ptr_
)
{
set_width_spacing_model(wire_spacing_model_str_);
set_buf_scheme(buf_scheme_str_);
m_is_shielding = is_shielding_;
m_tech_param_ptr = tech_param_ptr_;
if (m_tech_param_ptr->get_tech_node() > 90)
{
cerr << "ERROR: Wire model only support tech node <= 90" << endl;
exit(1);
}
init();
}
Wire::~Wire()
{}
// OPTIMUM K and H CALCULATION
// Computes the optimum number and size of repeaters for the link
void Wire::calc_opt_buffering(
int* k_,
double* h_,
double len_
) const
{
double BufferDriveResistance = m_tech_param_ptr->get_BufferDriveResistance();
double BufferInputCapacitance = m_tech_param_ptr->get_BufferInputCapacitance();
switch(m_buf_scheme)
{
case MIN_DELAY:
{
if (m_is_shielding)
{
double r = m_res_unit_len*len_;
double c_g = 2*m_gnd_cap_unit_len*len_;
double c_c = 2*m_couple_cap_unit_len*len_;
*k_ = (int) sqrt(((0.4*r*c_g)+(0.57*r*c_c))/
(0.7*BufferDriveResistance*BufferInputCapacitance)); //k is the number of buffers to be inserted
*h_ = sqrt(((0.7*BufferDriveResistance*c_g)+
(1.4*1.5*BufferDriveResistance*c_c))/(0.7*r*BufferInputCapacitance)); //the size of the buffers to be inserted
break;
}
else
{
double r = m_res_unit_len*len_;
double c_g = 2*m_gnd_cap_unit_len*len_;
double c_c = 2*m_couple_cap_unit_len*len_;
*k_ = (int) sqrt(((0.4*r*c_g)+(1.51*r*c_c))/
(0.7*BufferDriveResistance*BufferInputCapacitance));
*h_ = sqrt(((0.7*BufferDriveResistance*c_g)+
(1.4*2.2*BufferDriveResistance*c_c))/(0.7*r*BufferInputCapacitance));
break;
}
}
case STAGGERED:
{
double r = m_res_unit_len*len_;
double c_g = 2*m_gnd_cap_unit_len*len_;
double c_c = 2*m_couple_cap_unit_len*len_;
*k_ = (int) sqrt(((0.4*r*c_g)+(0.57*r*c_c))/
(0.7*BufferDriveResistance*BufferInputCapacitance));
*h_ = sqrt(((0.7*BufferDriveResistance*c_g)+
(1.4*1.5*BufferDriveResistance*c_c))/(0.7*r*BufferInputCapacitance));
break;
}
default:
{
// make gcc happy although all the cases of the enum
// are already covered
*k_ = 0;
*h_ = 0;
break;
}
}
return;
}
double Wire::calc_dynamic_energy(double len_) const
{
double c_g = 2*m_gnd_cap_unit_len*len_;
double c_c = 2*m_couple_cap_unit_len*len_;
double cap_wire = c_g + c_c;
int k;
double h;
calc_opt_buffering(&k, &h, len_);
double BufferInputCapacitance = m_tech_param_ptr->get_BufferInputCapacitance();
double cap_buf = ((double)k)*BufferInputCapacitance*h;
double e_factor = m_tech_param_ptr->get_EnergyFactor();
return ((cap_wire+cap_buf)*e_factor);
}
double Wire::calc_static_power(double len_) const
{
int k;
double h;
calc_opt_buffering(&k, &h, len_);
double BufferNMOSOffCurrent = m_tech_param_ptr->get_BufferNMOSOffCurrent();
double BufferPMOSOffCurrent = m_tech_param_ptr->get_BufferPMOSOffCurrent();
double i_static_nmos = BufferNMOSOffCurrent*h*k;
double i_static_pmos = BufferPMOSOffCurrent*h*k;
double vdd = m_tech_param_ptr->get_vdd();
return (vdd*(i_static_pmos+i_static_nmos)/2);
}
void Wire::init()
{
m_res_unit_len = calc_res_unit_len();
m_gnd_cap_unit_len = calc_gnd_cap_unit_len();
m_couple_cap_unit_len = calc_couple_cap_unit_len();
return;
}
void Wire::set_width_spacing_model(
const string& wire_spacing_model_str_
)
{
if (wire_spacing_model_str_ == string("SWIDTH_SSPACE"))
{
m_width_spacing_model = SWIDTH_SSPACE;
}
else if (wire_spacing_model_str_ == string("SWIDTH_DSPACE"))
{
m_width_spacing_model = SWIDTH_DSPACE;
}
else if (wire_spacing_model_str_ == string("DWIDTH_SSPACE"))
{
m_width_spacing_model = DWIDTH_SSPACE;
}
else if (wire_spacing_model_str_ == string("DWIDTH_DSPACE"))
{
m_width_spacing_model = DWIDTH_DSPACE;
}
else
{
cerr << "ERROR: Invalid wire width/spacing model" << endl;
exit(1);
}
return;
}
void Wire::set_buf_scheme(
const string& buf_scheme_str_
)
{
if (buf_scheme_str_ == string("MIN_DELAY"))
{
m_buf_scheme = MIN_DELAY;
}
else if (buf_scheme_str_ == string("STAGGERED"))
{
m_buf_scheme = STAGGERED;
}
else
{
cerr << "ERROR: Invalid wire buf scheme" << endl;
exit(1);
}
return;
}
// The following function computes the wire resistance considering
// width-spacing combination and a width-dependent resistivity model
double Wire::calc_res_unit_len()
{
double r = -1.0;
double rho;
// r, rho is in ohm.m
double WireMinWidth = m_tech_param_ptr->get_WireMinWidth();
double WireBarrierThickness = m_tech_param_ptr->get_WireBarrierThickness();
double WireMetalThickness = m_tech_param_ptr->get_WireMetalThickness();
switch(m_width_spacing_model)
{
case SWIDTH_SSPACE:
case SWIDTH_DSPACE:
rho = 2.202e-8 + (1.030e-15 / (WireMinWidth - 2*WireBarrierThickness));
r = ((rho) / ((WireMinWidth - 2*WireBarrierThickness) *
(WireMetalThickness - WireBarrierThickness)));
break;
case DWIDTH_SSPACE:
case DWIDTH_DSPACE:
rho = 2.202e-8 + (1.030e-15 / (2*WireMinWidth - 2*WireBarrierThickness));
r = ((rho) / ((2*WireMinWidth - 2*WireBarrierThickness) *
(WireMetalThickness - WireBarrierThickness)));
break;
default:
warn("Orion: Width spacing model not found: %s\n", m_width_spacing_model);
r = 1.0;
}
return r;
}
// COMPUTE WIRE CAPACITANCE using PTM models
double Wire::calc_gnd_cap_unit_len()
{
// c_g is in F
double c_g = -1.0;
double WireMinWidth = m_tech_param_ptr->get_WireMinWidth();
double WireMinSpacing = m_tech_param_ptr->get_WireMinSpacing();
double WireMetalThickness = m_tech_param_ptr->get_WireMetalThickness();
double WireDielectricThickness = m_tech_param_ptr->get_WireDielectricThickness();
double WireDielectricConstant = m_tech_param_ptr->get_WireDielectricConstant();
switch(m_width_spacing_model)
{
case SWIDTH_SSPACE:
{
double A = (WireMinWidth/WireDielectricThickness);
double B = 2.04*pow((WireMinSpacing/(WireMinSpacing +
0.54*WireDielectricThickness)), 1.77);
double C = pow((WireMetalThickness/(WireMetalThickness +
4.53*WireDielectricThickness)), 0.07);
c_g = WireDielectricConstant*8.85e-12*(A+(B*C));
break;
}
case SWIDTH_DSPACE:
{
double minSpacingNew = 2*WireMinSpacing + WireMinWidth;
double A = (WireMinWidth/WireDielectricThickness);
double B = 2.04*pow((minSpacingNew/(minSpacingNew +
0.54*WireDielectricThickness)), 1.77);
double C = pow((WireMetalThickness/(WireMetalThickness +
4.53*WireDielectricThickness)), 0.07);
c_g = WireDielectricConstant*8.85e-12*(A+(B*C));
break;
}
case DWIDTH_SSPACE:
{
double minWidthNew = 2*WireMinWidth;
double A = (minWidthNew/WireDielectricThickness);
double B = 2.04*pow((WireMinSpacing/(WireMinSpacing +
0.54*WireDielectricThickness)), 1.77);
double C = pow((WireMetalThickness/(WireMetalThickness +
4.53*WireDielectricThickness)), 0.07);
c_g = WireDielectricConstant*8.85e-12*(A+(B*C));
break;
}
case DWIDTH_DSPACE:
{
double minWidthNew = 2*WireMinWidth;
double minSpacingNew = 2*WireMinSpacing;
double A = (minWidthNew/WireDielectricThickness);
double B = 2.04*pow((minSpacingNew/(minSpacingNew+
0.54*WireDielectricThickness)), 1.77);
double C = pow((WireMetalThickness/(WireMetalThickness +
4.53*WireDielectricThickness)), 0.07);
c_g = WireDielectricConstant*8.85e-12*(A+(B*C));
break;
}
default:
warn("Orion: Width spacing model not found: %s\n", m_width_spacing_model);
c_g = 1.0;
}
return c_g;
}
// Computes the coupling capacitance considering cross-talk
double Wire::calc_couple_cap_unit_len()
{
//c_c is in F
double c_c = -1.0;
double WireMinWidth = m_tech_param_ptr->get_WireMinWidth();
double WireMinSpacing = m_tech_param_ptr->get_WireMinSpacing();
double WireMetalThickness = m_tech_param_ptr->get_WireMetalThickness();
double WireDielectricThickness = m_tech_param_ptr->get_WireDielectricThickness();
double WireDielectricConstant = m_tech_param_ptr->get_WireDielectricConstant();
switch(m_width_spacing_model)
{
case SWIDTH_SSPACE:
{
double A = 1.14*(WireMetalThickness/WireMinSpacing) *
exp(-4*WireMinSpacing/(WireMinSpacing + 8.01*WireDielectricThickness));
double B = 2.37*pow((WireMinWidth/(WireMinWidth + 0.31*WireMinSpacing)), 0.28);
double C = pow((WireDielectricThickness/(WireDielectricThickness +
8.96*WireMinSpacing)), 0.76) *
exp(-2*WireMinSpacing/(WireMinSpacing + 6*WireDielectricThickness));
c_c = WireDielectricConstant*8.85e-12*(A + (B*C));
break;
}
case SWIDTH_DSPACE:
{
double minSpacingNew = 2*WireMinSpacing + WireMinWidth;
double A = 1.14*(WireMetalThickness/minSpacingNew) *
exp(-4*minSpacingNew/(minSpacingNew + 8.01*WireDielectricThickness));
double B = 2.37*pow((WireMinWidth/(WireMinWidth + 0.31*minSpacingNew)), 0.28);
double C = pow((WireDielectricThickness/(WireDielectricThickness +
8.96*minSpacingNew)), 0.76) *
exp(-2*minSpacingNew/(minSpacingNew + 6*WireDielectricThickness));
c_c = WireDielectricConstant*8.85e-12*(A + (B*C));
break;
}
case DWIDTH_SSPACE:
{
double minWidthNew = 2*WireMinWidth;
double A = 1.14*(WireMetalThickness/WireMinSpacing) *
exp(-4*WireMinSpacing/(WireMinSpacing + 8.01*WireDielectricThickness));
double B = 2.37*pow((2*minWidthNew/(2*minWidthNew + 0.31*WireMinSpacing)), 0.28);
double C = pow((WireDielectricThickness/(WireDielectricThickness +
8.96*WireMinSpacing)), 0.76) *
exp(-2*WireMinSpacing/(WireMinSpacing + 6*WireDielectricThickness));
c_c = WireDielectricConstant*8.85e-12*(A + (B*C));
break;
}
case DWIDTH_DSPACE:
{
double minWidthNew = 2*WireMinWidth;
double minSpacingNew = 2*WireMinSpacing;
double A = 1.14*(WireMetalThickness/minSpacingNew) *
exp(-4*minSpacingNew/(minSpacingNew + 8.01*WireDielectricThickness));
double B = 2.37*pow((minWidthNew/(minWidthNew + 0.31*minSpacingNew)), 0.28);
double C = pow((WireDielectricThickness/(WireDielectricThickness +
8.96*minSpacingNew)), 0.76) *
exp(-2*minSpacingNew/(minSpacingNew + 6*WireDielectricThickness));
c_c = WireDielectricConstant*8.85e-12*(A + (B*C));
break;
}
default:
warn("Orion: Width spacing model not found: %s\n", m_width_spacing_model);
c_c = 1.0;
}
return c_c;
}

92
src/mem/ruby/network/orion/Wire.hh
View file

@ -1,92 +0,0 @@
/*
* Copyright (c) 2009 Princeton University
* Copyright (c) 2009 The Regents of the University of California
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Hangsheng Wang (Orion 1.0, Princeton)
* Xinping Zhu (Orion 1.0, Princeton)
* Xuning Chen (Orion 1.0, Princeton)
* Bin Li (Orion 2.0, Princeton)
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
#ifndef __WIRE_H__
#define __WIRE_H__
#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
class Wire
{
public:
enum WidthSpacingModel
{
SWIDTH_SSPACE,
SWIDTH_DSPACE,
DWIDTH_SSPACE,
DWIDTH_DSPACE
};
enum BufferScheme
{
MIN_DELAY,
STAGGERED
};
public:
Wire(
const string& wire_spacing_model_str_,
const string& buf_scheme_str_,
bool is_shielding_,
const TechParameter* tech_param_ptr_
);
~Wire();
public:
void calc_opt_buffering(int* k_, double* h_, double len_) const;
double calc_dynamic_energy(double len_) const;
double calc_static_power(double len_) const;
private:
void init();
void set_width_spacing_model(const string& wire_spacing_model_str_);
void set_buf_scheme(const string& buf_scheme_str_);
double calc_res_unit_len();
double calc_gnd_cap_unit_len();
double calc_couple_cap_unit_len();
private:
const TechParameter* m_tech_param_ptr;
WidthSpacingModel m_width_spacing_model;
BufferScheme m_buf_scheme;
bool m_is_shielding;
double m_res_unit_len;
double m_gnd_cap_unit_len;
double m_couple_cap_unit_len;
};
#endif

39
src/mem/ruby/network/orion/orion.hh
View file

@ -1,39 +0,0 @@
/*
* Copyright (c) 2010 Massachusetts Institute of Technology
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Chia-Hsin Owen Chen
*/
#ifndef __ORION_H__
#define __ORION_H__
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/OrionLink.hh"
#include "mem/ruby/network/orion/OrionRouter.hh"
#endif

146
src/mem/ruby/network/orion/router.cfg
View file

@ -1,146 +0,0 @@
# Copyright (c) 2010 Massachusetts Institute of Technology
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Chia-Hsin Owen Chen
# Technology related parameters
# technology node in nm (90, 65, 45, 32)
TECH_NODE = 65
# transistor type (HVT, NVT, LVT)
TRANSISTOR_TYPE = NVT
# operating voltage supply in volt
VDD = 1.0
# operating frequency in Hz
FREQUENCY = 1.0e9
# router module parameters
# general parameters
# number of router input ports
NUM_INPUT_PORT = 0
# number of router output ports
NUM_OUTPUT_PORT = 0
# flit width in bit
FLIT_WIDTH = 0
# virtual channel parameters
# number of message classes per port
NUM_VIRTUAL_CLASS = 0
# number of virtual channels per message class
NUM_VIRTUAL_CHANNEL = 0
# Are input virtual channels managed in a shared buffer? (Private buffer otherwise)
IS_IN_SHARED_BUFFER = FALSE
# Are output virtual channels managed in a shared buffer? (Private buffer otherwise)
IS_OUT_SHARED_BUFFER = FALSE
# Are input virtual channels sharing the same crossbar input ports?
IS_IN_SHARED_SWITCH = TRUE
# Are output virtual channels sharing the same crossbar output ports?
IS_OUT_SHARED_SWITCH = TRUE
# crossbar parameters
# crossbar model
CROSSBAR_MODEL = MULTREE_CROSSBAR
CROSSBAR_CONNECT_TYPE = TRISTATE_GATE
CROSSBAR_TRANS_GATE_TYPE = NP_GATE
CROSSBAR_MUX_DEGREE = 4
CROSSBAR_NUM_IN_SEG = 1
CROSSBAR_NUM_OUT_SEG = 1
# crossbar input line length
CROSSBAR_LEN_IN_WIRE = 0
# crossbar output line length
CROSSBAR_LEN_OUT_WIRE = 0
# input buffer parameters
IS_INPUT_BUFFER = TRUE
# input buffer model (SRAM, REGISTER)
IN_BUF_MODEL = REGISTER
IN_BUF_NUM_SET = 0
IN_BUF_NUM_READ_PORT = 1
# output buffer parameters */
IS_OUTPUT_BUFFER = FALSE
# output buffer model (SRAM, REGISTER)
OUT_BUF_MODEL = SRAM
OUT_BUF_NUM_SET = 0
OUT_BUF_NUM_WRITE_PORT = 0
# array parameters shared by various sram buffers
SRAM_ROWDEC_MODEL = GENERIC_DEC
SRAM_ROWDEC_PRE_MODEL = SINGLE_OTHER
SRAM_WORDLINE_MODEL = RW_WORDLINE
SRAM_BITLINE_MODEL = RW_BITLINE
SRAM_OUTDRV_MODEL = REG_OUTDRV
# these 3 should be changed together
# use double-ended bitline because the array is too large
SRAM_NUM_DATA_END = 2
SRAM_AMP_MODEL = GENERIC_AMP
SRAM_BITLINE_PRE_MODEL = EQU_BITLINE
# SRAM_NUM_DATA_END = 1
# SRAM_AMP_MODEL = NO_MODEL
# SRAM_BITLINE_PRE_MODEL = SINGLE_OTHER
# switch allocator arbiter parameters
# arbiter mode (MATRIX_ARBITER, RR_ARBITER)
SA_IN_ARB_MODEL = RR_ARBITER
# flip-flop model
SA_IN_ARB_FF_MODEL = NEG_DFF
# arbiter mode (MATRIX_ARBITER, RR_ARBITER)
SA_OUT_ARB_MODEL = MATRIX_ARBITER
# flip-flop model
SA_OUT_ARB_FF_MODEL = NEG_DFF
# virtual channel allocator arbiter parameters
# allocator model (ONE_STAGE_ARB, TWO_STAGE_ARB, VC_SELECT)
VA_MODEL = TWO_STAGE_ARB
# arbiter mode (MATRIX_ARBITER, RR_ARBITER)
VA_IN_ARB_MODEL = RR_ARBITER
# flip-flop model
VA_IN_ARB_FF_MODEL = NEG_DFF
# arbiter mode (MATRIX_ARBITER, RR_ARBITER)
VA_OUT_ARB_MODEL = MATRIX_ARBITER
# flip-flop model
VA_OUT_ARB_FF_MODEL = NEG_DFF
# buffer model if VC_SELECT is used (SRAM, REGISTER)
VA_BUF_MODEL = REGISTER
# link wire parameters
#link length in metres
LINK_LENGTH = 1e-3
# wire layer model (INTERMEDIATE, GLOBAL)
WIRE_LAYER_TYPE = GLOBAL
# wire width spacing (SWIDTH_SSPACE, SWIDTH_DSPACE, DWIDTH_SSPACE, DWIDTH_DSPACE)
WIRE_WIDTH_SPACING = DWIDTH_DSPACE
# buffering model (MIN_DELAY, STAGGERED)
WIRE_BUFFERING_MODEL = MIN_DELAY
# is shielding
WIRE_IS_SHIELDING = FALSE
# clock power parameters
NUM_PIPELINE_STAGE = 3
IS_HTREE_CLOCK = FALSE
# router diagonal in um
ROUTER_DIAGONAL = 442