sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

cpu: o3: corrects base FP and CC register index in removeThread()

Browse source
This commit is contained in:
Nilay Vaish 2014-10-20 16:47:55 -05:00
parent c6731e331a
commit 922a9d8ed2
1 changed files with 4 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/cpu/o3/cpu.cc
View file

@ -835,26 +835,22 @@ FullO3CPU<Impl>::removeThread(ThreadID tid)
// Unbind Int Regs from Rename Map
for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) {
PhysRegIndex phys_reg = renameMap[tid].lookup(ireg);
scoreboard.unsetReg(phys_reg);
freeList.addReg(phys_reg);
}
// Unbind Float Regs from Rename Map
int max_reg = TheISA::NumIntRegs + TheISA::NumFloatRegs;
for (int freg = TheISA::NumIntRegs; freg < max_reg; freg++) {
int max_reg = TheISA::FP_Reg_Base + TheISA::NumFloatRegs;
for (int freg = TheISA::FP_Reg_Base; freg < max_reg; freg++) {
PhysRegIndex phys_reg = renameMap[tid].lookup(freg);
scoreboard.unsetReg(phys_reg);
freeList.addReg(phys_reg);
}
// Unbind condition-code Regs from Rename Map
max_reg = TheISA::NumIntRegs + TheISA::NumFloatRegs + TheISA::NumCCRegs;
for (int creg = TheISA::NumIntRegs + TheISA::NumFloatRegs;
creg < max_reg; creg++) {
max_reg = TheISA::CC_Reg_Base + TheISA::NumCCRegs;
for (int creg = TheISA::CC_Reg_Base; creg < max_reg; creg++) {
PhysRegIndex phys_reg = renameMap[tid].lookup(creg);
scoreboard.unsetReg(phys_reg);
freeList.addReg(phys_reg);
}