inorder: clear fetchbuffer on traps
implement clearfetchbufferfunction extend predecoder to use multiple threads and clear those on trap
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2dae0e8735
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@ -57,9 +57,11 @@ FetchUnit::FetchUnit(string res_name, int res_id, int res_width,
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int res_latency, InOrderCPU *_cpu,
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int res_latency, InOrderCPU *_cpu,
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ThePipeline::Params *params)
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ThePipeline::Params *params)
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: CacheUnit(res_name, res_id, res_width, res_latency, _cpu, params),
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: CacheUnit(res_name, res_id, res_width, res_latency, _cpu, params),
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instSize(sizeof(TheISA::MachInst)), fetchBuffSize(params->fetchBuffSize),
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instSize(sizeof(TheISA::MachInst)), fetchBuffSize(params->fetchBuffSize)
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predecoder(NULL)
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{
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{ }
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for (int tid = 0; tid < MaxThreads; tid++)
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predecoder[tid] = new Predecoder(NULL);
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}
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FetchUnit::~FetchUnit()
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FetchUnit::~FetchUnit()
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{
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{
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@ -109,10 +111,10 @@ FetchUnit::createMachInst(std::list<FetchBlock*>::iterator fetch_it,
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MachInst mach_inst =
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MachInst mach_inst =
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TheISA::gtoh(fetchInsts[fetch_offset]);
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TheISA::gtoh(fetchInsts[fetch_offset]);
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predecoder.setTC(cpu->thread[tid]->getTC());
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predecoder[tid]->setTC(cpu->thread[tid]->getTC());
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predecoder.moreBytes(instPC, inst->instAddr(), mach_inst);
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predecoder[tid]->moreBytes(instPC, inst->instAddr(), mach_inst);
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assert(predecoder.extMachInstReady());
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assert(predecoder[tid]->extMachInstReady());
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ext_inst = predecoder.getExtMachInst(instPC);
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ext_inst = predecoder[tid]->getExtMachInst(instPC);
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inst->pcState(instPC);
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inst->pcState(instPC);
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inst->setMachInst(ext_inst);
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inst->setMachInst(ext_inst);
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@ -230,6 +232,22 @@ FetchUnit::blocksInUse()
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return cnt;
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return cnt;
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}
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}
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void
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FetchUnit::clearFetchBuffer()
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{
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std::list<FetchBlock*>::iterator fetch_it = fetchBuffer.begin();
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std::list<FetchBlock*>::iterator end_it = fetchBuffer.end();
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while (fetch_it != end_it) {
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if ((*fetch_it)->block) {
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delete [] (*fetch_it)->block;
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}
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delete *fetch_it;
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fetch_it++;
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}
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fetchBuffer.clear();
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}
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void
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void
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FetchUnit::execute(int slot_num)
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FetchUnit::execute(int slot_num)
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{
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{
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@ -563,5 +581,15 @@ void
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FetchUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
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FetchUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
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{
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{
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//@todo: per thread?
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//@todo: per thread?
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predecoder.reset();
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predecoder[tid]->reset();
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//@todo: squash using dummy inst seq num
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squash(NULL, NumStages - 1, 0, tid);
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//@todo: make sure no blocks are in use
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assert(blocksInUse() == 0);
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assert(pendingFetch.size() == 0);
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//@todo: clear pendingFetch and fetchBuffer
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clearFetchBuffer();
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}
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}
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@ -120,11 +120,13 @@ class FetchUnit : public CacheUnit
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int blocksInUse();
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int blocksInUse();
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void clearFetchBuffer();
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int instSize;
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int instSize;
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int fetchBuffSize;
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int fetchBuffSize;
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TheISA::Predecoder predecoder;
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TheISA::Predecoder *predecoder[ThePipeline::MaxThreads];
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/** Valid Cache Blocks*/
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/** Valid Cache Blocks*/
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std::list<FetchBlock*> fetchBuffer;
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std::list<FetchBlock*> fetchBuffer;
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