diff --git a/configs/example/memtest.py b/configs/example/memtest.py index e7f39d8bd..af100c9a9 100644 --- a/configs/example/memtest.py +++ b/configs/example/memtest.py @@ -37,7 +37,7 @@ parser.add_option("-a", "--atomic", action="store_true", help="Use atomic (non-timing) mode") parser.add_option("-b", "--blocking", action="store_true", help="Use blocking caches") -parser.add_option("-l", "--maxloads", metavar="N", +parser.add_option("-l", "--maxloads", metavar="N", default=0, help="Stop after N loads") parser.add_option("-m", "--maxtick", type="int", default=m5.MaxTick, metavar="T", @@ -116,14 +116,18 @@ if options.blocking: else: proto_l1.mshrs = 8 -# build a list of prototypes, one for each cache level (L1 is at end, -# followed by the tester pseudo-cpu objects) -prototypes = [ proto_l1, - MemTest(atomic=options.atomic, max_loads=options.maxloads, +# build a list of prototypes, one for each level of treespec, starting +# at the end (last entry is tester objects) +prototypes = [ MemTest(atomic=options.atomic, max_loads=options.maxloads, percent_functional=options.functional, percent_uncacheable=options.uncacheable, progress_interval=options.progress) ] +# next comes L1 cache, if any +if len(treespec) > 1: + prototypes.insert(0, proto_l1) + +# now add additional cache levels (if any) by scaling L1 params while len(prototypes) < len(treespec): # clone previous level and update params prev = prototypes[0] diff --git a/src/cpu/memtest/MemTest.py b/src/cpu/memtest/MemTest.py index 381519972..a328f4734 100644 --- a/src/cpu/memtest/MemTest.py +++ b/src/cpu/memtest/MemTest.py @@ -33,7 +33,7 @@ from m5 import build_env class MemTest(SimObject): type = 'MemTest' - max_loads = Param.Counter("number of loads to execute") + max_loads = Param.Counter(0, "number of loads to execute") atomic = Param.Bool(False, "Execute tester in atomic mode? (or timing)\n") memory_size = Param.Int(65536, "memory size") percent_dest_unaligned = Param.Percent(50, diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc index 019b4328c..db3ca282a 100644 --- a/src/cpu/memtest/memtest.cc +++ b/src/cpu/memtest/memtest.cc @@ -232,7 +232,7 @@ MemTest::completeRequest(PacketPtr pkt) nextProgressMessage += progressInterval; } - if (numReads >= maxLoads) + if (maxLoads != 0 && numReads >= maxLoads) exitSimLoop("maximum number of loads reached"); break;