CPU: Get rid of the now unnecessary getInst/setInst family of functions.
This code is no longer needed because of the preceeding change which adds a StaticInstPtr parameter to the fault's invoke method, obviating the only use for this pair of functions.
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16 changed files with 0 additions and 79 deletions
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@ -209,10 +209,6 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
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thread->getTC()));
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#endif
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#if FULL_SYSTEM
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thread->setInst(machInst);
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#endif // FULL_SYSTEM
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fault = inst->getFault();
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}
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@ -153,9 +153,6 @@ class CheckerThreadContext : public ThreadContext
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int threadId() { return actualTC->threadId(); }
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// @todo: Do I need this?
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MachInst getInst() { return actualTC->getInst(); }
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// @todo: Do I need this?
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void copyArchRegs(ThreadContext *tc)
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{
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@ -171,12 +171,6 @@ InOrderThreadContext::unserialize(Checkpoint *cp, const std::string §ion)
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panic("unserialize unimplemented");
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}
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TheISA::MachInst
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InOrderThreadContext:: getInst()
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{
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return thread->getInst();
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}
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void
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InOrderThreadContext::copyArchRegs(ThreadContext *src_tc)
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@ -177,11 +177,6 @@ class InOrderThreadContext : public ThreadContext
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/** Returns this thread's ID number. */
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int getThreadNum() { return thread->readTid(); }
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/** Returns the instruction this thread is currently committing.
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* Only used when an instruction faults.
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*/
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TheISA::MachInst getInst();
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/** Copies the architectural registers from another TC into this TC. */
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void copyArchRegs(ThreadContext *src_tc);
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@ -1033,12 +1033,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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}
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#endif
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// DTB will sometimes need the machine instruction for when
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// faults happen. So we will set it here, prior to the DTB
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// possibly needing it for its fault.
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thread[tid]->setInst(
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static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
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if (inst_fault != NoFault) {
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DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n",
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head_inst->seqNum, head_inst->readPC());
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@ -151,10 +151,6 @@ class O3ThreadContext : public ThreadContext
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/** Samples the function profiling information. */
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virtual void profileSample();
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#endif
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/** Returns the instruction this thread is currently committing.
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* Only used when an instruction faults.
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*/
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virtual TheISA::MachInst getInst();
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/** Copies the architectural registers from another TC into this TC. */
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virtual void copyArchRegs(ThreadContext *tc);
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@ -215,13 +215,6 @@ O3ThreadContext<Impl>::profileSample()
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}
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#endif
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template <class Impl>
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TheISA::MachInst
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O3ThreadContext<Impl>:: getInst()
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{
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return thread->getInst();
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}
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template <class Impl>
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void
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O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
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@ -171,9 +171,6 @@ class OzoneCPU : public BaseCPU
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int threadId();
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// Also somewhat obnoxious. Really only used for the TLB fault.
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TheISA::MachInst getInst();
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void copyArchRegs(ThreadContext *tc);
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void clearArchRegs();
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@ -771,7 +771,6 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
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setCpuId(old_context->cpuId());
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setContextId(old_context->contextId());
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thread->setInst(old_context->getInst());
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#if !FULL_SYSTEM
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setFuncExeInst(old_context->readFuncExeInst());
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#else
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@ -862,13 +861,6 @@ OzoneCPU<Impl>::OzoneTC::threadId()
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return thread->threadId();
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}
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template <class Impl>
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TheISA::MachInst
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OzoneCPU<Impl>::OzoneTC::getInst()
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{
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return thread->getInst();
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}
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template <class Impl>
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void
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OzoneCPU<Impl>::OzoneTC::copyArchRegs(ThreadContext *tc)
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@ -304,12 +304,6 @@ InorderBackEnd<Impl>::executeInsts()
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thread->inSyscall = true;
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// Hack for now; DTB will sometimes need the machine instruction
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// for when faults happen. So we will set it here, prior to the
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// DTB possibly needing it for this translation.
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thread->setInst(
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static_cast<TheISA::MachInst>(inst->staticInst->machInst));
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// Consider holding onto the trap and waiting until the trap event
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// happens for this to be executed.
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inst_fault->invoke(xc);
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@ -1171,9 +1171,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
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}
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#endif
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thread->setInst(
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static_cast<TheISA::MachInst>(inst->staticInst->machInst));
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handleFault(inst_fault);
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return false;
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}
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@ -456,10 +456,6 @@ BaseSimpleCPU::preExecute()
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DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
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curStaticInst->getName(), curStaticInst->machInst);
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#endif // TRACING_ON
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#if FULL_SYSTEM
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thread->setInst(inst);
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#endif // FULL_SYSTEM
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}
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}
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@ -181,7 +181,6 @@ SimpleThread::copyState(ThreadContext *oldContext)
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#if !FULL_SYSTEM
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funcExeInst = oldContext->readFuncExeInst();
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#endif
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inst = oldContext->getInst();
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_threadId = oldContext->threadId();
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_contextId = oldContext->contextId();
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@ -171,10 +171,6 @@ class ThreadContext
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virtual void profileSample() = 0;
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#endif
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// Also somewhat obnoxious. Really only used for the TLB fault.
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// However, may be quite useful in SPARC.
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virtual TheISA::MachInst getInst() = 0;
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virtual void copyArchRegs(ThreadContext *tc) = 0;
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virtual void clearArchRegs() = 0;
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@ -352,8 +348,6 @@ class ProxyThreadContext : public ThreadContext
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void profileClear() { return actualTC->profileClear(); }
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void profileSample() { return actualTC->profileSample(); }
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#endif
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// @todo: Do I need this?
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MachInst getInst() { return actualTC->getInst(); }
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// @todo: Do I need this?
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void copyArchRegs(ThreadContext *tc) { actualTC->copyArchRegs(tc); }
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@ -75,7 +75,6 @@ ThreadState::serialize(std::ostream &os)
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SERIALIZE_ENUM(_status);
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// thread_num and cpu_id are deterministic from the config
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SERIALIZE_SCALAR(funcExeInst);
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SERIALIZE_SCALAR(inst);
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#if FULL_SYSTEM
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Tick quiesceEndTick = 0;
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@ -94,7 +93,6 @@ ThreadState::unserialize(Checkpoint *cp, const std::string §ion)
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UNSERIALIZE_ENUM(_status);
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// thread_num and cpu_id are deterministic from the config
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UNSERIALIZE_SCALAR(funcExeInst);
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UNSERIALIZE_SCALAR(inst);
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#if FULL_SYSTEM
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Tick quiesceEndTick;
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@ -122,12 +122,6 @@ struct ThreadState {
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void setMemPort(TranslatingPort *_port) { port = _port; }
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#endif
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/** Sets the current instruction being committed. */
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void setInst(TheISA::MachInst _inst) { inst = _inst; }
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/** Returns the current instruction being committed. */
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TheISA::MachInst getInst() { return inst; }
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/** Reads the number of instructions functionally executed and
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* committed.
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*/
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@ -205,11 +199,6 @@ struct ThreadState {
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Process *process;
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#endif
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/** Current instruction the thread is committing. Only set and
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* used for DTB faults currently.
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*/
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TheISA::MachInst inst;
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public:
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/**
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* Temporary storage to pass the source address from copy_load to
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