arch: TheISA shouldn't really ever be used in the arch directory.
We should always refer to the specific ISA in that arch directory. This is especially necessary if we're ever going to make it to the point where we actually have heterogeneous systems.
This commit is contained in:
parent
0b30c345f1
commit
8ea5176b7f
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@ -383,10 +383,10 @@ AlphaISA::MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc)
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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if (val & 0x18) {
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if (val & 0x18) {
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if (tc->getKernelStats())
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if (tc->getKernelStats())
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tc->getKernelStats()->mode(TheISA::Kernel::user, tc);
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tc->getKernelStats()->mode(AlphaISA::Kernel::user, tc);
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} else {
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} else {
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if (tc->getKernelStats())
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if (tc->getKernelStats())
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tc->getKernelStats()->mode(TheISA::Kernel::kernel, tc);
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tc->getKernelStats()->mode(AlphaISA::Kernel::kernel, tc);
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}
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}
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#endif
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#endif
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@ -33,7 +33,7 @@
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#include "arch/alpha/kernel_stats.hh"
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#include "arch/alpha/kernel_stats.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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using namespace TheISA;
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using namespace AlphaISA;
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void
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void
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IdleStartEvent::process(ThreadContext *tc)
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IdleStartEvent::process(ThreadContext *tc)
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@ -78,7 +78,7 @@ class Interrupts
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{
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{
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DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
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DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
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if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
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if (int_num < 0 || int_num >= AlphaISA::NumInterruptLevels)
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panic("int_num out of bounds\n");
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panic("int_num out of bounds\n");
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if (index < 0 || index >= (int)sizeof(uint64_t) * 8)
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if (index < 0 || index >= (int)sizeof(uint64_t) * 8)
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@ -55,7 +55,7 @@ class ThreadInfo
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CopyOut(tc, &data, addr, sizeof(T));
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CopyOut(tc, &data, addr, sizeof(T));
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data = TheISA::gtoh(data);
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data = AlphaISA::gtoh(data);
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return true;
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return true;
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}
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}
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@ -76,7 +76,7 @@ class ThreadInfo
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Addr sp;
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Addr sp;
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if (!addr)
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if (!addr)
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addr = tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23);
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addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
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FunctionalPort *p = tc->getPhysPort();
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FunctionalPort *p = tc->getPhysPort();
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p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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@ -70,7 +70,7 @@ namespace AlphaISA
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}
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}
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// Then loop through the floating point registers.
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// Then loop through the floating point registers.
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for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) {
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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}
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}
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@ -140,7 +140,7 @@
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#include "sim/system.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace std;
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using namespace TheISA;
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using namespace AlphaISA;
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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: BaseRemoteGDB(_system, c, KGDB_NUMREGS)
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: BaseRemoteGDB(_system, c, KGDB_NUMREGS)
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@ -161,12 +161,12 @@ RemoteGDB::acc(Addr va, size_t len)
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#else
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#else
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Addr last_va;
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Addr last_va;
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va = TheISA::TruncPage(va);
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va = AlphaISA::TruncPage(va);
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last_va = TheISA::RoundPage(va + len);
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last_va = AlphaISA::RoundPage(va + len);
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do {
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do {
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if (TheISA::IsK0Seg(va)) {
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if (AlphaISA::IsK0Seg(va)) {
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if (va < (TheISA::K0SegBase + pmem->size())) {
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if (va < (AlphaISA::K0SegBase + pmem->size())) {
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DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
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DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
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"%#x < K0SEG + size\n", va);
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"%#x < K0SEG + size\n", va);
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return true;
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return true;
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@ -188,12 +188,12 @@ RemoteGDB::acc(Addr va, size_t len)
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return true;
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return true;
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Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20);
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Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20);
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TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
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AlphaISA::PageTableEntry pte = AlphaISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
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if (!pte.valid()) {
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if (!pte.valid()) {
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DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
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DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
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return false;
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return false;
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}
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}
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va += TheISA::PageBytes;
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va += AlphaISA::PageBytes;
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} while (va < last_va);
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} while (va < last_va);
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DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
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DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
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@ -215,17 +215,17 @@ RemoteGDB::getregs()
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// @todo: Currently this is very Alpha specific.
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// @todo: Currently this is very Alpha specific.
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
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gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]);
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gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]);
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}
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}
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} else {
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} else {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
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gdbregs.regs[i] = context->readIntReg(i);
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gdbregs.regs[i] = context->readIntReg(i);
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}
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}
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}
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}
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#ifdef KGDB_FP_REGS
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#ifdef KGDB_FP_REGS
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for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
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gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
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gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
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}
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}
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#endif
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#endif
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@ -242,17 +242,17 @@ RemoteGDB::setregs()
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{
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{
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// @todo: Currently this is very Alpha specific.
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// @todo: Currently this is very Alpha specific.
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
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context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]);
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context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]);
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}
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}
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} else {
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} else {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
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context->setIntReg(i, gdbregs.regs[i]);
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context->setIntReg(i, gdbregs.regs[i]);
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}
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}
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}
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}
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#ifdef KGDB_FP_REGS
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#ifdef KGDB_FP_REGS
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for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
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for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
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context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
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context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
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}
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}
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#endif
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#endif
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@ -159,7 +159,7 @@ namespace AlphaISA
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}
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}
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SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
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Addr ksp = tc->readIntReg(AlphaISA::StackPointerReg);
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Addr bottom = ksp & ~0x3fff;
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Addr bottom = ksp & ~0x3fff;
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Addr addr;
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Addr addr;
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@ -62,7 +62,7 @@ namespace AlphaISA
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class StackTrace
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class StackTrace
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{
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{
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protected:
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protected:
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typedef TheISA::MachInst MachInst;
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typedef AlphaISA::MachInst MachInst;
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private:
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private:
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ThreadContext *tc;
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ThreadContext *tc;
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std::vector<Addr> stack;
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std::vector<Addr> stack;
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@ -166,7 +166,7 @@ SyscallReturn tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
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ThreadContext *tc)
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ThreadContext *tc)
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{
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{
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using namespace std;
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using namespace std;
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using namespace TheISA;
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using namespace AlphaISA;
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int id = tc->getSyscallArg(0); // table ID
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int id = tc->getSyscallArg(0); // table ID
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int index = tc->getSyscallArg(1); // index into table
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int index = tc->getSyscallArg(1); // index into table
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@ -34,7 +34,7 @@
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#include "arch/mips/kernel_stats.hh"
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#include "arch/mips/kernel_stats.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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using namespace TheISA;
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using namespace MipsISA;
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void
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void
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IdleStartEvent::process(ThreadContext *tc)
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IdleStartEvent::process(ThreadContext *tc)
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@ -55,7 +55,7 @@ class ThreadInfo
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CopyOut(tc, &data, addr, sizeof(T));
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CopyOut(tc, &data, addr, sizeof(T));
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data = TheISA::gtoh(data);
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data = MipsISA::gtoh(data);
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return true;
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return true;
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}
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}
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@ -77,7 +77,7 @@ class ThreadInfo
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Addr sp;
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Addr sp;
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if (!addr)
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if (!addr)
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addr = tc->readMiscRegNoEffect(0/*TheISA::IPR_PALtemp23*/);
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addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/);
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FunctionalPort *p = tc->getPhysPort();
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FunctionalPort *p = tc->getPhysPort();
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p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));
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@ -186,7 +186,7 @@ MiscRegFile::reset(std::string core_name, unsigned num_threads,
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num_threads, num_vpes);
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num_threads, num_vpes);
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cpu = _cpu;
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cpu = _cpu;
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TheISA::CoreSpecific &cp = cpu->coreParams;
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MipsISA::CoreSpecific &cp = cpu->coreParams;
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// Do Default CP0 initialization HERE
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// Do Default CP0 initialization HERE
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@ -159,7 +159,7 @@ StackTrace::trace(ThreadContext *_tc, bool is_call)
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// }
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// }
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// SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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// SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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// Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
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// Addr ksp = tc->readIntReg(MipsISA::StackPointerReg);
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// Addr bottom = ksp & ~0x3fff;
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// Addr bottom = ksp & ~0x3fff;
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// Addr addr;
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// Addr addr;
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@ -61,7 +61,7 @@ class ProcessInfo
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class StackTrace
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class StackTrace
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{
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{
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protected:
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protected:
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typedef TheISA::MachInst MachInst;
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typedef MipsISA::MachInst MachInst;
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private:
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private:
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ThreadContext *tc;
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ThreadContext *tc;
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std::vector<Addr> stack;
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std::vector<Addr> stack;
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@ -354,7 +354,7 @@ SparcLiveProcess::argsInit(int pageSize)
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// figure out argc
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// figure out argc
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IntType argc = argv.size();
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IntType argc = argv.size();
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IntType guestArgc = TheISA::htog(argc);
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IntType guestArgc = SparcISA::htog(argc);
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//Write out the sentry void *
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//Write out the sentry void *
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uint64_t sentry_NULL = 0;
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uint64_t sentry_NULL = 0;
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@ -366,12 +366,12 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
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void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest)
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void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest)
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{
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{
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// First loop through the integer registers.
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// First loop through the integer registers.
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for (int i = 0; i < TheISA::NumIntRegs; ++i) {
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for (int i = 0; i < SparcISA::NumIntRegs; ++i) {
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dest->setIntReg(i, src->readIntReg(i));
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dest->setIntReg(i, src->readIntReg(i));
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}
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}
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// Then loop through the floating point registers.
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// Then loop through the floating point registers.
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for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
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for (int i = 0; i < SparcISA::NumFloatRegs; ++i) {
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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}
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}
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@ -137,7 +137,7 @@
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#include "sim/system.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace std;
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using namespace TheISA;
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using namespace SparcISA;
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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: BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0)
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: BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0)
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@ -159,7 +159,7 @@ namespace SparcISA
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}
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}
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SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
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Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
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Addr ksp = tc->readIntReg(SparcISA::StackPointerReg);
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Addr bottom = ksp & ~0x3fff;
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Addr bottom = ksp & ~0x3fff;
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Addr addr;
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Addr addr;
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@ -61,7 +61,7 @@ namespace SparcISA
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class StackTrace
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class StackTrace
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{
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{
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protected:
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protected:
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typedef TheISA::MachInst MachInst;
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typedef SparcISA::MachInst MachInst;
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private:
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private:
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ThreadContext *tc;
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ThreadContext *tc;
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std::vector<Addr> stack;
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std::vector<Addr> stack;
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@ -105,8 +105,8 @@ using namespace X86ISA;
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M5_64_auxv_t::M5_64_auxv_t(int64_t type, int64_t val)
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M5_64_auxv_t::M5_64_auxv_t(int64_t type, int64_t val)
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{
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{
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a_type = TheISA::htog(type);
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a_type = X86ISA::htog(type);
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a_val = TheISA::htog(val);
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a_val = X86ISA::htog(val);
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}
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}
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X86LiveProcess::X86LiveProcess(LiveProcessParams * params,
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X86LiveProcess::X86LiveProcess(LiveProcessParams * params,
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@ -424,7 +424,7 @@ X86LiveProcess::argsInit(int intSize, int pageSize)
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// figure out argc
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// figure out argc
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uint64_t argc = argv.size();
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uint64_t argc = argv.size();
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uint64_t guestArgc = TheISA::htog(argc);
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uint64_t guestArgc = X86ISA::htog(argc);
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//Write out the sentry void *
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//Write out the sentry void *
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uint64_t sentry_NULL = 0;
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uint64_t sentry_NULL = 0;
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@ -157,7 +157,7 @@
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#include "cpu/thread_context.hh"
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#include "cpu/thread_context.hh"
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using namespace std;
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using namespace std;
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using namespace TheISA;
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using namespace X86ISA;
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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: BaseRemoteGDB(_system, c, NumGDBRegs)
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: BaseRemoteGDB(_system, c, NumGDBRegs)
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