Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its
python type of a latency. In addition, the multiple definitions of profile in the different cpu models caused problems for intialization of the interval value. If a child class's profile value was defined, the parent BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the multiple redifitions of profile in the child CPU classes.
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6248e12704
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8 changed files with 3 additions and 15 deletions
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@ -40,5 +40,3 @@ class CheckerCPU(BaseCPU):
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"If a load result is incorrect, only print a warning and do not exit")
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"If a load result is incorrect, only print a warning and do not exit")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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@ -357,7 +357,7 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
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BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
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: Event(&mainEventQueue), cpu(_cpu), interval(_interval)
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: Event(&mainEventQueue), cpu(_cpu), interval(_interval)
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{ }
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{ }
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@ -122,10 +122,10 @@ class BaseCPU : public MemObject
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{
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{
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private:
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private:
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BaseCPU *cpu;
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BaseCPU *cpu;
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int interval;
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Tick interval;
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public:
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public:
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ProfileEvent(BaseCPU *cpu, int interval);
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ProfileEvent(BaseCPU *cpu, Tick interval);
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void process();
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void process();
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};
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};
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ProfileEvent *profileEvent;
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ProfileEvent *profileEvent;
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@ -39,5 +39,3 @@ class O3Checker(BaseCPU):
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"If a load result is incorrect, only print a warning and do not exit")
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"If a load result is incorrect, only print a warning and do not exit")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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@ -40,8 +40,6 @@ class DerivOzoneCPU(BaseCPU):
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if build_env['USE_CHECKER']:
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if build_env['USE_CHECKER']:
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checker = Param.BaseCPU("Checker CPU")
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checker = Param.BaseCPU("Checker CPU")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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icache_port = Port("Instruction Port")
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icache_port = Port("Instruction Port")
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dcache_port = Port("Data Port")
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dcache_port = Port("Data Port")
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@ -39,5 +39,3 @@ class OzoneChecker(BaseCPU):
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"If a load result is incorrect, only print a warning and do not exit")
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"If a load result is incorrect, only print a warning and do not exit")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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@ -37,8 +37,6 @@ class AtomicSimpleCPU(BaseSimpleCPU):
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simulate_inst_stalls = Param.Bool(False, "Simulate icache stall cycles")
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simulate_inst_stalls = Param.Bool(False, "Simulate icache stall cycles")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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icache_port = Port("Instruction Port")
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icache_port = Port("Instruction Port")
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dcache_port = Port("Data Port")
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dcache_port = Port("Data Port")
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physmem_port = Port("Physical Memory Port")
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physmem_port = Port("Physical Memory Port")
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@ -34,8 +34,6 @@ class TimingSimpleCPU(BaseSimpleCPU):
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type = 'TimingSimpleCPU'
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type = 'TimingSimpleCPU'
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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if build_env['FULL_SYSTEM']:
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profile = Param.Latency('0ns', "trace the kernel stack")
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icache_port = Port("Instruction Port")
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icache_port = Port("Instruction Port")
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dcache_port = Port("Data Port")
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dcache_port = Port("Data Port")
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_mem_ports = BaseSimpleCPU._mem_ports + ['icache_port', 'dcache_port']
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_mem_ports = BaseSimpleCPU._mem_ports + ['icache_port', 'dcache_port']
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