sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

update platform code to use PALTemp Whami register to get cpu id

Browse source 
instead of reading register from tsunami chipset, saving an uncached
read
This commit is contained in:
Ali Saidi 2004-11-23 02:01:30 -05:00
parent 8b1db1cf98
commit 8cfbcbdb9c
2 changed files with 17 additions and 1910 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
system/alpha/palcode/platform_m5.s
View file

@ -750,8 +750,8 @@ sys_int_23:
sll r12,16,r12
lda r12,0x080(r12)
ldq_p r10,0(r12) // read misc register
and r10,0x3,r10 // isolate CPUID
mfpr r10, pt_whami // get CPU ID
extbl r10, 1, r10 // Isolate just whami bits
or r31,0x1,r14 // load r14 with bit to clear
sll r14,r10,r14 // left shift by CPU ID
sll r14,8,r14
@ -769,8 +769,8 @@ sys_int_22:
sll r12,16,r12
lda r12,0x080(r12)
ldq_p r10,0(r12) // read misc register
and r10,0x3,r10 // isolate CPUID
mfpr r10, pt_whami // get CPU ID
extbl r10, 1, r10 // Isolate just whami bits
or r31,0x10,r14 // load r14 with bit to clear
sll r14,r10,r14 // left shift by CPU ID
stq_p r14, 0(r12) // clear the rtc interrupt
@ -816,7 +816,8 @@ sys_int_21:
sll r13,8,r13
bis r12,r13,r12
lda r12,0x0080(r12)
ldqp r13, 0(r12) // read the MISC register for CPUID
mfpr r13, pt_whami // get CPU ID
extbl r13, 1, r10 // Isolate just whami bits
and r13,0x1,r14 // grab LSB and shift left 6
sll r14,6,r14

1894
system/alpha/palcode/platform_srcmax.s
View file

File diff suppressed because it is too large Load diff