Change IDE disk and ethernet device to work better with FreeBSD.
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/ide_disk.hh:
Add support for 32-bit accesses.
dev/ns_gige.cc:
Change default configuration register value to work with FreeBSD driver.
--HG--
extra : convert_revision : c9dd125338a97ffa8cd95293e6b7877068652387
This commit is contained in:
Benjamin Nash
parent
0460a78829
commit
8b04218262
4 changed files with 95 additions and 49 deletions
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@ -412,14 +412,10 @@ IdeController::read(MemReqPtr &req, uint8_t *data)
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{
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Addr offset;
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bool primary;
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bool byte;
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bool cmdBlk;
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RegType_t type;
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int disk;
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parseAddr(req->paddr, offset, primary, type);
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byte = (req->size == sizeof(uint8_t)) ? true : false;
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cmdBlk = (type == COMMAND_BLOCK) ? true : false;
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if (!io_enabled)
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return No_Fault;
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@ -430,11 +426,19 @@ IdeController::read(MemReqPtr &req, uint8_t *data)
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panic("IDE controller read of invalid size: %#x\n", req->size);
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if (type != BMI_BLOCK) {
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assert(req->size != sizeof(uint32_t));
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disk = getDisk(primary);
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if (disks[disk])
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disks[disk]->read(offset, byte, cmdBlk, data);
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if (req->size == sizeof(uint32_t) && offset == DATA_OFFSET) {
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*((uint16_t*)data) = disks[disk]->read(offset, type);
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*((uint16_t*)data + 1) = disks[disk]->read(offset, type);
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}
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else if (req->size == sizeof(uint8_t) && offset == DATA_OFFSET) {
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panic("IDE read of data reg invalid size: %#x\n", req->size);
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}
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else {
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*data = disks[disk]->read(offset, type);
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}
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} else {
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memcpy((void *)data, &bmi_regs[offset], req->size);
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}
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120
dev/ide_disk.cc
120
dev/ide_disk.cc
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@ -208,46 +208,61 @@ IdeDisk::bytesInDmaPage(Addr curAddr, uint32_t bytesLeft)
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// Device registers read/write
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////
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void
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IdeDisk::read(const Addr &offset, bool byte, bool cmdBlk, uint8_t *data)
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uint16_t
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IdeDisk::read(const Addr &offset, RegType_t type)
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{
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uint16_t data;
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DevAction_t action = ACT_NONE;
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if (cmdBlk) {
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if (offset < 0 || offset > sizeof(CommandReg_t))
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panic("Invalid disk command register offset: %#x\n", offset);
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if (type == COMMAND_BLOCK) {
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if (!byte && offset != DATA_OFFSET)
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panic("Invalid 16-bit read, only allowed on data reg\n");
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if (!byte)
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*(uint16_t *)data = *(uint16_t *)&cmdReg.data0;
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else
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*data = ((uint8_t *)&cmdReg)[offset];
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// determine if an action needs to be taken on the state machine
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if (offset == STATUS_OFFSET) {
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if (offset == STATUS_OFFSET)
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action = ACT_STAT_READ;
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*data = status; // status is in a shadow, explicity copy
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} else if (offset == DATA_OFFSET) {
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if (byte)
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action = ACT_DATA_READ_BYTE;
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else
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action = ACT_DATA_READ_SHORT;
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}
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else if (offset == DATA_OFFSET)
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action = ACT_DATA_READ_SHORT;
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} else {
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switch (offset) {
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case DATA_OFFSET:
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data = cmdReg.data;
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break;
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case ERROR_OFFSET:
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data = cmdReg.error;
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break;
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case NSECTOR_OFFSET:
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data = cmdReg.sec_count;
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break;
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case SECTOR_OFFSET:
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data = cmdReg.sec_num;
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break;
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case LCYL_OFFSET:
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data = cmdReg.cyl_low;
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break;
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case HCYL_OFFSET:
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data = cmdReg.cyl_high;
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break;
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case SELECT_OFFSET:
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data = cmdReg.drive;
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break;
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case STATUS_OFFSET:
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data = status;
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break;
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default:
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panic("Invalid IDE command register offset: %#x\n", offset);
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}
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}
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else if (type == CONTROL_BLOCK) {
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if (offset != ALTSTAT_OFFSET)
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panic("Invalid disk control register offset: %#x\n", offset);
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panic("Invalid IDE control register offset: %#x\n", offset);
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if (!byte)
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panic("Invalid 16-bit read from control block\n");
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*data = status;
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data = status;
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}
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if (action != ACT_NONE)
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updateState(action);
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return data;
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}
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void
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@ -263,9 +278,37 @@ IdeDisk::write(const Addr &offset, bool byte, bool cmdBlk, const uint8_t *data)
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panic("Invalid 16-bit write, only allowed on data reg\n");
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if (!byte)
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*((uint16_t *)&cmdReg.data0) = *(uint16_t *)data;
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else
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((uint8_t *)&cmdReg)[offset] = *data;
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*((uint16_t *)&cmdReg.data) = *(uint16_t *)data;
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else {
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switch (offset) {
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case DATA_OFFSET:
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cmdReg.data = *data;
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break;
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case FEATURES_OFFSET:
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cmdReg.features = *data;
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break;
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case NSECTOR_OFFSET:
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cmdReg.sec_count = *data;
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break;
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case SECTOR_OFFSET:
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cmdReg.sec_num = *data;
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break;
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case LCYL_OFFSET:
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cmdReg.cyl_low = *data;
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break;
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case HCYL_OFFSET:
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cmdReg.cyl_high = *data;
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break;
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case SELECT_OFFSET:
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cmdReg.drive = *data;
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break;
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case COMMAND_OFFSET:
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cmdReg.command = *data;
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break;
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default:
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panic("Invalid IDE command register offset: %#x\n", offset);
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}
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}
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// determine if an action needs to be taken on the state machine
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if (offset == COMMAND_OFFSET) {
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@ -746,9 +789,10 @@ IdeDisk::intrPost()
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intrPending = true;
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// talk to controller to set interrupt
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if (ctrl)
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if (ctrl){
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ctrl->bmi_regs[BMIS0] |= IDEINTS;
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ctrl->intrPost();
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}
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}
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void
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@ -867,7 +911,7 @@ IdeDisk::updateState(DevAction_t action)
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}
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// put the first two bytes into the data register
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memcpy((void *)&cmdReg.data0, (void *)dataBuffer,
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memcpy((void *)&cmdReg.data, (void *)dataBuffer,
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sizeof(uint16_t));
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if (!isIENSet()) {
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@ -896,7 +940,7 @@ IdeDisk::updateState(DevAction_t action)
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// copy next short into data registers
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if (drqBytesLeft)
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memcpy((void *)&cmdReg.data0,
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memcpy((void *)&cmdReg.data,
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(void *)&dataBuffer[SectorSize - drqBytesLeft],
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sizeof(uint16_t));
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}
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@ -969,7 +1013,7 @@ IdeDisk::updateState(DevAction_t action)
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} else {
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// copy the latest short into the data buffer
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memcpy((void *)&dataBuffer[SectorSize - drqBytesLeft],
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(void *)&cmdReg.data0,
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(void *)&cmdReg.data,
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sizeof(uint16_t));
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drqBytesLeft -= 2;
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@ -1093,8 +1137,7 @@ IdeDisk::serialize(ostream &os)
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SERIALIZE_ENUM(event);
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// Serialize device registers
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SERIALIZE_SCALAR(cmdReg.data0);
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SERIALIZE_SCALAR(cmdReg.data1);
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SERIALIZE_SCALAR(cmdReg.data);
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SERIALIZE_SCALAR(cmdReg.sec_count);
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SERIALIZE_SCALAR(cmdReg.sec_num);
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SERIALIZE_SCALAR(cmdReg.cyl_low);
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@ -1146,8 +1189,7 @@ IdeDisk::unserialize(Checkpoint *cp, const string §ion)
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}
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// Unserialize device registers
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UNSERIALIZE_SCALAR(cmdReg.data0);
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UNSERIALIZE_SCALAR(cmdReg.data1);
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UNSERIALIZE_SCALAR(cmdReg.data);
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UNSERIALIZE_SCALAR(cmdReg.sec_count);
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UNSERIALIZE_SCALAR(cmdReg.sec_num);
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UNSERIALIZE_SCALAR(cmdReg.cyl_low);
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@ -35,6 +35,7 @@
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#include "dev/disk_image.hh"
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#include "dev/ide_atareg.h"
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#include "dev/ide_ctrl.hh"
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#include "dev/ide_wdcreg.h"
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#include "dev/io_device.hh"
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#include "sim/eventq.hh"
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@ -103,9 +104,8 @@ class PrdTableEntry {
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#define DEV1 (1)
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typedef struct CommandReg {
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uint8_t data0;
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uint16_t data;
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union {
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uint8_t data1;
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uint8_t error;
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uint8_t features;
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};
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@ -272,7 +272,7 @@ class IdeDisk : public SimObject
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}
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// Device register read/write
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void read(const Addr &offset, bool byte, bool cmdBlk, uint8_t *data);
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uint16_t read(const Addr &offset, RegType_t type);
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void write(const Addr &offset, bool byte, bool cmdBlk, const uint8_t *data);
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// Start/abort functions
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@ -1359,7 +1359,7 @@ void
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NSGigE::regsReset()
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{
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memset(®s, 0, sizeof(regs));
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regs.config = CFGR_LNKSTS;
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regs.config = (CFGR_LNKSTS | CFGR_TBI_EN | CFGR_MODE_1000);
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regs.mear = 0x22;
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regs.txcfg = 0x120; // set drain threshold to 1024 bytes and
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// fill threshold to 32 bytes
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