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Make all StaticInst methods const. StaticInst objects represent a

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particular binary machine instruction and should be immutable after
they are constructed.

cpu/simple_cpu/simple_cpu.hh:
    Make StaticInst parameters const.

--HG--
extra : convert_revision : e535fa10c842ce173336323f39d9108c1847f8ba
This commit is contained in:
Steve Reinhardt 2005-02-25 21:44:33 -05:00
parent d697721f57
commit 89dc94f3bc
4 changed files with 95 additions and 68 deletions
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121
arch/alpha/isa_desc
View file

@ -187,15 +187,16 @@ output header {{
/// Print a register name for disassembly given the unique /// Print a register name for disassembly given the unique
/// dependence tag number (FP or int). /// dependence tag number (FP or int).
void printReg(std::ostream &os, int reg); void printReg(std::ostream &os, int reg) const;
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
void void
AlphaStaticInst::printReg(std::ostream &os, int reg) AlphaStaticInst::printReg(std::ostream &os, int reg) const
{ {
if (reg < FP_Base_DepTag) { if (reg < FP_Base_DepTag) {
ccprintf(os, "r%d", reg); ccprintf(os, "r%d", reg);
@ -206,7 +207,8 @@ output decoder {{
} }
std::string std::string
AlphaStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) AlphaStaticInst::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{ {
std::stringstream ss; std::stringstream ss;
@ -237,7 +239,7 @@ output decoder {{
// Declarations for execute() methods. // Declarations for execute() methods.
def template BasicExecDeclare {{ def template BasicExecDeclare {{
Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *); Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
}}; }};
// Basic instruction class declaration template. // Basic instruction class declaration template.
@ -267,7 +269,7 @@ def template BasicConstructor {{
// Basic instruction class execute method template. // Basic instruction class execute method template.
def template BasicExecute {{ def template BasicExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
Fault fault = No_Fault; Fault fault = No_Fault;
@ -330,14 +332,16 @@ output header {{
~Nop() { } ~Nop() { }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
%(BasicExecDeclare)s %(BasicExecDeclare)s
}; };
}}; }};
output decoder {{ output decoder {{
std::string Nop::generateDisassembly(Addr pc, const SymbolTable *symtab) std::string Nop::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{ {
#ifdef SS_COMPATIBLE_DISASSEMBLY #ifdef SS_COMPATIBLE_DISASSEMBLY
return originalDisassembly; return originalDisassembly;
@ -360,7 +364,7 @@ output decoder {{
output exec {{ output exec {{
Fault Fault
Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
{ {
return No_Fault; return No_Fault;
} }
@ -410,13 +414,14 @@ output header {{
{ {
} }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
std::string std::string
IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) IntegerImm::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
std::stringstream ss; std::stringstream ss;
@ -588,12 +593,13 @@ output header {{
} }
#if defined(linux) #if defined(linux)
int getC99RoundingMode(uint64_t fpcr_val); int getC99RoundingMode(uint64_t fpcr_val) const;
#endif #endif
// This differs from the AlphaStaticInst version only in // This differs from the AlphaStaticInst version only in
// printing suffixes for non-default rounding & trapping modes. // printing suffixes for non-default rounding & trapping modes.
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
@ -618,7 +624,7 @@ def template FloatingPointDecode {{
output decoder {{ output decoder {{
#if defined(linux) #if defined(linux)
int int
AlphaFP::getC99RoundingMode(uint64_t fpcr_val) AlphaFP::getC99RoundingMode(uint64_t fpcr_val) const
{ {
if (roundingMode == Dynamic) { if (roundingMode == Dynamic) {
return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)]; return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)];
@ -630,7 +636,7 @@ output decoder {{
#endif #endif
std::string std::string
AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
std::string mnem_str(mnemonic); std::string mnem_str(mnemonic);
@ -751,7 +757,8 @@ output header {{
{ {
} }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
public: public:
@ -796,21 +803,22 @@ output header {{
{ {
} }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
std::string std::string
Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
return csprintf("%-10s %c%d,%d(r%d)", mnemonic, return csprintf("%-10s %c%d,%d(r%d)", mnemonic,
flags[IsFloating] ? 'f' : 'r', RA, MEMDISP, RB); flags[IsFloating] ? 'f' : 'r', RA, MEMDISP, RB);
} }
std::string std::string
MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
return csprintf("%-10s (r%d)", mnemonic, RB); return csprintf("%-10s (r%d)", mnemonic, RB);
} }
@ -894,7 +902,7 @@ def template LoadStoreConstructor {{
def template EACompExecute {{ def template EACompExecute {{
Fault Fault
%(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc, %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
Addr EA; Addr EA;
Fault fault = No_Fault; Fault fault = No_Fault;
@ -916,7 +924,7 @@ def template EACompExecute {{
def template MemAccExecute {{ def template MemAccExecute {{
Fault Fault
%(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
Addr EA; Addr EA;
Fault fault = No_Fault; Fault fault = No_Fault;
@ -950,7 +958,7 @@ def template MemAccExecute {{
def template LoadStoreExecute {{ def template LoadStoreExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
Addr EA; Addr EA;
Fault fault = No_Fault; Fault fault = No_Fault;
@ -984,7 +992,7 @@ def template LoadStoreExecute {{
def template PrefetchExecute {{ def template PrefetchExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
Addr EA; Addr EA;
Fault fault = No_Fault; Fault fault = No_Fault;
@ -1158,9 +1166,9 @@ output header {{
{ {
protected: protected:
/// Cached program counter from last disassembly /// Cached program counter from last disassembly
Addr cachedPC; mutable Addr cachedPC;
/// Cached symbol table pointer from last disassembly /// Cached symbol table pointer from last disassembly
const SymbolTable *cachedSymtab; mutable const SymbolTable *cachedSymtab;
/// Constructor /// Constructor
PCDependentDisassembly(const char *mnem, MachInst _machInst, PCDependentDisassembly(const char *mnem, MachInst _machInst,
@ -1170,7 +1178,8 @@ output header {{
{ {
} }
const std::string &disassemble(Addr pc, const SymbolTable *symtab); const std::string &
disassemble(Addr pc, const SymbolTable *symtab) const;
}; };
/** /**
@ -1192,7 +1201,8 @@ output header {{
Addr branchTarget(Addr branchPC) const; Addr branchTarget(Addr branchPC) const;
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
/** /**
@ -1216,7 +1226,8 @@ output header {{
Addr branchTarget(ExecContext *xc) const; Addr branchTarget(ExecContext *xc) const;
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
@ -1236,7 +1247,8 @@ output decoder {{
} }
const std::string & const std::string &
PCDependentDisassembly::disassemble(Addr pc, const SymbolTable *symtab) PCDependentDisassembly::disassemble(Addr pc,
const SymbolTable *symtab) const
{ {
if (!cachedDisassembly || if (!cachedDisassembly ||
pc != cachedPC || symtab != cachedSymtab) pc != cachedPC || symtab != cachedSymtab)
@ -1254,7 +1266,7 @@ output decoder {{
} }
std::string std::string
Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
std::stringstream ss; std::stringstream ss;
@ -1292,7 +1304,7 @@ output decoder {{
} }
std::string std::string
Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
std::stringstream ss; std::stringstream ss;
@ -1391,13 +1403,15 @@ output header {{
{ {
} }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
std::string std::string
EmulatedCallPal::generateDisassembly(Addr pc, const SymbolTable *symtab) EmulatedCallPal::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{ {
#ifdef SS_COMPATIBLE_DISASSEMBLY #ifdef SS_COMPATIBLE_DISASSEMBLY
return csprintf("%s %s", "call_pal", mnemonic); return csprintf("%s %s", "call_pal", mnemonic);
@ -1433,7 +1447,8 @@ output header {{
CallPalBase(const char *mnem, MachInst _machInst, CallPalBase(const char *mnem, MachInst _machInst,
OpClass __opClass); OpClass __opClass);
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
@ -1463,7 +1478,7 @@ output decoder {{
} }
std::string std::string
CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) CallPalBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
return csprintf("%-10s %#x", "call_pal", palFunc); return csprintf("%-10s %#x", "call_pal", palFunc);
} }
@ -1498,7 +1513,8 @@ output header {{
StaticInstPtr<AlphaISA> _eaCompPtr = nullStaticInstPtr, StaticInstPtr<AlphaISA> _eaCompPtr = nullStaticInstPtr,
StaticInstPtr<AlphaISA> _memAccPtr = nullStaticInstPtr); StaticInstPtr<AlphaISA> _memAccPtr = nullStaticInstPtr);
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
@ -1520,7 +1536,7 @@ output decoder {{
} }
std::string std::string
HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) HwLoadStore::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
#ifdef SS_COMPATIBLE_DISASSEMBLY #ifdef SS_COMPATIBLE_DISASSEMBLY
return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB); return csprintf("%-10s r%d,%d(r%d)", mnemonic, RA, disp, RB);
@ -1571,13 +1587,14 @@ output header {{
{ {
} }
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
std::string std::string
HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) HwMoveIPR::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
if (_numSrcRegs > 0) { if (_numSrcRegs > 0) {
// must be mtpr // must be mtpr
@ -1628,7 +1645,8 @@ output header {{
%(BasicExecDeclare)s %(BasicExecDeclare)s
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
/** /**
@ -1644,7 +1662,7 @@ output header {{
{ {
private: private:
/// Have we warned on this instruction yet? /// Have we warned on this instruction yet?
bool warned; mutable bool warned;
public: public:
/// Constructor /// Constructor
@ -1658,19 +1676,22 @@ output header {{
%(BasicExecDeclare)s %(BasicExecDeclare)s
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
output decoder {{ output decoder {{
std::string std::string
FailUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) FailUnimplemented::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{ {
return csprintf("%-10s (unimplemented)", mnemonic); return csprintf("%-10s (unimplemented)", mnemonic);
} }
std::string std::string
WarnUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) WarnUnimplemented::generateDisassembly(Addr pc,
const SymbolTable *symtab) const
{ {
#ifdef SS_COMPATIBLE_DISASSEMBLY #ifdef SS_COMPATIBLE_DISASSEMBLY
return csprintf("%-10s", mnemonic); return csprintf("%-10s", mnemonic);
@ -1683,7 +1704,7 @@ output decoder {{
output exec {{ output exec {{
Fault Fault
FailUnimplemented::execute(%(CPU_exec_context)s *xc, FailUnimplemented::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
panic("attempt to execute unimplemented instruction '%s' " panic("attempt to execute unimplemented instruction '%s' "
"(inst 0x%08x, opcode 0x%x)", mnemonic, machInst, OPCODE); "(inst 0x%08x, opcode 0x%x)", mnemonic, machInst, OPCODE);
@ -1692,7 +1713,7 @@ output exec {{
Fault Fault
WarnUnimplemented::execute(%(CPU_exec_context)s *xc, WarnUnimplemented::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) Trace::InstRecord *traceData) const
{ {
if (!warned) { if (!warned) {
warn("instruction '%s' unimplemented\n", mnemonic); warn("instruction '%s' unimplemented\n", mnemonic);
@ -1734,7 +1755,8 @@ output header {{
%(BasicExecDeclare)s %(BasicExecDeclare)s
std::string generateDisassembly(Addr pc, const SymbolTable *symtab); std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
}; };
}}; }};
@ -1745,7 +1767,7 @@ output header {{
output decoder {{ output decoder {{
std::string std::string
Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{ {
return csprintf("%-10s (inst 0x%x, opcode 0x%x)", return csprintf("%-10s (inst 0x%x, opcode 0x%x)",
"unknown", machInst, OPCODE); "unknown", machInst, OPCODE);
@ -1754,7 +1776,8 @@ output decoder {{
output exec {{ output exec {{
Fault Fault
Unknown::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) Unknown::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{ {
panic("attempt to execute unknown instruction " panic("attempt to execute unknown instruction "
"(inst 0x%08x, opcode 0x%x)", machInst, OPCODE); "(inst 0x%08x, opcode 0x%x)", machInst, OPCODE);

16
cpu/simple_cpu/simple_cpu.hh
View file

@ -259,47 +259,47 @@ class SimpleCPU : public BaseCPU
// storage (which is pretty hard to imagine they would have reason // storage (which is pretty hard to imagine they would have reason
// to do). // to do).
uint64_t readIntReg(StaticInst<TheISA> *si, int idx) uint64_t readIntReg(const StaticInst<TheISA> *si, int idx)
{ {
return xc->readIntReg(si->srcRegIdx(idx)); return xc->readIntReg(si->srcRegIdx(idx));
} }
float readFloatRegSingle(StaticInst<TheISA> *si, int idx) float readFloatRegSingle(const StaticInst<TheISA> *si, int idx)
{ {
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegSingle(reg_idx); return xc->readFloatRegSingle(reg_idx);
} }
double readFloatRegDouble(StaticInst<TheISA> *si, int idx) double readFloatRegDouble(const StaticInst<TheISA> *si, int idx)
{ {
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegDouble(reg_idx); return xc->readFloatRegDouble(reg_idx);
} }
uint64_t readFloatRegInt(StaticInst<TheISA> *si, int idx) uint64_t readFloatRegInt(const StaticInst<TheISA> *si, int idx)
{ {
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegInt(reg_idx); return xc->readFloatRegInt(reg_idx);
} }
void setIntReg(StaticInst<TheISA> *si, int idx, uint64_t val) void setIntReg(const StaticInst<TheISA> *si, int idx, uint64_t val)
{ {
xc->setIntReg(si->destRegIdx(idx), val); xc->setIntReg(si->destRegIdx(idx), val);
} }
void setFloatRegSingle(StaticInst<TheISA> *si, int idx, float val) void setFloatRegSingle(const StaticInst<TheISA> *si, int idx, float val)
{ {
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegSingle(reg_idx, val); xc->setFloatRegSingle(reg_idx, val);
} }
void setFloatRegDouble(StaticInst<TheISA> *si, int idx, double val) void setFloatRegDouble(const StaticInst<TheISA> *si, int idx, double val)
{ {
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegDouble(reg_idx, val); xc->setFloatRegDouble(reg_idx, val);
} }
void setFloatRegInt(StaticInst<TheISA> *si, int idx, uint64_t val) void setFloatRegInt(const StaticInst<TheISA> *si, int idx, uint64_t val)
{ {
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag; int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegInt(reg_idx, val); xc->setFloatRegInt(reg_idx, val);

2
cpu/static_inst.cc
View file

@ -68,7 +68,7 @@ StaticInst<AlphaISA>::nullStaticInstPtr;
template <class ISA> template <class ISA>
bool bool
StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const
{ {
if (isDirectCtrl()) { if (isDirectCtrl()) {
tgt = branchTarget(pc); tgt = branchTarget(pc);

22
cpu/static_inst.hh
View file

@ -285,13 +285,13 @@ class StaticInst : public StaticInstBase
* String representation of disassembly (lazily evaluated via * String representation of disassembly (lazily evaluated via
* disassemble()). * disassemble()).
*/ */
std::string *cachedDisassembly; mutable std::string *cachedDisassembly;
/** /**
* Internal function to generate disassembly string. * Internal function to generate disassembly string.
*/ */
virtual std::string generateDisassembly(Addr pc, virtual std::string
const SymbolTable *symtab) = 0; generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
/// Constructor. /// Constructor.
StaticInst(const char *_mnemonic, MachInst _machInst, OpClass __opClass) StaticInst(const char *_mnemonic, MachInst _machInst, OpClass __opClass)
@ -311,23 +311,27 @@ class StaticInst : public StaticInstBase
/** /**
* Execute this instruction under SimpleCPU model. * Execute this instruction under SimpleCPU model.
*/ */
virtual Fault execute(SimpleCPU *xc, Trace::InstRecord *traceData) = 0; virtual Fault execute(SimpleCPU *xc,
Trace::InstRecord *traceData) const = 0;
/** /**
* Execute this instruction under InorderCPU model. * Execute this instruction under InorderCPU model.
*/ */
virtual Fault execute(InorderCPU *xc, Trace::InstRecord *traceData) = 0; virtual Fault execute(InorderCPU *xc,
Trace::InstRecord *traceData) const = 0;
/** /**
* Execute this instruction under FastCPU model. * Execute this instruction under FastCPU model.
*/ */
virtual Fault execute(FastCPU *xc, Trace::InstRecord *traceData) = 0; virtual Fault execute(FastCPU *xc,
Trace::InstRecord *traceData) const = 0;
/** /**
* Execute this instruction under detailed FullCPU model. * Execute this instruction under detailed FullCPU model.
*/ */
virtual Fault execute(DynInst *xc, Trace::InstRecord *traceData) = 0; virtual Fault execute(DynInst *xc,
Trace::InstRecord *traceData) const = 0;
/** /**
* Return the target address for a PC-relative branch. * Return the target address for a PC-relative branch.
@ -357,7 +361,7 @@ class StaticInst : public StaticInstBase
* Return true if the instruction is a control transfer, and if so, * Return true if the instruction is a control transfer, and if so,
* return the target address as well. * return the target address as well.
*/ */
bool hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt); bool hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const;
/** /**
* Return string representation of disassembled instruction. * Return string representation of disassembled instruction.
@ -367,7 +371,7 @@ class StaticInst : public StaticInstBase
* should not be cached, this function should be overridden directly. * should not be cached, this function should be overridden directly.
*/ */
virtual const std::string &disassemble(Addr pc, virtual const std::string &disassemble(Addr pc,
const SymbolTable *symtab = 0) const SymbolTable *symtab = 0) const
{ {
if (!cachedDisassembly) if (!cachedDisassembly)
cachedDisassembly = cachedDisassembly =