ARM: Implement the SADD8 and SADD16 instructions.
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d70c31437a
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@ -73,6 +73,7 @@ let {{
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"llbit": (oldC, oldC, oldC),
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"llbit": (oldC, oldC, oldC),
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"saturate": ('0', '0', '0'),
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"saturate": ('0', '0', '0'),
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"overflow": ('0', '0', '0'),
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"overflow": ('0', '0', '0'),
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"ge": ('0', '0', '0'),
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"add": ('findCarry(32, resTemp, Op1, secondOp)',
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"add": ('findCarry(32, resTemp, Op1, secondOp)',
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'findCarry(32, resTemp, Op1, secondOp)',
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'findCarry(32, resTemp, Op1, secondOp)',
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'findCarry(32, resTemp, Op1, secondOp)'),
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'findCarry(32, resTemp, Op1, secondOp)'),
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@ -92,6 +93,7 @@ let {{
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"llbit": oldV,
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"llbit": oldV,
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"saturate": '0',
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"saturate": '0',
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"overflow": '0',
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"overflow": '0',
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"ge": '0',
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"add": 'findOverflow(32, resTemp, Op1, secondOp)',
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"add": 'findOverflow(32, resTemp, Op1, secondOp)',
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"sub": 'findOverflow(32, resTemp, Op1, ~secondOp)',
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"sub": 'findOverflow(32, resTemp, Op1, ~secondOp)',
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"rsb": 'findOverflow(32, resTemp, secondOp, ~Op1)',
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"rsb": 'findOverflow(32, resTemp, secondOp, ~Op1)',
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@ -150,7 +152,7 @@ let {{
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if flagType == "saturate":
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if flagType == "saturate":
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regCcCode = calcQCode
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regCcCode = calcQCode
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elif flagType == "ge":
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elif flagType == "ge":
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immCcCode = calcGECode
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regCcCode = calcGECode
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else:
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else:
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regCcCode = calcCcCode % {
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regCcCode = calcCcCode % {
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"icValue": secondOpRe.sub(regOp2, cCode[1]),
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"icValue": secondOpRe.sub(regOp2, cCode[1]),
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@ -188,7 +190,7 @@ let {{
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if flagType == "saturate":
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if flagType == "saturate":
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regRegCcCode = calcQCode
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regRegCcCode = calcQCode
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elif flagType == "ge":
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elif flagType == "ge":
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immCcCode = calcGECode
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regRegCcCode = calcGECode
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else:
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else:
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regRegCcCode = calcCcCode % {
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regRegCcCode = calcCcCode % {
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"icValue": secondOpRe.sub(regRegOp2, cCode[2]),
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"icValue": secondOpRe.sub(regRegOp2, cCode[2]),
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@ -360,4 +362,37 @@ let {{
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replaceBits(resTemp, 31, 16, midRes);
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replaceBits(resTemp, 31, 16, midRes);
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Dest = resTemp;
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Dest = resTemp;
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''', flagType="none", buildCc=False)
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''', flagType="none", buildCc=False)
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buildRegDataInst("sadd8", '''
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uint32_t geBits = 0;
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resTemp = 0;
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for (unsigned i = 0; i < 4; i++) {
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int high = (i + 1) * 8 - 1;
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int low = i * 8;
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int32_t midRes = sext<8>(bits(Op1, high, low)) +
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sext<8>(bits(Op2, high, low));
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replaceBits(resTemp, high, low, midRes);
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if (midRes >= 0) {
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geBits = geBits | (1 << i);
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}
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}
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Dest = resTemp;
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resTemp = geBits;
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''', flagType="ge", buildNonCc=False)
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buildRegDataInst("sadd16", '''
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uint32_t geBits = 0;
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resTemp = 0;
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for (unsigned i = 0; i < 2; i++) {
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int high = (i + 1) * 16 - 1;
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int low = i * 16;
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int32_t midRes = sext<16>(bits(Op1, high, low)) +
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sext<16>(bits(Op2, high, low));
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replaceBits(resTemp, high, low, midRes);
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if (midRes >= 0) {
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geBits = geBits | (0x3 << (i * 2));
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}
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}
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Dest = resTemp;
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resTemp = geBits;
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''', flagType="ge", buildNonCc=False)
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}};
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}};
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