Implement a handful more instructions and differentiate macroops based on the operand types they expect.
--HG-- extra : convert_revision : f9c8e694a8c0eb33b988657dca03ab495b65bee8
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6 changed files with 95 additions and 15 deletions
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@ -163,11 +163,11 @@
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0x7: dec_eDI();
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}
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0x0A: decode OPCODE_OP_BOTTOM3 {
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0x0: push_rAX();
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0x0: Inst::PUSH(rAx);
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0x1: push_rCX();
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0x2: push_rDX();
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0x3: push_rBX();
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0x4: push_rSP();
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0x4: Inst::PUSH(rSP);
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0x5: push_rBP();
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0x6: push_rSI();
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0x7: push_rDI();
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@ -230,7 +230,17 @@
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0x0: group1_Eb_Ib();
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0x1: group1_Ev_Iz();
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0x2: group1_Eb_Ib();
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0x3: group1_Ev_Ib();
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//0x3: group1_Ev_Ib();
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0x3: decode MODRM_REG {
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0x0: add_Eb_Ib();
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0x1: or_Eb_Ib();
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0x2: adc_Eb_Ib();
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0x3: sbb_Eb_Ib();
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0x4: Inst::AND(Eb,Ib);
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0x5: sub_Eb_Ib();
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0x6: xor_Eb_Ib();
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0x7: cmp_Eb_Ib();
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}
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0x4: test_Eb_Gb();
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0x5: test_Ev_Gv();
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0x6: xchg_Eb_Gb();
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@ -313,8 +323,14 @@
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0x3: ret_near();
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0x4: les_Gz_Mp();
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0x5: lds_Gz_Mp();
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0x6: group12_Eb_Ib();
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0x7: group12_Ev_Iz();
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//0x6: group12_Eb_Ib();
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0x6: decode MODRM_REG {
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0x0: Inst::MOV(Eb,Ib);
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}
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//0x7: group12_Ev_Iz();
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0x7: decode MODRM_REG {
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0x0: Inst::MOV(Ev,Iz);
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}
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}
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0x19: decode OPCODE_OP_BOTTOM3 {
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0x0: enter_Iw_Ib();
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@ -70,8 +70,8 @@ def format Inst(*opTypeSet) {{
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def format MultiInst(switchVal, *opTypeSets) {{
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switcher = {}
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for (count, opTypeSet) in zip(xrange(len(opTypeSets)), opTypeSets):
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switcher[count] = (opTypeSet, EmulEnv())
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blocks = doSplitDecode(Name, specializeInst, switchVal, switcher)
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switcher[count] = (Name, opTypeSet, EmulEnv())
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blocks = doSplitDecode(specializeInst, switchVal, switcher)
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(header_output, decoder_output,
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decode_block, exec_output) = blocks.makeList()
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}};
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@ -54,9 +54,26 @@
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# Authors: Gabe Black
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microcode = '''
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def macroop MOV{
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def macroop MOV_R_R {
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mov "env.reg", "env.reg", "env.regm"
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};
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def macroop MOV_M_R {
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#Do a store to put the register operand into memory
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};
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def macroop MOV_R_M {
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#Do a load to fill the register operand from memory
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};
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def macroop MOV_R_I {
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limm "env.reg", "env.immediate"
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};
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def macroop MOV_M_I {
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limm "env.reg", "env.immediate"
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#Do a store to put the register operand into memory
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};
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'''
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#let {{
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# class MOV(Inst):
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@ -54,11 +54,17 @@
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# Authors: Gabe Black
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microcode = '''
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def macroop POP {
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def macroop POP_R {
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.adjust_env "if(machInst.mode.submode == SixtyFourBitMode && env.dataSize == 4) env.dataSize = 8\;"
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# There needs to be a load here to actually "pop" the data
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addi "INTREG_RSP", "INTREG_RSP", "env.dataSize"
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};
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def macroop PUSH_R {
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.adjust_env "if(machInst.mode.submode == SixtyFourBitMode && env.dataSize == 4) env.dataSize = 8\;"
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subi "INTREG_RSP", "INTREG_RSP", "env.dataSize"
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# There needs to be a store here to actually "push" the data
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};
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'''
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#let {{
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# class POP(Inst):
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@ -54,10 +54,43 @@
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# Authors: Gabe Black
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microcode = '''
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def macroop XOR
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def macroop XOR_R_R
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{
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xor "env.reg", "env.reg", "env.regm"
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};
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def macroop XOR_R_I
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{
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limm "NUM_INTREGS", "env.immediate"
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xor "env.reg", "env.reg", "NUM_INTREGS"
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};
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def macroop XOR_M_R
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{
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#Do a load to get one of the sources
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xor "NUM_INTREGS", "NUM_INTREGS", "env.reg"
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#Do a store to write the destination
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};
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def macroop XOR_R_M
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{
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#Do a load to get one of the sources
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xor "env.reg", "env.reg", "NUM_INTREGS"
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};
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def macroop AND_R_I
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{
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limm "NUM_INTREGS", "env.immediate"
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and "env.reg", "env.reg", "NUM_INTREGS"
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};
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def macroop AND_M_I
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{
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#Do a load to get one of the sources
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limm "NUM_INTREGS", "env.immediate"
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and "NUM_INTREGS", "NUM_INTREGS", "NUM_INTREGS+1"
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#Do a store to write the destination
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};
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'''
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#let {{
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#microcodeString = '''
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@ -66,16 +66,16 @@ let {{
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# vals is a dict which matches case values with what should be decoded to.
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# builder is called on the exploded contents of "vals" values to generate
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# whatever code should be used.
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def doSplitDecode(Name, builder, switchVal, vals, default = None):
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def doSplitDecode(builder, switchVal, vals, default = None):
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blocks = OutputBlocks()
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blocks.decode_block = 'switch(%s) {\n' % switchVal
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for (val, todo) in vals.items():
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new_blocks = builder(Name, *todo)
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new_blocks = builder(*todo)
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new_blocks.decode_block = \
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'\tcase %s: %s\n' % (val, new_blocks.decode_block)
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blocks.append(new_blocks)
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if default:
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new_blocks = builder(Name, *default)
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new_blocks = builder(*default)
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new_blocks.decode_block = \
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'\tdefault: %s\n' % new_blocks.decode_block
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blocks.append(new_blocks)
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@ -120,11 +120,13 @@ let {{
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print "word"
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else:
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print "Didn't recognize fixed register size %s!" % opType.rsize
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Name += "_R"
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elif opType.tag == None or opType.size == None:
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raise Exception, "Problem parsing operand tag: %s" % opType.tag
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elif opType.tag in ("C", "D", "G", "P", "S", "T", "V"):
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# Use the "reg" field of the ModRM byte to select the register
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env.addReg(ModRMRegIndex)
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Name += "_R"
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elif opType.tag in ("E", "Q", "W"):
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# This might refer to memory or to a register. We need to
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# divide it up farther.
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@ -132,27 +134,33 @@ let {{
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regTypes.pop(0)
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regEnv = copy.copy(env)
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regEnv.addReg(ModRMRMIndex)
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regName = Name + "_R"
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# This needs to refer to memory, but we'll fill in the details
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# later. It needs to take into account unaligned memory
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# addresses.
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memTypes = copy.copy(opTypes)
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memTypes.pop(0)
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memEnv = copy.copy(env)
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memName = Name + "_M"
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print "%0"
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return doSplitDecode(Name, specializeInst, "MODRM_MOD",
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{"3" : (regTypes, regEnv)}, (memTypes, memEnv))
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return doSplitDecode(specializeInst, "MODRM_MOD",
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{"3" : (regName, regTypes, regEnv)},
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(memName, memTypes, memEnv))
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elif opType.tag in ("I", "J"):
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# Immediates
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print "IMMEDIATE"
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Name += "_I"
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elif opType.tag == "M":
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# This needs to refer to memory, but we'll fill in the details
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# later. It needs to take into account unaligned memory
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# addresses.
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print "%0"
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Name += "_M"
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elif opType.tag in ("PR", "R", "VR"):
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# There should probably be a check here to verify that mod
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# is equal to 11b
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env.addReg(ModRMRMIndex)
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Name += "_R"
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else:
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raise Exception, "Unrecognized tag %s." % opType.tag
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opTypes.pop(0)
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