sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

dev: Correctly clear interrupts in VirtIO PCI

Browse source 
Correctly clear the PCI interrupt belonging to a VirtIO device when
the ISR register is read.
This commit is contained in:
Andreas Sandberg 2015-02-03 14:25:47 -05:00
parent b34b55b597
commit 851b29ad20
1 changed files with 5 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/dev/virtio/pci.cc
View file

@ -123,8 +123,11 @@ PciVirtIO::read(PacketPtr pkt)
case OFF_ISR_STATUS: {
DPRINTF(VIOPci, " ISR_STATUS\n");
assert(size == sizeof(uint8_t));
uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
interruptDeliveryPending = false;
const uint8_t isr_status(interruptDeliveryPending ? 1 : 0);
if (interruptDeliveryPending) {
interruptDeliveryPending = false;
intrClear();
}
pkt->set<uint8_t>(isr_status);
} break;