From 83f7e7afaf962a6f7967c3ace00a85c58508e2e9 Mon Sep 17 00:00:00 2001 From: Andrew Bardsley Date: Thu, 16 Oct 2014 05:49:54 -0400 Subject: [PATCH] sim: SystemC hosting This patch hosts gem5 onto SystemC scheduler. There's already an upstream review board patch that does something similar but this patch ...: 1) is less obtrusive to the existing gem5 code organisation. It's divided into the 'generic' preparatory patches (already submitted) and this patch which affects no existing files 2) does not try to exactly track the gem5 event queue with notifys into SystemC and so doesn't requive the event queue to be modified for anything other than 'out of event queue' scheduling events 3) supports debug logging with SC_REPORT The patch consists of the files: util/systemc/ sc_gem5_control.{cc,hh} -- top level objects to use to instantiate gem5 Systems within larger SystemC test harnesses as sc_module objects sc_logger.{cc,hh} -- logging support sc_module.{cc,hh} -- a separated event loop specific to SystemC stats.{cc,hh} -- example Stats handling for the sample top level main.{cc,hh} -- a sample top level On the downside this patch is only currently functional with C++ configuration at the top level. The above sc_... files are indended to be compiled alongside gem5 (as a library, see main.cc for a command line and util/systemc/README for more details.) The top-level system instantiation in sc_gem5_control.{cc,hh} provides two classes: Gem5Control and Gem5System Gem5Control is a simulation control class (from which a singleton object should be created) derived from Gem5SystemC::Module which carries the top level simulation control interface for gem5. This includes hosting a system-building configuration file and instantiating the Root object from that file. Gem5System is a base class for instantiating renamed gem5 Systems from the config file hosted by the Gem5Control object. In use, a SystemC module class should be made which represents the desired, instantiable gem5 System. That class's instances should create a Gem5System during their construction, set the parameters of that system and then call instantiate to build that system. If this is all carried out in the sc_core::sc_module-derived classes constructor, the System's external ports will become children of that module and can then be recovered by name using sc_core:: sc_find_object. It is intended that this interface is used with dlopen. To that end, the header file sc_gem5_control.hh includes no other header files from gem5 (and so can be easily copied into another project). The classes Gem5System and Gem5Control have all their member functions declared `virtual' so that those functions can be called through the vtable acquired by building the top level Gem5Control using dlsym(..., "makeGem5Control") and `makeSystem' on the Gem5Control. --- util/systemc/Makefile | 69 ++++++ util/systemc/README | 59 +++++ util/systemc/main.cc | 379 ++++++++++++++++++++++++++++++++ util/systemc/sc_gem5_control.cc | 248 +++++++++++++++++++++ util/systemc/sc_gem5_control.hh | 154 +++++++++++++ util/systemc/sc_logger.cc | 152 +++++++++++++ util/systemc/sc_logger.hh | 80 +++++++ util/systemc/sc_module.cc | 231 +++++++++++++++++++ util/systemc/sc_module.hh | 152 +++++++++++++ util/systemc/stats.cc | 115 ++++++++++ util/systemc/stats.hh | 61 +++++ 11 files changed, 1700 insertions(+) create mode 100644 util/systemc/Makefile create mode 100644 util/systemc/README create mode 100644 util/systemc/main.cc create mode 100644 util/systemc/sc_gem5_control.cc create mode 100644 util/systemc/sc_gem5_control.hh create mode 100644 util/systemc/sc_logger.cc create mode 100644 util/systemc/sc_logger.hh create mode 100644 util/systemc/sc_module.cc create mode 100644 util/systemc/sc_module.hh create mode 100644 util/systemc/stats.cc create mode 100644 util/systemc/stats.hh diff --git a/util/systemc/Makefile b/util/systemc/Makefile new file mode 100644 index 000000000..da9b28866 --- /dev/null +++ b/util/systemc/Makefile @@ -0,0 +1,69 @@ +# Copyright (c) 2012-2014 ARM Limited +# All rights reserved +# +# The license below extends only to copyright in the software and shall +# not be construed as granting a license to any other intellectual +# property including but not limited to intellectual property relating +# to a hardware implementation of the functionality of the software +# licensed hereunder. You may use the software subject to the license +# terms below provided that you ensure that this notice is replicated +# unmodified and in its entirety in all distributions of the software, +# modified or unmodified, in source code or in binary form. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Andrew Bardsley + +ARCH = ARM +VARIANT = opt + +SYSTEMC_INC = ./systemc/include +SYSTEMC_LIB = ./systemc/lib-linux64 + +CXXFLAGS = -I../../build/$(ARCH) -L../../build/$(ARCH) +CXXFLAGS += -I$(SYSTEMC_INC) -L$(SYSTEMC_LIB) +CXXFLAGS += -std=c++0x +CXXFLAGS += -g +LIBS = -lgem5_$(VARIANT) -lsystemc + +ALL = gem5.$(VARIANT).sc + +all: $(ALL) + +.cc.o: + $(CXX) $(CXXFLAGS) -c -o $@ $< + +sc_gem5_control.o: sc_gem5_control.cc sc_gem5_control.hh +sc_logger.o: sc_logger.cc sc_logger.hh +sc_module.o: sc_module.cc sc_module.hh +stats.o: stats.cc stats.hh +main.o: main.cc sc_logger.hh sc_module.hh stats.hh + +gem5.$(VARIANT).sc: main.o stats.o \ + sc_gem5_control.o sc_logger.o sc_module.o + $(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS) + +clean: + $(RM) $(ALL) + $(RM) -r m5out diff --git a/util/systemc/README b/util/systemc/README new file mode 100644 index 000000000..a886e0220 --- /dev/null +++ b/util/systemc/README @@ -0,0 +1,59 @@ +This directory contains a demo of C++ configuration of gem5. The intention +is to provide a mechanism to allow pre-generated config.ini files generated +by Python-based gem5 to be reloaded in library-base versions of gem5 +embedded in other systems using C++ calls for simulation control. + +This directory contain a demo of hosting a C++ configured version of gem5 +onto SystemC's event loop. The hosting is achieved by replacing 'simulate' +with a SystemC object which implements an event loop using SystemC scheduler +mechanisms. + +The sc_... files here should probably be hosted in a diferent directory and +buildable as a library. + +Files: + + main.cc -- demonstration top level + sc_logger.{cc,hh} -- rehosting of DPRINTF onto SC_REPORT + sc_module.{cc,hh} -- SystemC simulation loop base class + sc_gem5_control.{cc,hh} -- Alternative extra wrapping to allow gem5 + Systems to be instantiated as single + sc_module objects. + stats.{cc,hh} -- Stats dumping (copied from util/cxx_config) + +Read main.cc for more details of the implementation and sc_... files for + +To build: + +First build gem5 as a library with cxx-config support and (optionally) +without python. Also build a normal gem5 (cxx-config not needed, Python +needed): + +> cd ../.. +> scons build/ARM/gem5.opt +> scons --with-cxx-config --without-python build/ARM/libgem5_opt.so +> cd util/cxx_config + +Then edit Makefile to set the paths for SystemC and run make + +> make + +Make a config file for the C++-configured gem5 using normal gem5 + +> ../../build/ARM/gem5.opt ../../configs/example/se.py -c \ +> ../../tests/test-progs/hello/bin/arm/linux/hello + +The binary 'gem5.opt.cxx' can now be used to load in the generated config +file from the previous normal gem5 run. + +Try: + +> ./gem5.opt.cxx m5out/config.ini + +This should print: + +> Hello world! + +The .ini file can also be read by the Python .ini file reader example: + +> ../../build/ARM/gem5.opt ../../configs/example/read_ini.py m5out/config.ini diff --git a/util/systemc/main.cc b/util/systemc/main.cc new file mode 100644 index 000000000..6ffaeb6da --- /dev/null +++ b/util/systemc/main.cc @@ -0,0 +1,379 @@ +/* + * Copyright (c) 2014 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Andrew Bardsley + */ + +/** + * @file + * + * Example top level file for SystemC integration with C++-only + * instantiation. + * + * Build with something like: + * + * scons --without-python build/ARM/libgem5_opt.so + * + * g++ -std=c++0x -Ibuild/ARM -Isrc -DTRACING_ON \ + * -o gem5cxx.opt -Lbuild/ARM -lgem5_opt \ + * src/sim/sc_main_cxx.cc src/sim/cxx_stats.cc \ + * src/sim/sc_module.cc src/sim/sc_logger.cc + */ + +#include +#include +#include +#include + +#include "base/statistics.hh" +#include "base/str.hh" +#include "base/trace.hh" +#include "cpu/base.hh" +#include "sim/cxx_config_ini.hh" +#include "sim/cxx_manager.hh" +#include "sim/init_signals.hh" +#include "sim/serialize.hh" +#include "sim/simulate.hh" +#include "sim/stat_control.hh" +#include "sim/system.hh" +#include "sc_logger.hh" +#include "sc_module.hh" +#include "stats.hh" + +void +usage(const std::string &prog_name) +{ + std::cerr << "Usage: " << prog_name << ( + " [